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omap mmc: Add better MMC low-level init

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This will simplify the MMC low-level init, and make it more
flexible to add support for a newer MMC controller in the
following patches.

The patch rearranges platform data and gets rid of slot vs
controller confusion in the old data structures. Also fix
device id numbering in the clock code.

Some code snippets are based on an earlier patch by
Russell King <linux@arm.linux.org.uk>.

Cc: Pierre Ossman <drzeus-mmc@drzeus.cx>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren
2008-12-10 17:37:16 -08:00
parent 652bcd8f72
commit d88746652b
16 changed files with 530 additions and 284 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
arch/arm/mach-omap2/clock24xx.h
View File

@ -2522,7 +2522,6 @@ static struct clk usbhs_ick = {
static struct clk mmchs1_ick = {
.name = "mmchs_ick",
.id = 1,
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP243X,
.clkdm_name = "core_l4_clkdm",
@ -2533,7 +2532,6 @@ static struct clk mmchs1_ick = {
static struct clk mmchs1_fck = {
.name = "mmchs_fck",
.id = 1,
.parent = &func_96m_ck,
.flags = CLOCK_IN_OMAP243X,
.clkdm_name = "core_l3_clkdm",
@ -2544,7 +2542,7 @@ static struct clk mmchs1_fck = {
static struct clk mmchs2_ick = {
.name = "mmchs_ick",
.id = 2,
.id = 1,
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP243X,
.clkdm_name = "core_l4_clkdm",
@ -2555,7 +2553,7 @@ static struct clk mmchs2_ick = {
static struct clk mmchs2_fck = {
.name = "mmchs_fck",
.id = 2,
.id = 1,
.parent = &func_96m_ck,
.flags = CLOCK_IN_OMAP243X,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
@ -2595,7 +2593,6 @@ static struct clk mdm_intc_ick = {
static struct clk mmchsdb1_fck = {
.name = "mmchsdb_fck",
.id = 1,
.parent = &func_32k_ck,
.flags = CLOCK_IN_OMAP243X,
.clkdm_name = "core_l4_clkdm",
@ -2606,7 +2603,7 @@ static struct clk mmchsdb1_fck = {
static struct clk mmchsdb2_fck = {
.name = "mmchsdb_fck",
.id = 2,
.id = 1,
.parent = &func_32k_ck,
.flags = CLOCK_IN_OMAP243X,
.clkdm_name = "core_l4_clkdm",

10
arch/arm/mach-omap2/clock34xx.h
View File

@ -1374,7 +1374,7 @@ static struct clk core_96m_fck = {
static struct clk mmchs3_fck = {
.name = "mmchs_fck",
.id = 3,
.id = 2,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430ES2_EN_MMC3_SHIFT,
@ -1385,7 +1385,7 @@ static struct clk mmchs3_fck = {
static struct clk mmchs2_fck = {
.name = "mmchs_fck",
.id = 2,
.id = 1,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_MMC2_SHIFT,
@ -1406,7 +1406,6 @@ static struct clk mspro_fck = {
static struct clk mmchs1_fck = {
.name = "mmchs_fck",
.id = 1,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_MMC1_SHIFT,
@ -1722,7 +1721,7 @@ static struct clk usbtll_ick = {
static struct clk mmchs3_ick = {
.name = "mmchs_ick",
.id = 3,
.id = 2,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430ES2_EN_MMC3_SHIFT,
@ -1774,7 +1773,7 @@ static struct clk des2_ick = {
static struct clk mmchs2_ick = {
.name = "mmchs_ick",
.id = 2,
.id = 1,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_MMC2_SHIFT,
@ -1785,7 +1784,6 @@ static struct clk mmchs2_ick = {
static struct clk mmchs1_ick = {
.name = "mmchs_ick",
.id = 1,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_MMC1_SHIFT,

83
arch/arm/mach-omap2/devices.c
View File

@ -24,6 +24,7 @@
#include <mach/mux.h>
#include <mach/gpio.h>
#include <mach/eac.h>
#include <mach/mmc.h>
#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
#define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
@ -295,6 +296,88 @@ static void omap_init_sha1_md5(void)
static inline void omap_init_sha1_md5(void) { }
#endif
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
int controller_nr)
{
if (cpu_is_omap2420() && controller_nr == 0) {
omap_cfg_reg(H18_24XX_MMC_CMD);
omap_cfg_reg(H15_24XX_MMC_CLKI);
omap_cfg_reg(G19_24XX_MMC_CLKO);
omap_cfg_reg(F20_24XX_MMC_DAT0);
omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
if (mmc_controller->slots[0].wire4) {
omap_cfg_reg(H14_24XX_MMC_DAT1);
omap_cfg_reg(E19_24XX_MMC_DAT2);
omap_cfg_reg(D19_24XX_MMC_DAT3);
omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
}
/*
* Use internal loop-back in MMC/SDIO Module Input Clock
* selection
*/
if (mmc_controller->slots[0].internal_clock) {
u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
v |= (1 << 24);
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
}
}
}
void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
int nr_controllers)
{
int i;
for (i = 0; i < nr_controllers; i++) {
unsigned long base, size;
unsigned int irq = 0;
if (!mmc_data[i])
continue;
omap2_mmc_mux(mmc_data[i], i);
switch (i) {
case 0:
base = OMAP2_MMC1_BASE;
irq = INT_24XX_MMC_IRQ;
break;
case 1:
base = OMAP2_MMC2_BASE;
irq = INT_24XX_MMC2_IRQ;
break;
case 2:
if (!cpu_is_omap34xx())
return;
base = OMAP3_MMC3_BASE;
irq = INT_34XX_MMC3_IRQ;
break;
default:
continue;
}
if (cpu_is_omap2420())
size = OMAP2420_MMC_SIZE;
else
size = HSMMC_SIZE;
omap_mmc_add(i, base, size, irq, mmc_data[i]);
};
}
#endif
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
#define OMAP_HDQ_BASE 0x480B2000