powerpc: merge idle_power4.S and trapc.s
Use idle_power4.S from ppc64 as we are not going to support 32 bit power4 in the merged tree. Merge ppc64 traps.c into powerpc traps.c: use ppc64 versions of exception routine names (as they don't have StudlyCaps) make all the versions if die() have the same prototype Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
This commit is contained in:
Stephen Rothwell
@ -1,6 +1,4 @@
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/*
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* arch/powerpc/kernel/traps.c
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*
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* This program is free software; you can redistribute it and/or
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@ -23,29 +21,46 @@
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/interrupt.h>
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/prctl.h>
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#include <linux/delay.h>
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#include <linux/kprobes.h>
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#include <asm/kdebug.h>
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#ifdef CONFIG_PPC32
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#include <linux/ptrace.h>
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#include <linux/prctl.h>
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#endif
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#ifdef CONFIG_PPC32
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#include <asm/reg.h>
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#include <asm/xmon.h>
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#ifdef CONFIG_PMAC_BACKLIGHT
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#include <asm/backlight.h>
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#endif
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#include <asm/perfmon.h>
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#endif
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#ifdef CONFIG_PPC64
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#include <asm/processor.h>
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#include <asm/ppcdebug.h>
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#include <asm/rtas.h>
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#include <asm/systemcfg.h>
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#include <asm/machdep.h>
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#include <asm/pmc.h>
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#endif
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#ifdef CONFIG_PPC64
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#define __KPROBES __kprobes
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#else
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#define __KPROBES
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#endif
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#ifdef CONFIG_DEBUGGER
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int (*__debugger)(struct pt_regs *regs);
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@ -96,7 +111,7 @@ int die(const char *str, struct pt_regs *regs, long err)
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console_verbose();
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spin_lock_irq(&die_lock);
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bust_spinlocks(1);
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#ifdef CONFIG_PMAC_BACKLIGHT
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#if defined(CONFIG_PPC32) && defined(CONFIG_PMAC_BACKLIGHT)
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if (_machine == _MACH_Pmac) {
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set_backlight_enable(1);
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set_backlight_level(BACKLIGHT_MAX);
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@ -154,9 +169,17 @@ int die(const char *str, struct pt_regs *regs, long err)
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panic("Fatal exception in interrupt");
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if (panic_on_oops) {
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#ifdef CONFIG_PPC64
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printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
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ssleep(5);
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#endif
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panic("Fatal exception");
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}
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#ifdef CONFIG_PPC32
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do_exit(err);
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#else
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do_exit(SIGSEGV);
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#endif
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return 0;
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}
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@ -176,6 +199,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
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info.si_addr = (void __user *) addr;
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force_sig_info(signr, &info, current);
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#ifdef CONFIG_PPC32
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/*
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* Init gets no signals that it doesn't have a handler for.
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* That's all very well, but if it has caused a synchronous
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@ -197,6 +221,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
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do_exit(signr);
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}
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}
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#endif
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}
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#ifdef CONFIG_PPC64
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@ -206,7 +231,7 @@ void system_reset_exception(struct pt_regs *regs)
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if (ppc_md.system_reset_exception)
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ppc_md.system_reset_exception(regs);
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die("System Reset", regs, SIGABRT);
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die("System Reset", regs, 0);
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/* Must die if the interrupt is not recoverable */
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if (!(regs->msr & MSR_RI))
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@ -216,6 +241,7 @@ void system_reset_exception(struct pt_regs *regs)
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}
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#endif
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#ifdef CONFIG_PPC32
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/*
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* I/O accesses can cause machine checks on powermacs.
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* Check if the NIP corresponds to the address of a sync
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@ -264,8 +290,10 @@ static inline int check_io_access(struct pt_regs *regs)
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#endif /* CONFIG_PPC_PMAC */
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return 0;
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}
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#endif /* CONFIG_PPC32 */
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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/* On 4xx, the reason for the machine check or program exception
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is in the ESR. */
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#define get_reason(regs) ((regs)->dsisr)
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@ -284,6 +312,7 @@ static inline int check_io_access(struct pt_regs *regs)
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#define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
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#else
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/* On non-4xx, the reason for the machine check or program
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exception is in the MSR. */
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#define get_reason(regs) ((regs)->msr)
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@ -297,6 +326,7 @@ static inline int check_io_access(struct pt_regs *regs)
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#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
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#endif
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#ifdef CONFIG_PPC32
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/*
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* This is "fall-back" implementation for configurations
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* which don't provide platform-specific machine check info
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@ -305,8 +335,9 @@ void __attribute__ ((weak))
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platform_machine_check(struct pt_regs *regs)
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{
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}
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#endif
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void MachineCheckException(struct pt_regs *regs)
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void machine_check_exception(struct pt_regs *regs)
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{
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#ifdef CONFIG_PPC64
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int recover = 0;
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@ -462,23 +493,31 @@ void MachineCheckException(struct pt_regs *regs)
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* additional info, e.g. bus error registers.
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*/
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platform_machine_check(regs);
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#endif /* CONFIG_PPC64 */
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#endif /* CONFIG_PPC32 */
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if (debugger_fault_handler(regs))
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return;
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die("Machine check", regs, SIGBUS);
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die("Machine check", regs,
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#ifdef CONFIG_PPC32
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SIGBUS
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#else
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0
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#endif
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);
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/* Must die if the interrupt is not recoverable */
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if (!(regs->msr & MSR_RI))
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panic("Unrecoverable Machine check");
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}
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#ifdef CONFIG_PPC32
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void SMIException(struct pt_regs *regs)
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{
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die("System Management Interrupt", regs, SIGABRT);
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}
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#endif
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void UnknownException(struct pt_regs *regs)
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void unknown_exception(struct pt_regs *regs)
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{
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printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
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regs->nip, regs->msr, regs->trap);
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@ -486,7 +525,7 @@ void UnknownException(struct pt_regs *regs)
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_exception(SIGTRAP, regs, 0, 0);
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}
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void InstructionBreakpoint(struct pt_regs *regs)
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void instruction_breakpoint_exception(struct pt_regs *regs)
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{
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if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
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5, SIGTRAP) == NOTIFY_STOP)
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@ -496,14 +535,20 @@ void InstructionBreakpoint(struct pt_regs *regs)
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_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
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}
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#ifdef CONFIG_PPC32
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void RunModeException(struct pt_regs *regs)
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{
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_exception(SIGTRAP, regs, 0, 0);
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}
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#endif
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void SingleStepException(struct pt_regs *regs)
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void __KPROBES single_step_exception(struct pt_regs *regs)
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{
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#ifdef CONFIG_PPC32
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regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
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#else
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regs->msr &= ~MSR_SE; /* Turn off 'trace' bit */
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#endif
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if (notify_die(DIE_SSTEP, "single_step", regs, 5,
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5, SIGTRAP) == NOTIFY_STOP)
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@ -520,15 +565,62 @@ void SingleStepException(struct pt_regs *regs)
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* pretend we got a single-step exception. This was pointed out
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* by Kumar Gala. -- paulus
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*/
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static void emulate_single_step(struct pt_regs *regs)
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static inline void emulate_single_step(struct pt_regs *regs)
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{
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if (single_stepping(regs)) {
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#ifdef CONFIG_PPC32
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clear_single_step(regs);
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_exception(SIGTRAP, regs, TRAP_TRACE, 0);
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#else
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single_step_exception(regs);
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#endif
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}
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}
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/* Illegal instruction emulation support. Originally written to
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static void parse_fpe(struct pt_regs *regs)
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{
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int code = 0;
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unsigned long fpscr;
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#ifdef CONFIG_PPC32
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/* We must make sure the FP state is consistent with
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* our MSR_FP in regs
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*/
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preempt_disable();
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if (regs->msr & MSR_FP)
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giveup_fpu(current);
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preempt_enable();
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#else
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flush_fp_to_thread(current);
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#endif
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fpscr = current->thread.fpscr;
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/* Invalid operation */
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if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
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code = FPE_FLTINV;
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/* Overflow */
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else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
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code = FPE_FLTOVF;
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/* Underflow */
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else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
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code = FPE_FLTUND;
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/* Divide by zero */
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else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
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code = FPE_FLTDIV;
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/* Inexact result */
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else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
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code = FPE_FLTRES;
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_exception(SIGFPE, regs, code, regs->nip);
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}
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/*
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* Illegal instruction emulation support. Originally written to
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* provide the PVR to user applications using the mfspr rd, PVR.
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* Return non-zero if we can't emulate, or -EFAULT if the associated
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* memory access caused an access fault. Return zero on success.
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@ -536,7 +628,6 @@ static void emulate_single_step(struct pt_regs *regs)
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* There are a couple of ways to do this, either "decode" the instruction
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* or directly match lots of bits. In this case, matching lots of
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* bits is faster and easier.
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*
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*/
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#define INST_MFSPR_PVR 0x7c1f42a6
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#define INST_MFSPR_PVR_MASK 0xfc1fffff
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@ -547,6 +638,8 @@ static void emulate_single_step(struct pt_regs *regs)
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#define INST_MCRXR 0x7c000400
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#define INST_MCRXR_MASK 0x7c0007fe
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#ifdef CONFIG_PPC32
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#define INST_STRING 0x7c00042a
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#define INST_STRING_MASK 0x7c0007fe
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#define INST_STRING_GEN_MASK 0x7c00067e
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@ -622,6 +715,7 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
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return 0;
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}
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#endif /* CONFIG_PPC32 */
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static int emulate_instruction(struct pt_regs *regs)
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{
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@ -643,22 +737,44 @@ static int emulate_instruction(struct pt_regs *regs)
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}
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/* Emulating the dcba insn is just a no-op. */
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if ((instword & INST_DCBA_MASK) == INST_DCBA)
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if ((instword & INST_DCBA_MASK) == INST_DCBA) {
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#ifdef CONFIG_PPC64
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static int warned;
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if (!warned) {
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printk(KERN_WARNING
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"process %d (%s) uses obsolete 'dcba' insn\n",
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current->pid, current->comm);
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warned = 1;
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}
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#endif /* CONFIG_PPC64 */
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return 0;
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}
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/* Emulate the mcrxr insn. */
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if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
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int shift = (instword >> 21) & 0x1c;
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unsigned int shift = (instword >> 21) & 0x1c;
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unsigned long msk = 0xf0000000UL >> shift;
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#ifdef CONFIG_PPC64
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static int warned;
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if (!warned) {
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printk(KERN_WARNING
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"process %d (%s) uses obsolete 'mcrxr' insn\n",
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current->pid, current->comm);
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warned = 1;
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}
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#endif
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regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
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regs->xer &= ~0xf0000000UL;
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return 0;
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}
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#ifdef CONFIG_PPC32
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/* Emulate load/store string insn. */
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if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
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return emulate_string_inst(regs, instword);
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#endif
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return -EINVAL;
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}
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@ -686,7 +802,7 @@ struct bug_entry *find_bug(unsigned long bugaddr)
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return module_find_bug(bugaddr);
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}
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int check_bug_trap(struct pt_regs *regs)
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static int check_bug_trap(struct pt_regs *regs)
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{
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struct bug_entry *bug;
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unsigned long addr;
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@ -701,34 +817,38 @@ int check_bug_trap(struct pt_regs *regs)
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return 0;
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if (bug->line & BUG_WARNING_TRAP) {
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/* this is a WARN_ON rather than BUG/BUG_ON */
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#ifdef CONFIG_XMON
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#if defined(CONFIG_PPC32) && defined(CONFIG_XMON)
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xmon_printf(KERN_ERR "Badness in %s at %s:%d\n",
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bug->function, bug->file,
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bug->line & ~BUG_WARNING_TRAP);
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#endif /* CONFIG_XMON */
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#endif
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printk(KERN_ERR "Badness in %s at %s:%d\n",
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bug->function, bug->file,
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bug->line & ~BUG_WARNING_TRAP);
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#ifdef CONFIG_PPC32
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dump_stack();
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#else
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show_stack(current, (void *)regs->gpr[1]);
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#endif
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return 1;
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}
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#ifdef CONFIG_XMON
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#if defined(CONFIG_PPC32) && defined(CONFIG_XMON)
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xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
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bug->function, bug->file, bug->line);
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xmon(regs);
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#endif /* CONFIG_XMON */
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#endif
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printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
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bug->function, bug->file, bug->line);
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return 0;
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}
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void ProgramCheckException(struct pt_regs *regs)
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void __KPROBES program_check_exception(struct pt_regs *regs)
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{
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unsigned int reason = get_reason(regs);
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#if defined(CONFIG_PPC32) && defined(CONFIG_MATH_EMULATION)
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extern int do_mathemu(struct pt_regs *regs);
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#ifdef CONFIG_MATH_EMULATION
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/* (reason & REASON_ILLEGAL) would be the obvious thing here,
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* but there seems to be a hardware bug on the 405GP (RevD)
|
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* that means ESR is sometimes set incorrectly - either to
|
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@ -740,69 +860,61 @@ void ProgramCheckException(struct pt_regs *regs)
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emulate_single_step(regs);
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return;
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}
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#endif /* CONFIG_MATH_EMULATION */
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#endif
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#ifdef CONFIG_PPC64
|
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if (debugger_fault_handler(regs))
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return;
|
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#endif
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|
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if (reason & REASON_FP) {
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/* IEEE FP exception */
|
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int code = 0;
|
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u32 fpscr;
|
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|
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/* We must make sure the FP state is consistent with
|
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* our MSR_FP in regs
|
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*/
|
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preempt_disable();
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if (regs->msr & MSR_FP)
|
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giveup_fpu(current);
|
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preempt_enable();
|
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|
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fpscr = current->thread.fpscr;
|
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fpscr &= fpscr << 22; /* mask summary bits with enables */
|
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if (fpscr & FPSCR_VX)
|
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code = FPE_FLTINV;
|
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else if (fpscr & FPSCR_OX)
|
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code = FPE_FLTOVF;
|
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else if (fpscr & FPSCR_UX)
|
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code = FPE_FLTUND;
|
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else if (fpscr & FPSCR_ZX)
|
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code = FPE_FLTDIV;
|
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else if (fpscr & FPSCR_XX)
|
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code = FPE_FLTRES;
|
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_exception(SIGFPE, regs, code, regs->nip);
|
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return;
|
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}
|
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if (reason & REASON_TRAP) {
|
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parse_fpe(regs);
|
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} else if (reason & REASON_TRAP) {
|
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/* trap exception */
|
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#ifdef CONFIG_PPC64
|
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if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
|
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== NOTIFY_STOP)
|
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return;
|
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#endif
|
||||
if (debugger_bpt(regs))
|
||||
return;
|
||||
if (check_bug_trap(regs)) {
|
||||
regs->nip += 4;
|
||||
return;
|
||||
}
|
||||
_exception(SIGTRAP, regs, TRAP_BRKPT, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Try to emulate it if we should. */
|
||||
if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
|
||||
_exception(SIGTRAP, regs, TRAP_BRKPT,
|
||||
#ifdef CONFIG_PPC32
|
||||
0
|
||||
#else
|
||||
regs->nip
|
||||
#endif
|
||||
);
|
||||
} else
|
||||
#ifdef CONFIG_PPC32
|
||||
if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED))
|
||||
#endif
|
||||
{
|
||||
/* Privileged or illegal instruction; try to emulate it. */
|
||||
switch (emulate_instruction(regs)) {
|
||||
case 0:
|
||||
regs->nip += 4;
|
||||
emulate_single_step(regs);
|
||||
return;
|
||||
break;
|
||||
case -EFAULT:
|
||||
_exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
|
||||
return;
|
||||
break;
|
||||
default:
|
||||
if (reason & REASON_PRIVILEGED)
|
||||
_exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
|
||||
else
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (reason & REASON_PRIVILEGED)
|
||||
_exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
|
||||
else
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
}
|
||||
|
||||
void AlignmentException(struct pt_regs *regs)
|
||||
void alignment_exception(struct pt_regs *regs)
|
||||
{
|
||||
int fixed;
|
||||
|
||||
@ -814,18 +926,31 @@ void AlignmentException(struct pt_regs *regs)
|
||||
return;
|
||||
}
|
||||
|
||||
/* Operand address was bad */
|
||||
/* Operand address was bad */
|
||||
if (fixed == -EFAULT) {
|
||||
if (user_mode(regs))
|
||||
_exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
|
||||
_exception(SIGSEGV, regs,
|
||||
#ifdef CONFIG_PPC32
|
||||
SEGV_ACCERR,
|
||||
#else
|
||||
SEGV_MAPERR,
|
||||
#endif
|
||||
regs->dar);
|
||||
else
|
||||
/* Search exception table */
|
||||
bad_page_fault(regs, regs->dar, SIGSEGV);
|
||||
return;
|
||||
}
|
||||
_exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
|
||||
_exception(SIGBUS, regs, BUS_ADRALN,
|
||||
#ifdef CONFIG_PPC32
|
||||
regs->dar
|
||||
#else
|
||||
regs->nip
|
||||
#endif
|
||||
);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
void StackOverflow(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
|
||||
@ -849,8 +974,58 @@ void trace_syscall(struct pt_regs *regs)
|
||||
current, current->pid, regs->nip, regs->link, regs->gpr[0],
|
||||
regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
|
||||
}
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
#ifdef CONFIG_8xx
|
||||
#ifdef CONFIG_PPC64
|
||||
void kernel_fp_unavailable_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
|
||||
"%lx at %lx\n", regs->trap, regs->nip);
|
||||
die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
|
||||
}
|
||||
#endif
|
||||
|
||||
void altivec_unavailable_exception(struct pt_regs *regs)
|
||||
{
|
||||
#if !defined(CONFIG_ALTIVEC) || defined(CONFIG_PPC64)
|
||||
if (user_mode(regs)) {
|
||||
/* A user program has executed an altivec instruction,
|
||||
but this kernel doesn't support altivec. */
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_PPC32
|
||||
{
|
||||
static int kernel_altivec_count;
|
||||
|
||||
/* The kernel has executed an altivec instruction without
|
||||
first enabling altivec. Whinge but let it do it. */
|
||||
if (++kernel_altivec_count < 10)
|
||||
printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n",
|
||||
current, regs->nip);
|
||||
regs->msr |= MSR_VEC;
|
||||
}
|
||||
#else
|
||||
printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
|
||||
"%lx at %lx\n", regs->trap, regs->nip);
|
||||
die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
extern perf_irq_t perf_irq;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PPC64) || defined(CONFIG_E500)
|
||||
void performance_monitor_exception(struct pt_regs *regs)
|
||||
{
|
||||
perf_irq(regs);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(CONFIG_PPC32) && defined(CONFIG_8xx)
|
||||
void SoftwareEmulation(struct pt_regs *regs)
|
||||
{
|
||||
extern int do_mathemu(struct pt_regs *);
|
||||
@ -879,8 +1054,9 @@ void SoftwareEmulation(struct pt_regs *regs)
|
||||
} else
|
||||
emulate_single_step(regs);
|
||||
}
|
||||
#endif /* CONFIG_8xx */
|
||||
#endif /* defined(CONFIG_PPC32) && defined(CONFIG_8xx) */
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
|
||||
|
||||
void DebugException(struct pt_regs *regs, unsigned long debug_status)
|
||||
@ -909,42 +1085,36 @@ void TAUException(struct pt_regs *regs)
|
||||
regs->nip, regs->msr, regs->trap, print_tainted());
|
||||
}
|
||||
#endif /* CONFIG_INT_TAU */
|
||||
|
||||
void AltivecUnavailException(struct pt_regs *regs)
|
||||
{
|
||||
static int kernel_altivec_count;
|
||||
|
||||
#ifndef CONFIG_ALTIVEC
|
||||
if (user_mode(regs)) {
|
||||
/* A user program has executed an altivec instruction,
|
||||
but this kernel doesn't support altivec. */
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
/* The kernel has executed an altivec instruction without
|
||||
first enabling altivec. Whinge but let it do it. */
|
||||
if (++kernel_altivec_count < 10)
|
||||
printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n",
|
||||
current, regs->nip);
|
||||
regs->msr |= MSR_VEC;
|
||||
}
|
||||
#endif /* CONFIG_PPC32*/
|
||||
|
||||
#ifdef CONFIG_ALTIVEC
|
||||
void AltivecAssistException(struct pt_regs *regs)
|
||||
void altivec_assist_exception(struct pt_regs *regs)
|
||||
{
|
||||
int err;
|
||||
#ifdef CONFIG_PPC64
|
||||
siginfo_t info;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
preempt_disable();
|
||||
if (regs->msr & MSR_VEC)
|
||||
giveup_altivec(current);
|
||||
preempt_enable();
|
||||
#endif
|
||||
if (!user_mode(regs)) {
|
||||
printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
|
||||
" at %lx\n", regs->nip);
|
||||
die("Kernel Altivec assist exception", regs, SIGILL);
|
||||
die("Kernel "
|
||||
#ifdef CONFIG_PPC64
|
||||
"VMX/"
|
||||
#endif
|
||||
"Altivec assist exception", regs, SIGILL);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
flush_altivec_to_thread(current);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
err = emulate_altivec(regs);
|
||||
if (err == 0) {
|
||||
regs->nip += 4; /* skip emulated instruction */
|
||||
@ -954,7 +1124,15 @@ void AltivecAssistException(struct pt_regs *regs)
|
||||
|
||||
if (err == -EFAULT) {
|
||||
/* got an error reading the instruction */
|
||||
#ifdef CONFIG_PPC32
|
||||
_exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
|
||||
#else
|
||||
info.si_signo = SIGSEGV;
|
||||
info.si_errno = 0;
|
||||
info.si_code = SEGV_MAPERR;
|
||||
info.si_addr = (void __user *) regs->nip;
|
||||
force_sig_info(SIGSEGV, &info, current);
|
||||
#endif
|
||||
} else {
|
||||
/* didn't recognize the instruction */
|
||||
/* XXX quick hack for now: set the non-Java bit in the VSCR */
|
||||
@ -966,13 +1144,7 @@ void AltivecAssistException(struct pt_regs *regs)
|
||||
}
|
||||
#endif /* CONFIG_ALTIVEC */
|
||||
|
||||
#ifdef CONFIG_E500
|
||||
void PerformanceMonitorException(struct pt_regs *regs)
|
||||
{
|
||||
perf_irq(regs);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
#ifdef CONFIG_FSL_BOOKE
|
||||
void CacheLockingException(struct pt_regs *regs, unsigned long address,
|
||||
unsigned long error_code)
|
||||
@ -1022,7 +1194,24 @@ void SPEFloatingPointException(struct pt_regs *regs)
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
/*
|
||||
* We enter here if we get an unrecoverable exception, that is, one
|
||||
* that happened at a point where the RI (recoverable interrupt) bit
|
||||
* in the MSR is 0. This indicates that SRR0/1 are live, and that
|
||||
* we therefore lost state by taking this exception.
|
||||
*/
|
||||
void unrecoverable_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
|
||||
regs->trap, regs->nip);
|
||||
die("Unrecoverable exception", regs, SIGABRT);
|
||||
}
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
/*
|
||||
* Default handler for a Watchdog exception,
|
||||
@ -1041,6 +1230,20 @@ void WatchdogException(struct pt_regs *regs)
|
||||
WatchdogHandler(regs);
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
/*
|
||||
* We enter here if we discover during exception entry that we are
|
||||
* running in supervisor mode with a userspace value in the stack pointer.
|
||||
*/
|
||||
void kernel_bad_stack(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
|
||||
regs->gpr[1], regs->nip);
|
||||
die("Bad kernel stack pointer", regs, SIGABRT);
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init trap_init(void)
|
||||
{
|
||||
|
||||
Reference in New Issue
Block a user