SPI controller drivers: check for unsupported modes
Minor SPI controller driver updates: make the setup() methods reject spi->mode bits they don't support, by masking aginst the inverse of bits they *do* support. This insures against misbehavior later when new mode bits get added. Most controllers can't support SPI_LSB_FIRST; more handle SPI_CS_HIGH. Support for all four SPI clock/transfer modes is routine. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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committed by
Linus Torvalds
parent
ff294cba8a
commit
dccd573bb0
@@ -1163,6 +1163,9 @@ msg_rejected:
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return -EINVAL;
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}
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/* the spi->mode bits understood by this driver: */
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#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH)
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/* On first setup bad values must free chip_data memory since will cause
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spi_new_device to fail. Bad value setup from protocol driver are simply not
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applied and notified to the calling driver. */
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@@ -1174,6 +1177,12 @@ static int setup(struct spi_device *spi)
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u32 tmp;
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int status = 0;
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if (spi->mode & ~MODEBITS) {
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dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
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spi->mode & ~MODEBITS);
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return -EINVAL;
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}
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/* Get controller data */
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chip_info = spi->controller_data;
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@@ -1245,21 +1254,6 @@ static int setup(struct spi_device *spi)
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/* SPI mode */
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tmp = spi->mode;
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if (tmp & SPI_LSB_FIRST) {
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status = -EINVAL;
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if (first_setup) {
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dev_err(&spi->dev,
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"setup - "
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"HW doesn't support LSB first transfer\n");
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goto err_first_setup;
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} else {
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dev_err(&spi->dev,
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"setup - "
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"HW doesn't support LSB first transfer, "
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"default to MSB first\n");
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spi->mode &= ~SPI_LSB_FIRST;
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}
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}
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if (tmp & SPI_CS_HIGH) {
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u32_EDIT(chip->control,
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SPI_CONTROL_SSPOL, SPI_CONTROL_SSPOL_ACT_HIGH);
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