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pch_phub: Care FUNCSEL register in PM

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Only ML7213/ML7223(Bus-n) has this register.
Currently,this driver doesn't care register "FUNCSEL" in suspend/resume.
This patch saves/restores FUNCSEL register only when the device is ML7213 or
ML7223(Bus-n).

Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Tomoya MORINAGA
2011-07-21 17:07:08 +09:00
committed by Greg Kroah-Hartman
parent 0a26813c9f
commit dd7d7fea29
1 changed files with 7 additions and 0 deletions
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7
drivers/misc/pch_phub.c
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@@ -90,6 +90,7 @@
#define PCH_PHUB_INTPIN_REG_WPERMIT_REG3 0x002C #define PCH_PHUB_INTPIN_REG_WPERMIT_REG3 0x002C
#define PCH_PHUB_INT_REDUCE_CONTROL_REG_BASE 0x0040 #define PCH_PHUB_INT_REDUCE_CONTROL_REG_BASE 0x0040
#define CLKCFG_REG_OFFSET 0x500 #define CLKCFG_REG_OFFSET 0x500
#define FUNCSEL_REG_OFFSET 0x508
#define PCH_PHUB_OROM_SIZE 15360 #define PCH_PHUB_OROM_SIZE 15360
@@ -108,6 +109,7 @@
* @intpin_reg_wpermit_reg3: INTPIN_REG_WPERMIT register 3 val * @intpin_reg_wpermit_reg3: INTPIN_REG_WPERMIT register 3 val
* @int_reduce_control_reg: INT_REDUCE_CONTROL registers val * @int_reduce_control_reg: INT_REDUCE_CONTROL registers val
* @clkcfg_reg: CLK CFG register val * @clkcfg_reg: CLK CFG register val
* @funcsel_reg: Function select register value
* @pch_phub_base_address: Register base address * @pch_phub_base_address: Register base address
* @pch_phub_extrom_base_address: external rom base address * @pch_phub_extrom_base_address: external rom base address
* @pch_mac_start_address: MAC address area start address * @pch_mac_start_address: MAC address area start address
@@ -128,6 +130,7 @@ struct pch_phub_reg {
u32 intpin_reg_wpermit_reg3; u32 intpin_reg_wpermit_reg3;
u32 int_reduce_control_reg[MAX_NUM_INT_REDUCE_CONTROL_REG]; u32 int_reduce_control_reg[MAX_NUM_INT_REDUCE_CONTROL_REG];
u32 clkcfg_reg; u32 clkcfg_reg;
u32 funcsel_reg;
void __iomem *pch_phub_base_address; void __iomem *pch_phub_base_address;
void __iomem *pch_phub_extrom_base_address; void __iomem *pch_phub_extrom_base_address;
u32 pch_mac_start_address; u32 pch_mac_start_address;
@@ -211,6 +214,8 @@ static void pch_phub_save_reg_conf(struct pci_dev *pdev)
__func__, i, chip->int_reduce_control_reg[i]); __func__, i, chip->int_reduce_control_reg[i]);
} }
chip->clkcfg_reg = ioread32(p + CLKCFG_REG_OFFSET); chip->clkcfg_reg = ioread32(p + CLKCFG_REG_OFFSET);
if ((chip->ioh_type == 2) || (chip->ioh_type == 4))
chip->funcsel_reg = ioread32(p + FUNCSEL_REG_OFFSET);
} }
/* pch_phub_restore_reg_conf - restore register configuration */ /* pch_phub_restore_reg_conf - restore register configuration */
@@ -271,6 +276,8 @@ static void pch_phub_restore_reg_conf(struct pci_dev *pdev)
} }
iowrite32(chip->clkcfg_reg, p + CLKCFG_REG_OFFSET); iowrite32(chip->clkcfg_reg, p + CLKCFG_REG_OFFSET);
if ((chip->ioh_type == 2) || (chip->ioh_type == 4))
iowrite32(chip->funcsel_reg, p + FUNCSEL_REG_OFFSET);
} }
/** /**