sh: Exception vector rework and SH-2/SH-2A support.
This splits out common bits from the existing exception handler for use between SH-2/SH-2A and SH-3/4, and adds support for the SH-2/2A exceptions. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt
parent
0983b31849
commit
de39840646
@@ -53,8 +53,10 @@ ENTRY(_stext)
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ldc r0, sr
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! Initialize global interrupt mask
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mov #0, r0
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#ifdef CONFIG_CPU_HAS_SR_RB
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ldc r0, r6_bank
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#endif
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/*
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* Prefetch if possible to reduce cache miss penalty.
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*
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@@ -71,8 +73,10 @@ ENTRY(_stext)
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mov #(THREAD_SIZE >> 8), r1
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shll8 r1 ! r1 = THREAD_SIZE
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sub r1, r0 !
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#ifdef CONFIG_CPU_HAS_SR_RB
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ldc r0, r7_bank ! ... and initial thread_info
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#endif
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! Clear BSS area
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mov.l 3f, r1
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add #4, r1
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@@ -95,7 +99,11 @@ ENTRY(_stext)
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nop
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.balign 4
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#if defined(CONFIG_CPU_SH2)
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1: .long 0x000000F0 ! IMASK=0xF
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#else
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1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
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#endif
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2: .long init_thread_union+THREAD_SIZE
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3: .long __bss_start
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4: .long _end
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