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watchdog: f71808e_wdt: Add Fintek F71869 watchdog

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Add Fintek f71869 as a supported watchdog device.

Signed-off-by: Michel Arboi <michel@arboi.fr.eu.org>
Acked-by: Giel van Schijndel <me@mortis.eu>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Michel Arboi
2010-12-06 20:53:45 +01:00
committed by Wim Van Sebroeck
parent 7977ff6e3d
commit df278dac20
1 changed files with 11 additions and 1 deletions
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12
drivers/watchdog/f71808e_wdt.c
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@@ -53,6 +53,7 @@
#define SIO_F71808_ID 0x0901 /* Chipset ID */ #define SIO_F71808_ID 0x0901 /* Chipset ID */
#define SIO_F71858_ID 0x0507 /* Chipset ID */ #define SIO_F71858_ID 0x0507 /* Chipset ID */
#define SIO_F71862_ID 0x0601 /* Chipset ID */ #define SIO_F71862_ID 0x0601 /* Chipset ID */
#define SIO_F71869_ID 0x0814 /* Chipset ID */
#define SIO_F71882_ID 0x0541 /* Chipset ID */ #define SIO_F71882_ID 0x0541 /* Chipset ID */
#define SIO_F71889_ID 0x0723 /* Chipset ID */ #define SIO_F71889_ID 0x0723 /* Chipset ID */
@@ -108,12 +109,13 @@ module_param(start_withtimeout, uint, 0);
MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with" MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
" given initial timeout. Zero (default) disables this feature."); " given initial timeout. Zero (default) disables this feature.");
enum chips { f71808fg, f71858fg, f71862fg, f71882fg, f71889fg }; enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
static const char *f71808e_names[] = { static const char *f71808e_names[] = {
"f71808fg", "f71808fg",
"f71858fg", "f71858fg",
"f71862fg", "f71862fg",
"f71869",
"f71882fg", "f71882fg",
"f71889fg", "f71889fg",
}; };
@@ -341,6 +343,11 @@ static int watchdog_start(void)
goto exit_superio; goto exit_superio;
break; break;
case f71869:
/* GPIO14 --> WDTRST# */
superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
break;
case f71882fg: case f71882fg:
/* Set pin 56 to WDTRST# */ /* Set pin 56 to WDTRST# */
superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
@@ -753,6 +760,9 @@ static int __init f71808e_find(int sioaddr)
watchdog.type = f71862fg; watchdog.type = f71862fg;
err = f71862fg_pin_configure(0); /* validate module parameter */ err = f71862fg_pin_configure(0); /* validate module parameter */
break; break;
case SIO_F71869_ID:
watchdog.type = f71869;
break;
case SIO_F71882_ID: case SIO_F71882_ID:
watchdog.type = f71882fg; watchdog.type = f71882fg;
break; break;