x86, setup: "glove box" BIOS interrupts in the core boot code
Impact: BIOS proofing "Glove box" off BIOS interrupts in the core boot code. LKML-Reference: <49DE7F79.4030106@zytor.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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H. Peter Anvin
parent
7a734e7dd9
commit
df7699c564
@@ -2,6 +2,7 @@
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*
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* Copyright (C) 1991, 1992 Linus Torvalds
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* Copyright 2007 rPath, Inc. - All Rights Reserved
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* Copyright 2009 Intel Corporation; author H. Peter Anvin
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*
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* This file is part of the Linux kernel, and is made available under
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* the terms of the GNU General Public License version 2.
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@@ -61,11 +62,10 @@ static void copy_boot_params(void)
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*/
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static void keyboard_set_repeat(void)
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{
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u16 ax = 0x0305;
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u16 bx = 0;
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asm volatile("int $0x16"
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: "+a" (ax), "+b" (bx)
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: : "ecx", "edx", "esi", "edi");
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struct biosregs ireg;
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initregs(&ireg);
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ireg.ax = 0x0305;
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intcall(0x16, &ireg, NULL);
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}
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/*
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@@ -73,18 +73,22 @@ static void keyboard_set_repeat(void)
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*/
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static void query_ist(void)
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{
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struct biosregs ireg, oreg;
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/* Some older BIOSes apparently crash on this call, so filter
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it from machines too old to have SpeedStep at all. */
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if (cpu.level < 6)
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return;
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asm("int $0x15"
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: "=a" (boot_params.ist_info.signature),
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"=b" (boot_params.ist_info.command),
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"=c" (boot_params.ist_info.event),
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"=d" (boot_params.ist_info.perf_level)
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: "a" (0x0000e980), /* IST Support */
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"d" (0x47534943)); /* Request value */
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initregs(&ireg);
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ireg.ax = 0xe980; /* IST Support */
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ireg.edx = 0x47534943; /* Request value */
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intcall(0x15, &ireg, &oreg);
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boot_params.ist_info.signature = oreg.eax;
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boot_params.ist_info.command = oreg.ebx;
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boot_params.ist_info.event = oreg.ecx;
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boot_params.ist_info.perf_level = oreg.edx;
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}
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/*
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@@ -93,13 +97,12 @@ static void query_ist(void)
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static void set_bios_mode(void)
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{
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#ifdef CONFIG_X86_64
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u32 eax, ebx;
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struct biosregs ireg;
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eax = 0xec00;
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ebx = 2;
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asm volatile("int $0x15"
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: "+a" (eax), "+b" (ebx)
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: : "ecx", "edx", "esi", "edi");
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initregs(&ireg);
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ireg.ax = 0xec00;
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ireg.bx = 2;
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intcall(0x15, &ireg, NULL);
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#endif
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}
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