More AP / SP bits for the 34K, the Malta bits and things. Still wants
a little polishing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -502,9 +502,8 @@ void ld_mmu_sb1(void)
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extern char handle_vec2_sb1;
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/* Special cache error handler for SB1 */
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memcpy((void *)(CAC_BASE + 0x100), &except_vec2_sb1, 0x80);
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memcpy((void *)(UNCAC_BASE + 0x100), &except_vec2_sb1, 0x80);
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memcpy((void *)CKSEG1ADDR(&handle_vec2_sb1), &handle_vec2_sb1, 0x80);
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set_uncached_handler (0x100, &except_vec2_sb1, 0x80);
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memcpy((void *)KSEG1ADDR(&handle_vec2_sb1), &handle_vec2_sb1, 0x80);
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probe_cache_sizes();
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