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drm/i915/pch: Cosmetic fix to FDI link training

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Unmask the bits for link training reporting before starting link
training.  If stage 1 training finished before we unmask them, then we'd
spin around in a loop a few times until smashing on through.  Which is
harmless, since training _did_ succeed, it just looks ugly in dmesg.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Adam Jackson
2010-06-25 15:32:14 -04:00
committed by Eric Anholt
parent 2991196fbc
commit e1a4474349
1 changed files with 24 additions and 34 deletions
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58
drivers/gpu/drm/i915/intel_display.c
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@@ -1604,6 +1604,15 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR; int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR;
u32 temp, tries = 0; u32 temp, tries = 0;
/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
for train result */
temp = I915_READ(fdi_rx_imr_reg);
temp &= ~FDI_RX_SYMBOL_LOCK;
temp &= ~FDI_RX_BIT_LOCK;
I915_WRITE(fdi_rx_imr_reg, temp);
I915_READ(fdi_rx_imr_reg);
udelay(150);
/* enable CPU FDI TX and PCH FDI RX */ /* enable CPU FDI TX and PCH FDI RX */
temp = I915_READ(fdi_tx_reg); temp = I915_READ(fdi_tx_reg);
temp |= FDI_TX_ENABLE; temp |= FDI_TX_ENABLE;
@@ -1621,16 +1630,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
I915_READ(fdi_rx_reg); I915_READ(fdi_rx_reg);
udelay(150); udelay(150);
/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit for (tries = 0; tries < 5; tries++) {
for train result */
temp = I915_READ(fdi_rx_imr_reg);
temp &= ~FDI_RX_SYMBOL_LOCK;
temp &= ~FDI_RX_BIT_LOCK;
I915_WRITE(fdi_rx_imr_reg, temp);
I915_READ(fdi_rx_imr_reg);
udelay(150);
for (;;) {
temp = I915_READ(fdi_rx_iir_reg); temp = I915_READ(fdi_rx_iir_reg);
DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp); DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
@@ -1640,14 +1640,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
temp | FDI_RX_BIT_LOCK); temp | FDI_RX_BIT_LOCK);
break; break;
} }
}
tries++; if (tries == 5)
if (tries > 5) {
DRM_DEBUG_KMS("FDI train 1 fail!\n"); DRM_DEBUG_KMS("FDI train 1 fail!\n");
break;
}
}
/* Train 2 */ /* Train 2 */
temp = I915_READ(fdi_tx_reg); temp = I915_READ(fdi_tx_reg);
@@ -1663,7 +1658,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
tries = 0; tries = 0;
for (;;) { for (tries = 0; tries < 5; tries++) {
temp = I915_READ(fdi_rx_iir_reg); temp = I915_READ(fdi_rx_iir_reg);
DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp); DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
@@ -1673,14 +1668,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
DRM_DEBUG_KMS("FDI train 2 done.\n"); DRM_DEBUG_KMS("FDI train 2 done.\n");
break; break;
} }
}
tries++; if (tries == 5)
if (tries > 5) {
DRM_DEBUG_KMS("FDI train 2 fail!\n"); DRM_DEBUG_KMS("FDI train 2 fail!\n");
break;
}
}
DRM_DEBUG_KMS("FDI train done\n"); DRM_DEBUG_KMS("FDI train done\n");
} }
@@ -1705,6 +1695,15 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR; int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR;
u32 temp, i; u32 temp, i;
/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
for train result */
temp = I915_READ(fdi_rx_imr_reg);
temp &= ~FDI_RX_SYMBOL_LOCK;
temp &= ~FDI_RX_BIT_LOCK;
I915_WRITE(fdi_rx_imr_reg, temp);
I915_READ(fdi_rx_imr_reg);
udelay(150);
/* enable CPU FDI TX and PCH FDI RX */ /* enable CPU FDI TX and PCH FDI RX */
temp = I915_READ(fdi_tx_reg); temp = I915_READ(fdi_tx_reg);
temp |= FDI_TX_ENABLE; temp |= FDI_TX_ENABLE;
@@ -1730,15 +1729,6 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
I915_READ(fdi_rx_reg); I915_READ(fdi_rx_reg);
udelay(150); udelay(150);
/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
for train result */
temp = I915_READ(fdi_rx_imr_reg);
temp &= ~FDI_RX_SYMBOL_LOCK;
temp &= ~FDI_RX_BIT_LOCK;
I915_WRITE(fdi_rx_imr_reg, temp);
I915_READ(fdi_rx_imr_reg);
udelay(150);
for (i = 0; i < 4; i++ ) { for (i = 0; i < 4; i++ ) {
temp = I915_READ(fdi_tx_reg); temp = I915_READ(fdi_tx_reg);
temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;