davinci: Add base DA850/OMAP-L138 SoC support
The DA850/OMAP-L138 is a new SoC from TI in the same family as DA830/OMAP-L137. Major changes include better support for power management, support for SATA devices and McBSP (same IP as DM644x). DA850/OMAP-L138 documents are available at http://focus.ti.com/docs/prod/folders/print/omap-l138.html. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Kevin Hilman
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@@ -340,9 +340,66 @@
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#define DA830_N_CP_INTC_IRQ 96
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/* da830 currently has the most gpio pins (128) */
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/* DA850 speicific interrupts */
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#define IRQ_DA850_MPUADDRERR0 27
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#define IRQ_DA850_MPUPROTERR0 27
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#define IRQ_DA850_IOPUADDRERR0 27
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#define IRQ_DA850_IOPUPROTERR0 27
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#define IRQ_DA850_IOPUADDRERR1 27
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#define IRQ_DA850_IOPUPROTERR1 27
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#define IRQ_DA850_IOPUADDRERR2 27
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#define IRQ_DA850_IOPUPROTERR2 27
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#define IRQ_DA850_BOOTCFG_ADDR_ERR 27
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#define IRQ_DA850_BOOTCFG_PROT_ERR 27
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#define IRQ_DA850_MPUADDRERR1 27
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#define IRQ_DA850_MPUPROTERR1 27
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#define IRQ_DA850_IOPUADDRERR3 27
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#define IRQ_DA850_IOPUPROTERR3 27
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#define IRQ_DA850_IOPUADDRERR4 27
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#define IRQ_DA850_IOPUPROTERR4 27
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#define IRQ_DA850_IOPUADDRERR5 27
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#define IRQ_DA850_IOPUPROTERR5 27
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#define IRQ_DA850_MIOPU_BOOTCFG_ERR 27
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#define IRQ_DA850_SATAINT 67
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#define IRQ_DA850_TINT12_2 68
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#define IRQ_DA850_TINT34_2 68
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#define IRQ_DA850_TINTALL_2 68
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#define IRQ_DA850_MMCSDINT0_1 72
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#define IRQ_DA850_MMCSDINT1_1 73
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#define IRQ_DA850_T12CMPINT0_2 74
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#define IRQ_DA850_T12CMPINT1_2 75
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#define IRQ_DA850_T12CMPINT2_2 76
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#define IRQ_DA850_T12CMPINT3_2 77
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#define IRQ_DA850_T12CMPINT4_2 78
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#define IRQ_DA850_T12CMPINT5_2 79
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#define IRQ_DA850_T12CMPINT6_2 80
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#define IRQ_DA850_T12CMPINT7_2 81
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#define IRQ_DA850_T12CMPINT0_3 82
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#define IRQ_DA850_T12CMPINT1_3 83
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#define IRQ_DA850_T12CMPINT2_3 84
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#define IRQ_DA850_T12CMPINT3_3 85
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#define IRQ_DA850_T12CMPINT4_3 86
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#define IRQ_DA850_T12CMPINT5_3 87
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#define IRQ_DA850_T12CMPINT6_3 88
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#define IRQ_DA850_T12CMPINT7_3 89
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#define IRQ_DA850_RPIINT 91
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#define IRQ_DA850_VPIFINT 92
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#define IRQ_DA850_CCINT1 93
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#define IRQ_DA850_CCERRINT1 94
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#define IRQ_DA850_TCERRINT2 95
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#define IRQ_DA850_TINT12_3 96
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#define IRQ_DA850_TINT34_3 96
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#define IRQ_DA850_TINTALL_3 96
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#define IRQ_DA850_MCBSP0RINT 97
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#define IRQ_DA850_MCBSP0XINT 98
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#define IRQ_DA850_MCBSP1RINT 99
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#define IRQ_DA850_MCBSP1XINT 100
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#define DA850_N_CP_INTC_IRQ 101
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/* da830/da850 currently has the most gpio pins (128) */
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#define DAVINCI_N_GPIO 128
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/* da830 currently has the most irqs so use DA830_N_CP_INTC_IRQ */
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#define NR_IRQS (DA830_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
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/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
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#define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
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#endif /* __ASM_ARCH_IRQS_H */
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