ARM: perf: refactor event mapping
Currently mapping an event type to a hardware configuration value depends on the data being pointed to from struct arm_pmu. These fields (cache_map, event_map, raw_event_mask) are currently specific to CPU PMUs, and do not serve the general case well. This patch replaces the event map pointers on struct arm_pmu with a new 'map_event' function pointer. Small shim functions are used to reuse the existing common code. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Ashwin Chaugule <ashwinc@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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committed by
Will Deacon
parent
7ae18a5717
commit
e1f431b57e
@@ -75,11 +75,7 @@ struct arm_pmu {
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void (*start)(void);
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void (*stop)(void);
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void (*reset)(void *);
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const unsigned (*cache_map)[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX];
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const unsigned (*event_map)[PERF_COUNT_HW_MAX];
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u32 raw_event_mask;
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int (*map_event)(struct perf_event *event);
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int num_events;
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atomic_t active_events;
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struct mutex reserve_mutex;
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@@ -129,7 +125,11 @@ EXPORT_SYMBOL_GPL(perf_num_counters);
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#define CACHE_OP_UNSUPPORTED 0xFFFF
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static int
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armpmu_map_cache_event(u64 config)
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armpmu_map_cache_event(const unsigned (*cache_map)
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX],
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u64 config)
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{
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unsigned int cache_type, cache_op, cache_result, ret;
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@@ -145,7 +145,7 @@ armpmu_map_cache_event(u64 config)
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if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
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return -EINVAL;
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ret = (int)(*armpmu->cache_map)[cache_type][cache_op][cache_result];
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ret = (int)(*cache_map)[cache_type][cache_op][cache_result];
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if (ret == CACHE_OP_UNSUPPORTED)
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return -ENOENT;
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@@ -154,16 +154,38 @@ armpmu_map_cache_event(u64 config)
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}
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static int
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armpmu_map_event(u64 config)
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armpmu_map_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config)
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{
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int mapping = (*armpmu->event_map)[config];
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return mapping == HW_OP_UNSUPPORTED ? -EOPNOTSUPP : mapping;
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int mapping = (*event_map)[config];
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return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping;
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}
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static int
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armpmu_map_raw_event(u64 config)
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armpmu_map_raw_event(u32 raw_event_mask, u64 config)
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{
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return (int)(config & armpmu->raw_event_mask);
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return (int)(config & raw_event_mask);
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}
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static int map_cpu_event(struct perf_event *event,
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const unsigned (*event_map)[PERF_COUNT_HW_MAX],
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const unsigned (*cache_map)
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX],
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u32 raw_event_mask)
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{
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u64 config = event->attr.config;
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switch (event->attr.type) {
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case PERF_TYPE_HARDWARE:
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return armpmu_map_event(event_map, config);
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case PERF_TYPE_HW_CACHE:
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return armpmu_map_cache_event(cache_map, config);
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case PERF_TYPE_RAW:
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return armpmu_map_raw_event(raw_event_mask, config);
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}
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return -ENOENT;
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}
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static int
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@@ -484,17 +506,7 @@ __hw_perf_event_init(struct perf_event *event)
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struct hw_perf_event *hwc = &event->hw;
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int mapping, err;
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/* Decode the generic type into an ARM event identifier. */
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if (PERF_TYPE_HARDWARE == event->attr.type) {
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mapping = armpmu_map_event(event->attr.config);
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} else if (PERF_TYPE_HW_CACHE == event->attr.type) {
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mapping = armpmu_map_cache_event(event->attr.config);
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} else if (PERF_TYPE_RAW == event->attr.type) {
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mapping = armpmu_map_raw_event(event->attr.config);
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} else {
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pr_debug("event type %x not supported\n", event->attr.type);
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return -EOPNOTSUPP;
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}
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mapping = armpmu->map_event(event);
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if (mapping < 0) {
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pr_debug("event %x:%llx not supported\n", event->attr.type,
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@@ -550,15 +562,8 @@ static int armpmu_event_init(struct perf_event *event)
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int err = 0;
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atomic_t *active_events = &armpmu->active_events;
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switch (event->attr.type) {
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case PERF_TYPE_RAW:
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case PERF_TYPE_HARDWARE:
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case PERF_TYPE_HW_CACHE:
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break;
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default:
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if (armpmu->map_event(event) == -ENOENT)
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return -ENOENT;
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}
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event->destroy = hw_perf_event_destroy;
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