x86, apic: clean up ->vector_allocation_domain()
- separate the namespace - remove macros - move the default vector-allocation-domain to mach-generic - fix whitespace damage Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
@@ -23,7 +23,6 @@ static inline const struct cpumask *default_target_cpus(void)
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#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
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#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
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#define cpu_mask_to_apicid_and (apic->cpu_mask_to_apicid_and)
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#define cpu_mask_to_apicid_and (apic->cpu_mask_to_apicid_and)
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#define phys_pkg_id (apic->phys_pkg_id)
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#define phys_pkg_id (apic->phys_pkg_id)
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#define vector_allocation_domain (apic->vector_allocation_domain)
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#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
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#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
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#define send_IPI_self (apic->send_IPI_self)
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#define send_IPI_self (apic->send_IPI_self)
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#define wakeup_secondary_cpu (apic->wakeup_cpu)
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#define wakeup_secondary_cpu (apic->wakeup_cpu)
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@@ -89,18 +88,6 @@ static inline int apicid_to_node(int logical_apicid)
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#endif
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#endif
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}
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}
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static inline void vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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*retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
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}
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#endif
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#endif
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static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
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static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
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@@ -15,7 +15,6 @@
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#define check_phys_apicid_present (apic->check_phys_apicid_present)
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#define check_phys_apicid_present (apic->check_phys_apicid_present)
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#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
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#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
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#define cpu_mask_to_apicid_and (apic->cpu_mask_to_apicid_and)
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#define cpu_mask_to_apicid_and (apic->cpu_mask_to_apicid_and)
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#define vector_allocation_domain (apic->vector_allocation_domain)
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#define enable_apic_mode (apic->enable_apic_mode)
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#define enable_apic_mode (apic->enable_apic_mode)
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#define phys_pkg_id (apic->phys_pkg_id)
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#define phys_pkg_id (apic->phys_pkg_id)
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#define wakeup_secondary_cpu (apic->wakeup_cpu)
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#define wakeup_secondary_cpu (apic->wakeup_cpu)
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@@ -1316,7 +1316,7 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
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int new_cpu;
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int new_cpu;
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int vector, offset;
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int vector, offset;
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vector_allocation_domain(cpu, tmp_mask);
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apic->vector_allocation_domain(cpu, tmp_mask);
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vector = current_vector;
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vector = current_vector;
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offset = current_offset;
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offset = current_offset;
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@@ -42,7 +42,7 @@ static const struct dmi_system_id bigsmp_dmi_table[] = {
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{ }
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{ }
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};
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};
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static void vector_allocation_domain(int cpu, cpumask_t *retmask)
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static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask)
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{
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{
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cpus_clear(*retmask);
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cpus_clear(*retmask);
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cpu_set(cpu, *retmask);
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cpu_set(cpu, *retmask);
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@@ -74,7 +74,7 @@ struct genapic apic_bigsmp = {
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.check_apicid_used = bigsmp_check_apicid_used,
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.check_apicid_used = bigsmp_check_apicid_used,
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.check_apicid_present = bigsmp_check_apicid_present,
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.check_apicid_present = bigsmp_check_apicid_present,
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.vector_allocation_domain = vector_allocation_domain,
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.vector_allocation_domain = bigsmp_vector_allocation_domain,
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.init_apic_ldr = init_apic_ldr,
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.init_apic_ldr = init_apic_ldr,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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@@ -18,6 +18,20 @@
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#include <asm/mach-default/mach_mpparse.h>
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#include <asm/mach-default/mach_mpparse.h>
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#include <asm/mach-default/mach_wakecpu.h>
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#include <asm/mach-default/mach_wakecpu.h>
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static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/*
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* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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*retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
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}
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/* should be called last. */
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/* should be called last. */
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static int probe_default(void)
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static int probe_default(void)
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{
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{
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@@ -41,7 +55,7 @@ struct genapic apic_default = {
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.check_apicid_used = default_check_apicid_used,
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.check_apicid_used = default_check_apicid_used,
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.check_apicid_present = default_check_apicid_present,
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.check_apicid_present = default_check_apicid_present,
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.vector_allocation_domain = vector_allocation_domain,
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.vector_allocation_domain = default_vector_allocation_domain,
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.init_apic_ldr = init_apic_ldr,
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.init_apic_ldr = init_apic_ldr,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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@@ -86,7 +86,7 @@ static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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}
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}
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#endif
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#endif
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static void vector_allocation_domain(int cpu, cpumask_t *retmask)
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static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
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{
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* specified in the interrupt destination when using lowest
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@@ -116,7 +116,7 @@ struct genapic apic_es7000 = {
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.check_apicid_used = es7000_check_apicid_used,
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.check_apicid_used = es7000_check_apicid_used,
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.check_apicid_present = es7000_check_apicid_present,
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.check_apicid_present = es7000_check_apicid_present,
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.vector_allocation_domain = vector_allocation_domain,
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.vector_allocation_domain = es7000_vector_allocation_domain,
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.init_apic_ldr = init_apic_ldr,
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.init_apic_ldr = init_apic_ldr,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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@@ -31,7 +31,7 @@ static int probe_numaq(void)
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return found_numaq;
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return found_numaq;
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}
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}
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static void vector_allocation_domain(int cpu, cpumask_t *retmask)
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static void numaq_vector_allocation_domain(int cpu, cpumask_t *retmask)
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{
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* specified in the interrupt destination when using lowest
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@@ -61,7 +61,7 @@ struct genapic apic_numaq = {
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.check_apicid_used = numaq_check_apicid_used,
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.check_apicid_used = numaq_check_apicid_used,
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.check_apicid_present = numaq_check_apicid_present,
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.check_apicid_present = numaq_check_apicid_present,
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.vector_allocation_domain = vector_allocation_domain,
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.vector_allocation_domain = numaq_vector_allocation_domain,
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.init_apic_ldr = init_apic_ldr,
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.init_apic_ldr = init_apic_ldr,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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@@ -24,7 +24,7 @@ static int probe_summit(void)
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return 0;
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return 0;
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}
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}
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static void vector_allocation_domain(int cpu, cpumask_t *retmask)
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static void summit_vector_allocation_domain(int cpu, cpumask_t *retmask)
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{
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* specified in the interrupt destination when using lowest
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@@ -54,7 +54,7 @@ struct genapic apic_summit = {
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.check_apicid_used = summit_check_apicid_used,
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.check_apicid_used = summit_check_apicid_used,
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.check_apicid_present = summit_check_apicid_present,
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.check_apicid_present = summit_check_apicid_present,
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.vector_allocation_domain = vector_allocation_domain,
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.vector_allocation_domain = summit_vector_allocation_domain,
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.init_apic_ldr = init_apic_ldr,
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.init_apic_ldr = init_apic_ldr,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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.ioapic_phys_id_map = ioapic_phys_id_map,
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