spi/dw_spi: clean the cs_control code
commit 052dc7c45i "spi/dw_spi: conditional transfer mode change" introduced cs_control code, which has a bug by using bit offset for spi mode to set transfer mode in control register. Also it forces devices who don't need cs_control to re-configure the control registers for each spi transfer. This patch will fix them Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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@@ -14,7 +14,9 @@
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#define SPI_MODE_OFFSET 6
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#define SPI_SCPH_OFFSET 6
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#define SPI_SCOL_OFFSET 7
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#define SPI_TMOD_OFFSET 8
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#define SPI_TMOD_MASK (0x3 << SPI_TMOD_OFFSET)
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#define SPI_TMOD_TR 0x0 /* xmit & recv */
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#define SPI_TMOD_TO 0x1 /* xmit only */
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#define SPI_TMOD_RO 0x2 /* recv only */
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