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gpio/omap: cleanup show revision, remove cpu_is checks, display only once

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Remove cpu_is_* checks from gpio_show_revision() by passing in the
revision address offset from platform data.  SoCs with no revision
register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to
signify no register.

While here, all GPIO banks are assumed to be the same revision, so fix
show_revision() to only show the revision for the first bank it finds.
This removes duplicate GPIO revision prints during boot.

Thanks to Charulatha V <charu@ti.com> for finding/fixing a few -1s
that were missed in the original patch.

Signed-off-by: Kevin Hilman <khilman@ti.com>
This commit is contained in:
Kevin Hilman
2011-04-22 14:37:16 -07:00
parent 9942da0e4b
commit e5ff4440cf
6 changed files with 15 additions and 8 deletions
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14
drivers/gpio/gpio-omap.c
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@@ -984,19 +984,17 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
static void __init omap_gpio_show_rev(struct gpio_bank *bank)
{
static bool called;
u32 rev;
if (cpu_is_omap16xx() && !(bank->method != METHOD_MPUIO))
rev = __raw_readw(bank->base + OMAP1610_GPIO_REVISION);
else if (cpu_is_omap24xx() || cpu_is_omap34xx())
rev = __raw_readl(bank->base + OMAP24XX_GPIO_REVISION);
else if (cpu_is_omap44xx())
rev = __raw_readl(bank->base + OMAP4_GPIO_REVISION);
else
if (called || bank->regs->revision == USHRT_MAX)
return;
printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
rev = __raw_readw(bank->base + bank->regs->revision);
pr_info("OMAP GPIO hardware version %d.%d\n",
(rev >> 4) & 0x0f, rev & 0x0f);
called = true;
}
/* This lock class tells lockdep that GPIO irqs are in a different