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MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2005-12-08 13:00:20 +00:00
committed by
parent 571e0bed85
commit e7958bb90d
4 changed files with 16 additions and 19 deletions
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4
arch/mips/mm/c-r4k.c
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@@ -1183,8 +1183,8 @@ static void __init setup_scache(void)
if (!sc_present)
return;
if ((c->isa_level == MIPS_CPU_ISA_M32 ||
c->isa_level == MIPS_CPU_ISA_M64) &&
if ((c->isa_level == MIPS_CPU_ISA_M32R1 ||
c->isa_level == MIPS_CPU_ISA_M64R1) &&
!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
panic("Dunno how to handle MIPS32 / MIPS64 second level cache");