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[MIPS] Put an end to <asm/serial.h>'s long and annyoing existence

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2007-07-10 17:33:01 +01:00
parent 192cca6ef2
commit e7c4782f92
15 changed files with 371 additions and 151 deletions
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36
arch/mips/sgi-ip32/ip32-setup.c
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@@ -62,12 +62,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
}
#endif
#ifdef CONFIG_SERIAL_8250
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#endif /* CONFIG_SERIAL_8250 */
/* An arbitrary time; this can be decreased if reliability looks good */
#define WAIT_MS 10
@@ -96,36 +90,6 @@ void __init plat_mem_setup(void)
board_time_init = ip32_time_init;
#ifdef CONFIG_SERIAL_8250
{
static struct uart_port o2_serial[2];
memset(o2_serial, 0, sizeof(o2_serial));
o2_serial[0].type = PORT_16550A;
o2_serial[0].line = 0;
o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
o2_serial[0].flags = UPF_SKIP_TEST;
o2_serial[0].uartclk = 1843200;
o2_serial[0].iotype = UPIO_MEM;
o2_serial[0].membase = (char *)&mace->isa.serial1;
o2_serial[0].fifosize = 14;
/* How much to shift register offset by. Each UART register
* is replicated over 256 byte space */
o2_serial[0].regshift = 8;
o2_serial[1].type = PORT_16550A;
o2_serial[1].line = 1;
o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
o2_serial[1].flags = UPF_SKIP_TEST;
o2_serial[1].uartclk = 1843200;
o2_serial[1].iotype = UPIO_MEM;
o2_serial[1].membase = (char *)&mace->isa.serial2;
o2_serial[1].fifosize = 14;
o2_serial[1].regshift = 8;
early_serial_setup(&o2_serial[0]);
early_serial_setup(&o2_serial[1]);
}
#endif
#ifdef CONFIG_SGI_O2MACE_ETH
{
char *mac = ArcGetEnvironmentVariable("eaddr");