ARM: GIC: move gic_chip_data structure declaration to header
Since Samsung EXYNOS4210 cannot support register banking in GIC, so needs to update CPU interface base address. The 'gic_chip_data' is used for it, this patch moves gic_chip_data structure declaraton to arch/arm/include/asm/hardware/gic.h to use it. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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committed by
Kukjin Kim
parent
a8769a594a
commit
e807acbc6f
@@ -38,12 +38,6 @@ static DEFINE_SPINLOCK(irq_controller_lock);
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/* Address of GIC 0 CPU interface */
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/* Address of GIC 0 CPU interface */
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void __iomem *gic_cpu_base_addr __read_mostly;
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void __iomem *gic_cpu_base_addr __read_mostly;
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struct gic_chip_data {
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unsigned int irq_offset;
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void __iomem *dist_base;
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void __iomem *cpu_base;
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};
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/*
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/*
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* Supported arch specific GIC irq extension.
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* Supported arch specific GIC irq extension.
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* Default make them NULL.
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* Default make them NULL.
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@@ -41,6 +41,12 @@ void gic_secondary_init(unsigned int);
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void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
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void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
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void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
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void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
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void gic_enable_ppi(unsigned int);
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void gic_enable_ppi(unsigned int);
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struct gic_chip_data {
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unsigned int irq_offset;
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void __iomem *dist_base;
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void __iomem *cpu_base;
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};
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#endif
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#endif
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#endif
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#endif
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