MIPS: Alchemy: rename directory
It's more than the au1000 these days. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
189
arch/mips/alchemy/common/reset.c
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189
arch/mips/alchemy/common/reset.c
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/*
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*
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* BRIEF MODULE DESCRIPTION
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* Au1xx0 reset routines.
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*
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* Copyright 2001, 2006, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <asm/cacheflush.h>
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#include <asm/mach-au1x00/au1000.h>
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extern int au_sleep(void);
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void au1000_restart(char *command)
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{
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/* Set all integrated peripherals to disabled states */
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extern void board_reset(void);
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u32 prid = read_c0_prid();
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printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
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switch (prid & 0xFF000000) {
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case 0x00000000: /* Au1000 */
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au_writel(0x02, 0xb0000010); /* ac97_enable */
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au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
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asm("sync");
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au_writel(0x00, 0xb017fffc); /* usbh_enable */
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au_writel(0x00, 0xb0200058); /* usbd_enable */
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au_writel(0x00, 0xb0300040); /* ir_enable */
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au_writel(0x00, 0xb4004104); /* mac dma */
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au_writel(0x00, 0xb4004114); /* mac dma */
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au_writel(0x00, 0xb4004124); /* mac dma */
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au_writel(0x00, 0xb4004134); /* mac dma */
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au_writel(0x00, 0xb0520000); /* macen0 */
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au_writel(0x00, 0xb0520004); /* macen1 */
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au_writel(0x00, 0xb1000008); /* i2s_enable */
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au_writel(0x00, 0xb1100100); /* uart0_enable */
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au_writel(0x00, 0xb1200100); /* uart1_enable */
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au_writel(0x00, 0xb1300100); /* uart2_enable */
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au_writel(0x00, 0xb1400100); /* uart3_enable */
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au_writel(0x02, 0xb1600100); /* ssi0_enable */
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au_writel(0x02, 0xb1680100); /* ssi1_enable */
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au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
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au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
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au_writel(0x00, 0xb1900028); /* sys_clksrc */
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au_writel(0x10, 0xb1900060); /* sys_cpupll */
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au_writel(0x00, 0xb1900064); /* sys_auxpll */
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au_writel(0x00, 0xb1900100); /* sys_pininputen */
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break;
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case 0x01000000: /* Au1500 */
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au_writel(0x02, 0xb0000010); /* ac97_enable */
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au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
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asm("sync");
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au_writel(0x00, 0xb017fffc); /* usbh_enable */
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au_writel(0x00, 0xb0200058); /* usbd_enable */
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au_writel(0x00, 0xb4004104); /* mac dma */
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au_writel(0x00, 0xb4004114); /* mac dma */
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au_writel(0x00, 0xb4004124); /* mac dma */
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au_writel(0x00, 0xb4004134); /* mac dma */
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au_writel(0x00, 0xb1520000); /* macen0 */
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au_writel(0x00, 0xb1520004); /* macen1 */
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au_writel(0x00, 0xb1100100); /* uart0_enable */
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au_writel(0x00, 0xb1400100); /* uart3_enable */
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au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
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au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
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au_writel(0x00, 0xb1900028); /* sys_clksrc */
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au_writel(0x10, 0xb1900060); /* sys_cpupll */
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au_writel(0x00, 0xb1900064); /* sys_auxpll */
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au_writel(0x00, 0xb1900100); /* sys_pininputen */
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break;
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case 0x02000000: /* Au1100 */
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au_writel(0x02, 0xb0000010); /* ac97_enable */
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au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
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asm("sync");
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au_writel(0x00, 0xb017fffc); /* usbh_enable */
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au_writel(0x00, 0xb0200058); /* usbd_enable */
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au_writel(0x00, 0xb0300040); /* ir_enable */
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au_writel(0x00, 0xb4004104); /* mac dma */
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au_writel(0x00, 0xb4004114); /* mac dma */
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au_writel(0x00, 0xb4004124); /* mac dma */
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au_writel(0x00, 0xb4004134); /* mac dma */
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au_writel(0x00, 0xb0520000); /* macen0 */
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au_writel(0x00, 0xb1000008); /* i2s_enable */
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au_writel(0x00, 0xb1100100); /* uart0_enable */
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au_writel(0x00, 0xb1200100); /* uart1_enable */
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au_writel(0x00, 0xb1400100); /* uart3_enable */
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au_writel(0x02, 0xb1600100); /* ssi0_enable */
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au_writel(0x02, 0xb1680100); /* ssi1_enable */
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au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
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au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
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au_writel(0x00, 0xb1900028); /* sys_clksrc */
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au_writel(0x10, 0xb1900060); /* sys_cpupll */
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au_writel(0x00, 0xb1900064); /* sys_auxpll */
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au_writel(0x00, 0xb1900100); /* sys_pininputen */
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break;
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case 0x03000000: /* Au1550 */
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au_writel(0x00, 0xb1a00004); /* psc 0 */
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au_writel(0x00, 0xb1b00004); /* psc 1 */
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au_writel(0x00, 0xb0a00004); /* psc 2 */
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au_writel(0x00, 0xb0b00004); /* psc 3 */
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au_writel(0x00, 0xb017fffc); /* usbh_enable */
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au_writel(0x00, 0xb0200058); /* usbd_enable */
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au_writel(0x00, 0xb4004104); /* mac dma */
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au_writel(0x00, 0xb4004114); /* mac dma */
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au_writel(0x00, 0xb4004124); /* mac dma */
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au_writel(0x00, 0xb4004134); /* mac dma */
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au_writel(0x00, 0xb1520000); /* macen0 */
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au_writel(0x00, 0xb1520004); /* macen1 */
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au_writel(0x00, 0xb1100100); /* uart0_enable */
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au_writel(0x00, 0xb1200100); /* uart1_enable */
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au_writel(0x00, 0xb1400100); /* uart3_enable */
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au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
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au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
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au_writel(0x00, 0xb1900028); /* sys_clksrc */
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au_writel(0x10, 0xb1900060); /* sys_cpupll */
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au_writel(0x00, 0xb1900064); /* sys_auxpll */
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au_writel(0x00, 0xb1900100); /* sys_pininputen */
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break;
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}
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set_c0_status(ST0_BEV | ST0_ERL);
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change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
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flush_cache_all();
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write_c0_wired(0);
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/* Give board a chance to do a hardware reset */
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board_reset();
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/* Jump to the beggining in case board_reset() is empty */
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__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
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}
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void au1000_halt(void)
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{
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#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
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/* Power off system */
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printk(KERN_NOTICE "\n** Powering off...\n");
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au_writew(au_readw(0xAF00001C) | (3 << 14), 0xAF00001C);
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au_sync();
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while (1); /* should not get here */
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#else
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printk(KERN_NOTICE "\n** You can safely turn off the power\n");
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#ifdef CONFIG_MIPS_MIRAGE
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au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
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#endif
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#ifdef CONFIG_MIPS_DB1200
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au_writew(au_readw(0xB980001C) | (1 << 14), 0xB980001C);
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#endif
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#ifdef CONFIG_PM
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au_sleep();
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/* Should not get here */
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printk(KERN_ERR "Unable to put CPU in sleep mode\n");
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while (1);
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#else
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while (1)
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__asm__(".set\tmips3\n\t"
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"wait\n\t"
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".set\tmips0");
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#endif
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#endif /* defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) */
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}
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void au1000_power_off(void)
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{
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au1000_halt();
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}
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