ARM: pm: preallocate a page table for suspend/resume
Preallocate a page table and setup an identity mapping for the MMU enable code. This means we don't have to "borrow" a page table to do this, avoiding complexities with L2 cache coherency. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -192,10 +192,6 @@ ENTRY(cpu_sa1100_do_resume)
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mcr p15, 0, r5, c2, c0, 0 @ translation table base addr
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mcr p15, 0, r6, c13, c0, 0 @ PID
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mov r0, r7 @ control register
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mov r2, r5, lsr #14 @ get TTB0 base
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mov r2, r2, lsl #14
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ldr r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \
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PMD_SECT_CACHEABLE | PMD_SECT_AP_WRITE
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b cpu_resume_mmu
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ENDPROC(cpu_sa1100_do_resume)
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#endif
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