omap3evm: ehci: Update EHCI support on OMAP3EVM (Rev >= E)
Added runtime programming for the differences in EHCI interface between OMAP3EVM revisions (Rev >= E) and (Rev < E). Changes: - EHCI PHY reset GPIO pin is 21 on Rev >= E while Rev < E uses GPIO pin 135. - Rev >= E uses EHCI Vbus enable GPIO22 line. - Rev >= E uses GPIO61 to select EHCI port either on main board or on Mistral Daughter Card (MDC). OMAP3EVM Rev < E doesn't have EHCI port on main board. - Currently GPIO61 it programmed to enable EHCI port on main board only. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
This commit is contained in:
committed by
Tony Lindgren
parent
db408023b8
commit
e8e51d2920
@@ -676,13 +676,19 @@ CONFIG_INPUT_EVDEV=y
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# Input Device Drivers
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# Input Device Drivers
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#
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#
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CONFIG_INPUT_KEYBOARD=y
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CONFIG_INPUT_KEYBOARD=y
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# CONFIG_KEYBOARD_ADP5588 is not set
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# CONFIG_KEYBOARD_ATKBD is not set
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# CONFIG_KEYBOARD_ATKBD is not set
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# CONFIG_KEYBOARD_SUNKBD is not set
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# CONFIG_QT2160 is not set
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# CONFIG_KEYBOARD_LKKBD is not set
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# CONFIG_KEYBOARD_LKKBD is not set
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# CONFIG_KEYBOARD_XTKBD is not set
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# CONFIG_KEYBOARD_NEWTON is not set
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# CONFIG_KEYBOARD_STOWAWAY is not set
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# CONFIG_KEYBOARD_GPIO is not set
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# CONFIG_KEYBOARD_GPIO is not set
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# CONFIG_KEYBOARD_MATRIX is not set
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# CONFIG_KEYBOARD_MAX7359 is not set
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# CONFIG_KEYBOARD_NEWTON is not set
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# CONFIG_KEYBOARD_OPENCORES is not set
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# CONFIG_KEYBOARD_STOWAWAY is not set
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# CONFIG_KEYBOARD_SUNKBD is not set
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CONFIG_KEYBOARD_TWL4030=y
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# CONFIG_KEYBOARD_XTKBD is not set
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# CONFIG_INPUT_MOUSE is not set
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# CONFIG_INPUT_MOUSE is not set
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# CONFIG_INPUT_JOYSTICK is not set
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# CONFIG_INPUT_JOYSTICK is not set
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# CONFIG_INPUT_TABLET is not set
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# CONFIG_INPUT_TABLET is not set
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@@ -43,6 +43,8 @@
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#include "mmc-twl4030.h"
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#include "mmc-twl4030.h"
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#define OMAP3_EVM_TS_GPIO 175
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#define OMAP3_EVM_TS_GPIO 175
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#define OMAP3_EVM_EHCI_VBUS 22
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#define OMAP3_EVM_EHCI_SELECT 61
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#define OMAP3EVM_ETHR_START 0x2c000000
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#define OMAP3EVM_ETHR_START 0x2c000000
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#define OMAP3EVM_ETHR_SIZE 1024
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#define OMAP3EVM_ETHR_SIZE 1024
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@@ -347,8 +349,9 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
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.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
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.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
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.phy_reset = true,
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.phy_reset = true,
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/* PHY reset GPIO will be runtime programmed based on EVM version */
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.reset_gpio_port[0] = -EINVAL,
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.reset_gpio_port[0] = -EINVAL,
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.reset_gpio_port[1] = 135,
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.reset_gpio_port[1] = -EINVAL,
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.reset_gpio_port[2] = -EINVAL
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.reset_gpio_port[2] = -EINVAL
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};
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};
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@@ -368,9 +371,29 @@ static void __init omap3_evm_init(void)
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/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
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/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
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usb_nop_xceiv_register();
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usb_nop_xceiv_register();
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#endif
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#endif
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if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
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/* enable EHCI VBUS using GPIO22 */
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omap_cfg_reg(AF9_34XX_GPIO22);
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gpio_request(OMAP3_EVM_EHCI_VBUS, "enable EHCI VBUS");
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gpio_direction_output(OMAP3_EVM_EHCI_VBUS, 0);
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gpio_set_value(OMAP3_EVM_EHCI_VBUS, 1);
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/* Select EHCI port on main board */
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omap_cfg_reg(U3_34XX_GPIO61);
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gpio_request(OMAP3_EVM_EHCI_SELECT, "select EHCI port");
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gpio_direction_output(OMAP3_EVM_EHCI_SELECT, 0);
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gpio_set_value(OMAP3_EVM_EHCI_SELECT, 0);
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/* setup EHCI phy reset config */
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omap_cfg_reg(AH14_34XX_GPIO21);
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ehci_pdata.reset_gpio_port[1] = 21;
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} else {
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/* setup EHCI phy reset on MDC */
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omap_cfg_reg(AF4_34XX_GPIO135_OUT);
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ehci_pdata.reset_gpio_port[1] = 135;
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}
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usb_musb_init();
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usb_musb_init();
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/* Setup EHCI phy reset padconfig */
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omap_cfg_reg(AF4_34XX_GPIO135_OUT);
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usb_ehci_init(&ehci_pdata);
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usb_ehci_init(&ehci_pdata);
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ads7846_dev_init();
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ads7846_dev_init();
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}
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}
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@@ -559,6 +559,13 @@ MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
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MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0,
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MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0,
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OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP |
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OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP |
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OMAP34XX_MUX_MODE0)
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OMAP34XX_MUX_MODE0)
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/* EHCI GPIO's on OMAP3EVM (Rev >= E) */
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MUX_CFG_34XX("AH14_34XX_GPIO21", 0x5ea,
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OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
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MUX_CFG_34XX("AF9_34XX_GPIO22", 0x5ec,
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OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
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MUX_CFG_34XX("U3_34XX_GPIO61", 0x0c8,
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OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
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};
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};
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#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
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#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
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@@ -849,6 +849,11 @@ enum omap34xx_index {
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/* SYS_NIRQ T2 INT1 */
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/* SYS_NIRQ T2 INT1 */
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AF26_34XX_SYS_NIRQ,
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AF26_34XX_SYS_NIRQ,
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/* EHCI GPIO's for OMAP3EVM (Rev >= E) */
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AH14_34XX_GPIO21,
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AF9_34XX_GPIO22,
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U3_34XX_GPIO61,
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};
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};
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struct omap_mux_cfg {
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struct omap_mux_cfg {
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