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[PATCH] Add Wake on LAN support to sis900 (2)

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Sorry, but that day I had smoked somthing too heavy for me, the patch
didn't apply. Here's a new one.

The patch availble below adds support for Wake on LAN to the sis900
driver. Some register addresses were added to sis900.h and two new
functions were implemented in sis900.c. WoL status is controlled by
ethtool.
Patch is against 2.6.13.

Comments are welcome, but also consider for inclusion in the -mm series.

Signed-off-by: Daniele Venzano <venza@brownhat.org>

--
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This commit is contained in:
Daniele Venzano
2005-10-11 09:44:30 +02:00
committed by Jeff Garzik
parent 7380a78a97
commit ea37ccea66
2 changed files with 116 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

45
drivers/net/sis900.h
View File

@@ -33,6 +33,7 @@ enum sis900_registers {
rxcfg=0x34, //Receive Configuration Register
flctrl=0x38, //Flow Control Register
rxlen=0x3c, //Receive Packet Length Register
cfgpmcsr=0x44, //Configuration Power Management Control/Status Register
rfcr=0x48, //Receive Filter Control Register
rfdr=0x4C, //Receive Filter Data Register
pmctrl=0xB0, //Power Management Control Register
@@ -140,6 +141,50 @@ enum sis96x_eeprom_command {
EEREQ = 0x00000400, EEDONE = 0x00000200, EEGNT = 0x00000100
};
/* PCI Registers */
enum sis900_pci_registers {
CFGPMC = 0x40,
CFGPMCSR = 0x44
};
/* Power management capabilities bits */
enum sis900_cfgpmc_register_bits {
PMVER = 0x00070000,
DSI = 0x00100000,
PMESP = 0xf8000000
};
enum sis900_pmesp_bits {
PME_D0 = 0x1,
PME_D1 = 0x2,
PME_D2 = 0x4,
PME_D3H = 0x8,
PME_D3C = 0x10
};
/* Power management control/status bits */
enum sis900_cfgpmcsr_register_bits {
PMESTS = 0x00004000,
PME_EN = 0x00000100, // Power management enable
PWR_STA = 0x00000003 // Current power state
};
/* Wake-on-LAN support. */
enum sis900_power_management_control_register_bits {
LINKLOSS = 0x00000001,
LINKON = 0x00000002,
MAGICPKT = 0x00000400,
ALGORITHM = 0x00000800,
FRM1EN = 0x00100000,
FRM2EN = 0x00200000,
FRM3EN = 0x00400000,
FRM1ACS = 0x01000000,
FRM2ACS = 0x02000000,
FRM3ACS = 0x04000000,
WAKEALL = 0x40000000,
GATECLK = 0x80000000
};
/* Management Data I/O (mdio) frame */
#define MIIread 0x6000
#define MIIwrite 0x5002