[POWERPC] FSL: Add support for PCI-X controllers
Some set of 85xx platforms have PCI-X controllers. The old arch/ppc code setup these controllers and we haven't moved it over to arch/powerpc. We use the PCI-X Capabilties to know if we are in PCI-X mode instead of the Global Utilities PORDEVSR. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@@ -89,11 +89,22 @@ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc)
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void __init setup_pci_cmd(struct pci_controller *hose)
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void __init setup_pci_cmd(struct pci_controller *hose)
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{
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{
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u16 cmd;
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u16 cmd;
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int cap_x;
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early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
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early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
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cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
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cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
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| PCI_COMMAND_IO;
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| PCI_COMMAND_IO;
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early_write_config_word(hose, 0, 0, PCI_COMMAND, cmd);
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early_write_config_word(hose, 0, 0, PCI_COMMAND, cmd);
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cap_x = early_find_capability(hose, 0, 0, PCI_CAP_ID_PCIX);
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if (cap_x) {
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int pci_x_cmd = cap_x + PCI_X_CMD;
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cmd = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
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| PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
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early_write_config_word(hose, 0, 0, pci_x_cmd, cmd);
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} else {
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early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80);
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early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80);
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}
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}
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}
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static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev)
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static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev)
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