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Staging: vt6655: Convert C99 style comments, remove spaces between function definitions and parenthesis

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Converted C99 style comments to kernel style guideline complianet
comments.  Removed spaces between function definitions and parenthesis.
These were indicated as problems by checkpatch tool.

Fixed typo found by Gabor Stefanik

Signed-off-by: Steven Harms <sharms@ubuntu.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Steven Harms
2010-03-18 10:15:59 -04:00
committed by Greg Kroah-Hartman
parent f4d52b072d
commit ec8f002e6d
1 changed files with 25 additions and 25 deletions
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28
drivers/staging/vt6655/srom.c
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@@ -85,15 +85,15 @@ BYTE SROMbyReadEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset)
byData = 0xFF; byData = 0xFF;
VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
// turn off hardware retry for getting NACK /* turn off hardware retry for getting NACK */
VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY))); VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) { for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) {
VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID); VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset); VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
// issue read command /* issue read command */
VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR); VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR);
// wait DONE be set /* wait DONE be set */
for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) { for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) {
VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
if (byWait & (I2MCSR_DONE | I2MCSR_NACK)) if (byWait & (I2MCSR_DONE | I2MCSR_NACK))
@@ -133,16 +133,16 @@ BOOL SROMbWriteEmbedded (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byData)
BYTE byOrg; BYTE byOrg;
VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
// turn off hardware retry for getting NACK /* turn off hardware retry for getting NACK */
VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY))); VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) { for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) {
VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID); VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset); VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
VNSvOutPortB(dwIoBase + MAC_REG_I2MDOPT, byData); VNSvOutPortB(dwIoBase + MAC_REG_I2MDOPT, byData);
// issue write command /* issue write command */
VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMW); VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMW);
// wait DONE be set /* wait DONE be set */
for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) { for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) {
VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
if (byWait & (I2MCSR_DONE | I2MCSR_NACK)) if (byWait & (I2MCSR_DONE | I2MCSR_NACK))
@@ -270,7 +270,7 @@ void SROMvReadAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs)
{ {
int ii; int ii;
// ii = Rom Address /* ii = Rom Address */
for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
*pbyEepromRegs = SROMbyReadEmbedded(dwIoBase,(BYTE) ii); *pbyEepromRegs = SROMbyReadEmbedded(dwIoBase,(BYTE) ii);
pbyEepromRegs++; pbyEepromRegs++;
@@ -295,7 +295,7 @@ void SROMvWriteAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs)
{ {
int ii; int ii;
// ii = Rom Address /* ii = Rom Address */
for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
SROMbWriteEmbedded(dwIoBase,(BYTE) ii, *pbyEepromRegs); SROMbWriteEmbedded(dwIoBase,(BYTE) ii, *pbyEepromRegs);
pbyEepromRegs++; pbyEepromRegs++;
@@ -319,7 +319,7 @@ void SROMvReadEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress)
{ {
BYTE ii; BYTE ii;
// ii = Rom Address /* ii = Rom Address */
for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) { for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) {
*pbyEtherAddress = SROMbyReadEmbedded(dwIoBase, ii); *pbyEtherAddress = SROMbyReadEmbedded(dwIoBase, ii);
pbyEtherAddress++; pbyEtherAddress++;
@@ -344,7 +344,7 @@ void SROMvWriteEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress)
{ {
BYTE ii; BYTE ii;
// ii = Rom Address /* ii = Rom Address */
for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) { for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) {
SROMbWriteEmbedded(dwIoBase, ii, *pbyEtherAddress); SROMbWriteEmbedded(dwIoBase, ii, *pbyEtherAddress);
pbyEtherAddress++; pbyEtherAddress++;
@@ -369,10 +369,10 @@ void SROMvReadSubSysVenId (DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId)
PBYTE pbyData; PBYTE pbyData;
pbyData = (PBYTE)pdwSubSysVenId; pbyData = (PBYTE)pdwSubSysVenId;
// sub vendor /* sub vendor */
*pbyData = SROMbyReadEmbedded(dwIoBase, 6); *pbyData = SROMbyReadEmbedded(dwIoBase, 6);
*(pbyData+1) = SROMbyReadEmbedded(dwIoBase, 7); *(pbyData+1) = SROMbyReadEmbedded(dwIoBase, 7);
// sub system /* sub system */
*(pbyData+2) = SROMbyReadEmbedded(dwIoBase, 8); *(pbyData+2) = SROMbyReadEmbedded(dwIoBase, 8);
*(pbyData+3) = SROMbyReadEmbedded(dwIoBase, 9); *(pbyData+3) = SROMbyReadEmbedded(dwIoBase, 9);
} }
@@ -397,12 +397,12 @@ BOOL SROMbAutoLoad (DWORD_PTR dwIoBase)
BYTE byOrg; BYTE byOrg;
VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
// turn on hardware retry /* turn on hardware retry */
VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg | I2MCFG_NORETRY)); VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg | I2MCFG_NORETRY));
MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD); MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD);
// ii = Rom Address /* ii = Rom Address */
for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
MACvTimer0MicroSDelay(dwIoBase, CB_EEPROM_READBYTE_WAIT); MACvTimer0MicroSDelay(dwIoBase, CB_EEPROM_READBYTE_WAIT);
VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);