OMAP: Fix indentation issues in l3 error handler.
The indentation problems in the l3 noc and smx error handler files are fixed. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com>
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committed by
Santosh Shilimkar
parent
c1df2dcc90
commit
ed0e352073
@ -1,26 +1,26 @@
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/*
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* OMAP3XXX L3 Interconnect Driver header
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*
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* Copyright (C) 2011 Texas Corporation
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* Felipe Balbi <balbi@ti.com>
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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* sricharan <r.sricharan@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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* USA
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*/
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/*
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* OMAP3XXX L3 Interconnect Driver header
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*
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* Copyright (C) 2011 Texas Corporation
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* Felipe Balbi <balbi@ti.com>
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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* sricharan <r.sricharan@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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* USA
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
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#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
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@ -78,32 +78,32 @@ static const u64 shift = 1;
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#define L3_STATUS_0_L4EMUTA_REQ (shift << 60)
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#define L3_STATUS_0_MAD2DTA_REQ (shift << 61)
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#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \
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| L3_STATUS_0_MPUIA_RSP \
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| L3_STATUS_0_IVAIA_BRST \
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| L3_STATUS_0_IVAIA_RSP \
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| L3_STATUS_0_SGXIA_BRST \
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| L3_STATUS_0_SGXIA_RSP \
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| L3_STATUS_0_CAMIA_BRST \
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| L3_STATUS_0_CAMIA_RSP \
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| L3_STATUS_0_DISPIA_BRST \
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| L3_STATUS_0_DISPIA_RSP \
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| L3_STATUS_0_DMARDIA_BRST \
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| L3_STATUS_0_DMARDIA_RSP \
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| L3_STATUS_0_DMAWRIA_BRST \
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| L3_STATUS_0_DMAWRIA_RSP \
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| L3_STATUS_0_USBOTGIA_BRST \
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| L3_STATUS_0_USBOTGIA_RSP \
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| L3_STATUS_0_USBHOSTIA_BRST \
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| L3_STATUS_0_SMSTA_REQ \
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| L3_STATUS_0_GPMCTA_REQ \
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| L3_STATUS_0_OCMRAMTA_REQ \
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| L3_STATUS_0_OCMROMTA_REQ \
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| L3_STATUS_0_IVATA_REQ \
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| L3_STATUS_0_SGXTA_REQ \
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| L3_STATUS_0_L4CORETA_REQ \
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| L3_STATUS_0_L4PERTA_REQ \
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| L3_STATUS_0_L4EMUTA_REQ \
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#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \
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| L3_STATUS_0_MPUIA_RSP \
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| L3_STATUS_0_IVAIA_BRST \
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| L3_STATUS_0_IVAIA_RSP \
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| L3_STATUS_0_SGXIA_BRST \
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| L3_STATUS_0_SGXIA_RSP \
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| L3_STATUS_0_CAMIA_BRST \
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| L3_STATUS_0_CAMIA_RSP \
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| L3_STATUS_0_DISPIA_BRST \
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| L3_STATUS_0_DISPIA_RSP \
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| L3_STATUS_0_DMARDIA_BRST \
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| L3_STATUS_0_DMARDIA_RSP \
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| L3_STATUS_0_DMAWRIA_BRST \
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| L3_STATUS_0_DMAWRIA_RSP \
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| L3_STATUS_0_USBOTGIA_BRST \
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| L3_STATUS_0_USBOTGIA_RSP \
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| L3_STATUS_0_USBHOSTIA_BRST \
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| L3_STATUS_0_SMSTA_REQ \
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| L3_STATUS_0_GPMCTA_REQ \
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| L3_STATUS_0_OCMRAMTA_REQ \
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| L3_STATUS_0_OCMROMTA_REQ \
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| L3_STATUS_0_IVATA_REQ \
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| L3_STATUS_0_SGXTA_REQ \
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| L3_STATUS_0_L4CORETA_REQ \
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| L3_STATUS_0_L4PERTA_REQ \
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| L3_STATUS_0_L4EMUTA_REQ \
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| L3_STATUS_0_MAD2DTA_REQ)
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#define L3_SI_FLAG_STATUS_1 0x530
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@ -137,19 +137,19 @@ static const u64 shift = 1;
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enum omap3_l3_initiator_id {
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/* LCD has 1 ID */
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OMAP_L3_LCD = 29,
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OMAP_L3_LCD = 29,
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/* SAD2D has 1 ID */
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OMAP_L3_SAD2D = 28,
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OMAP_L3_SAD2D = 28,
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/* MPU has 5 IDs */
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OMAP_L3_IA_MPU_SS_1 = 27,
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OMAP_L3_IA_MPU_SS_2 = 26,
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OMAP_L3_IA_MPU_SS_3 = 25,
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OMAP_L3_IA_MPU_SS_4 = 24,
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OMAP_L3_IA_MPU_SS_5 = 23,
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OMAP_L3_IA_MPU_SS_1 = 27,
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OMAP_L3_IA_MPU_SS_2 = 26,
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OMAP_L3_IA_MPU_SS_3 = 25,
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OMAP_L3_IA_MPU_SS_4 = 24,
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OMAP_L3_IA_MPU_SS_5 = 23,
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/* IVA2.2 SS has 3 IDs*/
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OMAP_L3_IA_IVA_SS_1 = 22,
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OMAP_L3_IA_IVA_SS_2 = 21,
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OMAP_L3_IA_IVA_SS_3 = 20,
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OMAP_L3_IA_IVA_SS_1 = 22,
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OMAP_L3_IA_IVA_SS_2 = 21,
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OMAP_L3_IA_IVA_SS_3 = 20,
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/* IVA 2.2 SS DMA has 6 IDS */
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OMAP_L3_IA_IVA_SS_DMA_1 = 19,
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OMAP_L3_IA_IVA_SS_DMA_2 = 18,
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@ -158,25 +158,25 @@ enum omap3_l3_initiator_id {
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OMAP_L3_IA_IVA_SS_DMA_5 = 15,
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OMAP_L3_IA_IVA_SS_DMA_6 = 14,
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/* SGX has 1 ID */
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OMAP_L3_IA_SGX = 13,
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OMAP_L3_IA_SGX = 13,
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/* CAM has 3 ID */
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OMAP_L3_IA_CAM_1 = 12,
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OMAP_L3_IA_CAM_2 = 11,
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OMAP_L3_IA_CAM_3 = 10,
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OMAP_L3_IA_CAM_1 = 12,
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OMAP_L3_IA_CAM_2 = 11,
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OMAP_L3_IA_CAM_3 = 10,
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/* DAP has 1 ID */
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OMAP_L3_IA_DAP = 9,
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OMAP_L3_IA_DAP = 9,
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/* SDMA WR has 2 IDs */
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OMAP_L3_SDMA_WR_1 = 8,
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OMAP_L3_SDMA_WR_2 = 7,
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OMAP_L3_SDMA_WR_1 = 8,
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OMAP_L3_SDMA_WR_2 = 7,
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/* SDMA RD has 4 IDs */
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OMAP_L3_SDMA_RD_1 = 6,
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OMAP_L3_SDMA_RD_2 = 5,
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OMAP_L3_SDMA_RD_3 = 4,
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OMAP_L3_SDMA_RD_4 = 3,
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OMAP_L3_SDMA_RD_1 = 6,
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OMAP_L3_SDMA_RD_2 = 5,
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OMAP_L3_SDMA_RD_3 = 4,
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OMAP_L3_SDMA_RD_4 = 3,
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/* HSUSB OTG has 1 ID */
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OMAP_L3_USBOTG = 2,
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OMAP_L3_USBOTG = 2,
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/* HSUSB HOST has 1 ID */
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OMAP_L3_USBHOST = 1,
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OMAP_L3_USBHOST = 1,
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};
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enum omap3_l3_code {
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@ -192,17 +192,17 @@ enum omap3_l3_code {
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};
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struct omap3_l3 {
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struct device *dev;
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struct clk *ick;
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struct device *dev;
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struct clk *ick;
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/* memory base*/
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void __iomem *rt;
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void __iomem *rt;
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int debug_irq;
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int app_irq;
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int debug_irq;
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int app_irq;
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/* true when and inband functional error occurs */
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unsigned inband:1;
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unsigned inband:1;
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};
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/* offsets for l3 agents in order with the Flag status register */
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