dw_dmac: Allow src/dst msize & flow controller to be configured at runtime
Msize or Burst Size is peripheral dependent in case of prep_slave_sg and cyclic_prep transfers, and in case of memcpy transfers it is platform dependent. So msize configuration must come from platform data. Also some peripherals (ex: JPEG), need to be flow controller for dma transfers, so this information in case of slave_sg & cyclic_prep transfers must come from platform data. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@@ -42,6 +42,30 @@ enum dw_dma_slave_width {
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DW_DMA_SLAVE_WIDTH_32BIT,
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};
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/* bursts size */
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enum dw_dma_msize {
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DW_DMA_MSIZE_1,
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DW_DMA_MSIZE_4,
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DW_DMA_MSIZE_8,
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DW_DMA_MSIZE_16,
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DW_DMA_MSIZE_32,
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DW_DMA_MSIZE_64,
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DW_DMA_MSIZE_128,
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DW_DMA_MSIZE_256,
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};
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/* flow controller */
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enum dw_dma_fc {
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DW_DMA_FC_D_M2M,
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DW_DMA_FC_D_M2P,
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DW_DMA_FC_D_P2M,
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DW_DMA_FC_D_P2P,
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DW_DMA_FC_P_P2M,
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DW_DMA_FC_SP_P2P,
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DW_DMA_FC_P_M2P,
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DW_DMA_FC_DP_P2P,
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};
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/**
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* struct dw_dma_slave - Controller-specific information about a slave
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*
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@@ -55,6 +79,9 @@ enum dw_dma_slave_width {
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* @cfg_lo: Platform-specific initializer for the CFG_LO register
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* @src_master: src master for transfers on allocated channel.
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* @dst_master: dest master for transfers on allocated channel.
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* @src_msize: src burst size.
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* @dst_msize: dest burst size.
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* @fc: flow controller for DMA transfer
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*/
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struct dw_dma_slave {
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struct device *dma_dev;
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@@ -65,6 +92,9 @@ struct dw_dma_slave {
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u32 cfg_lo;
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u8 src_master;
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u8 dst_master;
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u8 src_msize;
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u8 dst_msize;
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u8 fc;
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};
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/* Platform-configurable bits in CFG_HI */
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