arch/tile: catch up on various minor cleanups.
None of these changes fix any actual bugs, but are just various cleanups that fell out along the way. In particular, some unused #defines and includes are removed, PREFETCH_STRIDE is added (the default is right for our shipping chips, but wrong for our next generation), our tile-specific prefetching code is removed so the (identical) generic prefetching code can be used instead, a comment is fixed to be proper GPL and not just a "paste GPL here" token, a "//" comment is converted to "/* */", etc. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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@ -267,32 +267,20 @@ extern int hash_default;
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/* Should kernel stack pages be hash-for-home? */
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extern int kstack_hash;
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/* Does MAP_ANONYMOUS return hash-for-home pages by default? */
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#define uheap_hash hash_default
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#else
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#define hash_default 0
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#define kstack_hash 0
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#define uheap_hash 0
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#endif
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/* Are we using huge pages in the TLB for kernel data? */
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extern int kdata_huge;
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/*
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* Note that with OLOC the prefetch will return an unused read word to
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* the issuing tile, which will cause some MDN traffic. Benchmarking
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* should be done to see whether this outweighs prefetching.
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*/
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#define ARCH_HAS_PREFETCH
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#define ARCH_HAS_PREFETCHW
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#define ARCH_HAS_SPINLOCK_PREFETCH
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#define prefetch(ptr) __builtin_prefetch((ptr), 0, 3)
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#define prefetchw(ptr) __builtin_prefetch((ptr), 1, 3)
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#ifdef CONFIG_SMP
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#define spin_lock_prefetch(ptr) prefetchw(ptr)
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#else
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/* Nothing to prefetch. */
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#define spin_lock_prefetch(lock) do { } while (0)
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#endif
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#define PREFETCH_STRIDE CHIP_L2_LINE_SIZE()
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#else /* __ASSEMBLY__ */
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