m32r: Move dot.gdbinit files
Move dot.gdbinit files from arch/m32r/{platforms}/dot.gdbinit*
to arch/m32r/platforms/{platform}/.
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
This commit is contained in:
Hirokazu Takata
249
arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB
Normal file
249
arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB
Normal file
@ -0,0 +1,249 @@
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||||
# .gdbinit file
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# $Id: dot.gdbinit_200MHz_16MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
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#-----
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# NOTE: this file is generated by a script, "gen_gdbinit.pl".
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# (Please type "gen_gdbinit.pl --help" and check the help message).
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# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
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#-----
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# target platform: m32700ut
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# setting
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set width 0d70
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set radix 0d16
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debug_chaos
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# clk xin:cpu:bif:bus=25:200:50:50
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define clock_init
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set *(unsigned long *)0x00ef4008 = 0x00000000
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set *(unsigned long *)0x00ef4004 = 0
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shell sleep 0.1
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# NOTE: Please change the master clock source from PLL-clock to Xin-clock
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# and switch off PLL, before resetting the clock gear ratio.
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set *(unsigned long *)0x00ef4024 = 2
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set *(unsigned long *)0x00ef4020 = 2
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set *(unsigned long *)0x00ef4010 = 0
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set *(unsigned long *)0x00ef4014 = 0
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set *(unsigned long *)0x00ef4004 = 3
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shell sleep 0.1
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set *(unsigned long *)0x00ef4008 = 0x00000200
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end
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# Initialize SDRAM controller
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define sdram_init
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# SDIR0
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set *(unsigned long *)0x00ef6008 = 0x00000182
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# SDIR1
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set *(unsigned long *)0x00ef600c = 0x00000001
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# Initialize wait
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shell sleep 0.1
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# Ch0-MOD
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set *(unsigned long *)0x00ef602c = 0x00000020
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# Ch0-TR
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set *(unsigned long *)0x00ef6028 = 0x00041302
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# Ch0-ADR (size:16MB)
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set *(unsigned long *)0x00ef6020 = 0x08000002
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# AutoRef On
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set *(unsigned long *)0x00ef6004 = 0x00010517
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# Access enable
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set *(unsigned long *)0x00ef6024 = 0x00000001
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end
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document sdram_init
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SDRAM controller initialization
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0x08000000 - 0x08ffffff (16MB)
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end
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# Initialize BSEL3 for UT-CFC
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define cfc_init
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set $sfrbase = 0xa0ef0000
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# too fast
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# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
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# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
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# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
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# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
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# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
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# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
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end
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document cfc_init
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CF controller initialization
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end
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# MMU enable
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define mmu_enable
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set $evb=0x88000000
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set *(unsigned long *)0xffff0024=1
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end
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# MMU disable
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define mmu_disable
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set $evb=0
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set *(unsigned long *)0xffff0024=0
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end
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# Show TLB entries
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define show_tlb_entries
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set $i = 0
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set $addr = $arg0
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set $nr_entries = $arg1
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use_mon_code
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while ($i < $nr_entries)
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set $tlb_tag = *(unsigned long*)$addr
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set $tlb_data = *(unsigned long*)($addr + 4)
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printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
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set $i = $i + 1
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set $addr = $addr + 8
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end
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use_debug_dma
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end
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define itlb
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set $itlb=0xfe000000
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show_tlb_entries $itlb 0d32
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end
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define dtlb
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set $dtlb=0xfe000800
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show_tlb_entries $dtlb 0d32
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end
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# Initialize TLB entries
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define init_tlb_entries
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set $i = 0
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set $addr = $arg0
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set $nr_entries = $arg1
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use_mon_code
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while ($i < $nr_entries)
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set *(unsigned long *)($addr + 0x4) = 0
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set $i = $i + 1
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set $addr = $addr + 8
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end
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use_debug_dma
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end
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define tlb_init
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set $itlb=0xfe000000
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init_tlb_entries $itlb 0d32
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set $dtlb=0xfe000800
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init_tlb_entries $dtlb 0d32
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end
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# Show current task structure
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define show_current
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set $current = $spi & 0xffffe000
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printf "$current=0x%08lX\n",$current
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print *(struct task_struct *)$current
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end
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# Show user assigned task structure
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define show_task
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set = $arg0 & 0xffffe000
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printf "$task=0x%08lX\n",$task
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print *(struct task_struct *)$task
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end
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document show_task
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Show user assigned task structure
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arg0 : task structure address
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end
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# Show M32R registers
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define show_regs
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printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
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printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
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printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
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printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
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printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
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printf "EVB[0x%08lX]\n",$evb
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end
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# Setup all
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define setup
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use_mon_code
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set *(unsigned int)0xfffffffc=0x60
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shell sleep 0.1
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clock_init
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shell sleep 0.1
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# SDRAM: 16MB
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set *(unsigned long *)0x00ef6020 = 0x08000002
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cfc_init
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# USB
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set *(unsigned short *)0xb0301000 = 0x100
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set $evb=0x08000000
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end
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# Load modules
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define load_modules
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use_debug_dma
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load
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end
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# Set kernel parameters
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define set_kernel_parameters
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set $param = (void*)0x08001000
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# INITRD_START
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# set *(unsigned long *)($param + 0x0010) = 0x08300000
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# INITRD_SIZE
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# set *(unsigned long *)($param + 0x0014) = 0x00000000
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# M32R_CPUCLK
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set *(unsigned long *)($param + 0x0018) = 0d200000000
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# M32R_BUSCLK
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set *(unsigned long *)($param + 0x001c) = 0d50000000
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# M32R_TIMER_DIVIDE
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set *(unsigned long *)($param + 0x0020) = 0d128
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set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=16M \0"
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end
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# Boot
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define boot
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set_kernel_parameters
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set $fp = 0
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set $pc = 0x08002000
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# set *(unsigned char *)0xffffffff = 0x03
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si
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c
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end
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# Set breakpoints
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define set_breakpoints
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b *0x08000030
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end
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# Restart
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define restart
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sdireset
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sdireset
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set $pc = 0
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b *0x04001000
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b *0x08001000
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b *0x08002000
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si
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c
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tlb_init
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del
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setup
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load_modules
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boot
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end
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define si
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stepi
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x/i $pc
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show_reg
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end
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sdireset
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sdireset
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file vmlinux
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target m32rsdi
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set $pc = 0
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b *0x04001000
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b *0x08001000
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b *0x08002000
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c
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tlb_init
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del
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setup
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load_modules
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boot
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249
arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB
Normal file
249
arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB
Normal file
@ -0,0 +1,249 @@
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# .gdbinit file
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# $Id: dot.gdbinit_300MHz_32MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
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#-----
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# NOTE: this file is generated by a script, "gen_gdbinit.pl".
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||||
# (Please type "gen_gdbinit.pl --help" and check the help message).
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||||
# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
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#-----
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# target platform: m32700ut
|
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# setting
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set width 0d70
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set radix 0d16
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debug_chaos
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# clk xin:cpu:bif:bus=25:300:75:75
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define clock_init
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set *(unsigned long *)0x00ef4008 = 0x00000000
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set *(unsigned long *)0x00ef4004 = 0
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shell sleep 0.1
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# NOTE: Please change the master clock source from PLL-clock to Xin-clock
|
||||
# and switch off PLL, before resetting the clock gear ratio.
|
||||
|
||||
set *(unsigned long *)0x00ef4024 = 2
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set *(unsigned long *)0x00ef4020 = 2
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set *(unsigned long *)0x00ef4010 = 0
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set *(unsigned long *)0x00ef4014 = 0
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set *(unsigned long *)0x00ef4004 = 5
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shell sleep 0.1
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set *(unsigned long *)0x00ef4008 = 0x00000200
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end
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# Initialize SDRAM controller
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define sdram_init
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# SDIR0
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set *(unsigned long *)0x00ef6008 = 0x00000182
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# SDIR1
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set *(unsigned long *)0x00ef600c = 0x00000001
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# Initialize wait
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shell sleep 0.1
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# Ch0-MOD
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set *(unsigned long *)0x00ef602c = 0x00000020
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# Ch0-TR
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set *(unsigned long *)0x00ef6028 = 0x00051502
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# Ch0-ADR (size:32MB)
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set *(unsigned long *)0x00ef6020 = 0x08000003
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# AutoRef On
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set *(unsigned long *)0x00ef6004 = 0x00010e24
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# Access enable
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set *(unsigned long *)0x00ef6024 = 0x00000001
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end
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document sdram_init
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SDRAM controller initialization
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0x08000000 - 0x09ffffff (32MB)
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end
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|
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# Initialize BSEL3 for UT-CFC
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define cfc_init
|
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set $sfrbase = 0xa0ef0000
|
||||
# too fast
|
||||
# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
|
||||
# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
|
||||
# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
|
||||
# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
|
||||
# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
|
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# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
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end
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document cfc_init
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CF controller initialization
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end
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# MMU enable
|
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define mmu_enable
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set $evb=0x88000000
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set *(unsigned long *)0xffff0024=1
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end
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# MMU disable
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define mmu_disable
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set $evb=0
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set *(unsigned long *)0xffff0024=0
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end
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|
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# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
set $nr_entries = $arg1
|
||||
use_mon_code
|
||||
while ($i < $nr_entries)
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
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printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
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set $i = $i + 1
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||||
set $addr = $addr + 8
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end
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use_debug_dma
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end
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define itlb
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set $itlb=0xfe000000
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show_tlb_entries $itlb 0d32
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end
|
||||
define dtlb
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set $dtlb=0xfe000800
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show_tlb_entries $dtlb 0d32
|
||||
end
|
||||
|
||||
# Initialize TLB entries
|
||||
define init_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
set $nr_entries = $arg1
|
||||
use_mon_code
|
||||
while ($i < $nr_entries)
|
||||
set *(unsigned long *)($addr + 0x4) = 0
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
use_debug_dma
|
||||
end
|
||||
define tlb_init
|
||||
set $itlb=0xfe000000
|
||||
init_tlb_entries $itlb 0d32
|
||||
set $dtlb=0xfe000800
|
||||
init_tlb_entries $dtlb 0d32
|
||||
end
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
end
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
use_mon_code
|
||||
set *(unsigned int)0xfffffffc=0x60
|
||||
shell sleep 0.1
|
||||
clock_init
|
||||
shell sleep 0.1
|
||||
# SDRAM: 32MB
|
||||
set *(unsigned long *)0x00ef6020 = 0x08000003
|
||||
cfc_init
|
||||
# USB
|
||||
set *(unsigned short *)0xb0301000 = 0x100
|
||||
|
||||
set $evb=0x08000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x08001000
|
||||
# INITRD_START
|
||||
# set *(unsigned long *)($param + 0x0010) = 0x08300000
|
||||
# INITRD_SIZE
|
||||
# set *(unsigned long *)($param + 0x0014) = 0x00000000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d300000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d75000000
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0"
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $fp = 0
|
||||
set $pc = 0x08002000
|
||||
# set *(unsigned char *)0xffffffff = 0x03
|
||||
si
|
||||
c
|
||||
end
|
||||
|
||||
# Set breakpoints
|
||||
define set_breakpoints
|
||||
b *0x08000030
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
set $pc = 0
|
||||
b *0x04001000
|
||||
b *0x08001000
|
||||
b *0x08002000
|
||||
si
|
||||
c
|
||||
tlb_init
|
||||
del
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
define si
|
||||
stepi
|
||||
x/i $pc
|
||||
show_reg
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
set $pc = 0
|
||||
b *0x04001000
|
||||
b *0x08001000
|
||||
b *0x08002000
|
||||
c
|
||||
tlb_init
|
||||
del
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
|
||||
249
arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB
Normal file
249
arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB
Normal file
@ -0,0 +1,249 @@
|
||||
# .gdbinit file
|
||||
# $Id: dot.gdbinit_400MHz_32MB,v 1.1 2004/10/21 01:41:27 fujiwara Exp $
|
||||
#-----
|
||||
# NOTE: this file is generated by a script, "gen_gdbinit.pl".
|
||||
# (Please type "gen_gdbinit.pl --help" and check the help message).
|
||||
# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
|
||||
#-----
|
||||
# target platform: m32700ut
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
|
||||
debug_chaos
|
||||
|
||||
# clk xin:cpu:bif:bus=25:400:100:50
|
||||
define clock_init
|
||||
set *(unsigned long *)0x00ef4008 = 0x00000000
|
||||
set *(unsigned long *)0x00ef4004 = 0
|
||||
shell sleep 0.1
|
||||
# NOTE: Please change the master clock source from PLL-clock to Xin-clock
|
||||
# and switch off PLL, before resetting the clock gear ratio.
|
||||
|
||||
set *(unsigned long *)0x00ef4024 = 3
|
||||
set *(unsigned long *)0x00ef4020 = 2
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 7
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x00000200
|
||||
end
|
||||
|
||||
# Initialize SDRAM controller
|
||||
define sdram_init
|
||||
# SDIR0
|
||||
set *(unsigned long *)0x00ef6008 = 0x00000182
|
||||
# SDIR1
|
||||
set *(unsigned long *)0x00ef600c = 0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 0.1
|
||||
# Ch0-MOD
|
||||
set *(unsigned long *)0x00ef602c = 0x00000020
|
||||
# Ch0-TR
|
||||
set *(unsigned long *)0x00ef6028 = 0x00041302
|
||||
# Ch0-ADR (size:32MB)
|
||||
set *(unsigned long *)0x00ef6020 = 0x08000003
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004 = 0x00010517
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024 = 0x00000001
|
||||
end
|
||||
document sdram_init
|
||||
SDRAM controller initialization
|
||||
0x08000000 - 0x09ffffff (32MB)
|
||||
end
|
||||
|
||||
# Initialize BSEL3 for UT-CFC
|
||||
define cfc_init
|
||||
set $sfrbase = 0xa0ef0000
|
||||
# too fast
|
||||
# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
|
||||
# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
|
||||
# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
|
||||
# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
|
||||
# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
|
||||
# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
|
||||
end
|
||||
document cfc_init
|
||||
CF controller initialization
|
||||
end
|
||||
|
||||
# MMU enable
|
||||
define mmu_enable
|
||||
set $evb=0x88000000
|
||||
set *(unsigned long *)0xffff0024=1
|
||||
end
|
||||
|
||||
# MMU disable
|
||||
define mmu_disable
|
||||
set $evb=0
|
||||
set *(unsigned long *)0xffff0024=0
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
set $nr_entries = $arg1
|
||||
use_mon_code
|
||||
while ($i < $nr_entries)
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
use_debug_dma
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb 0d32
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb 0d32
|
||||
end
|
||||
|
||||
# Initialize TLB entries
|
||||
define init_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
set $nr_entries = $arg1
|
||||
use_mon_code
|
||||
while ($i < $nr_entries)
|
||||
set *(unsigned long *)($addr + 0x4) = 0
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
use_debug_dma
|
||||
end
|
||||
define tlb_init
|
||||
set $itlb=0xfe000000
|
||||
init_tlb_entries $itlb 0d32
|
||||
set $dtlb=0xfe000800
|
||||
init_tlb_entries $dtlb 0d32
|
||||
end
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
end
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
use_mon_code
|
||||
set *(unsigned int)0xfffffffc=0x60
|
||||
shell sleep 0.1
|
||||
clock_init
|
||||
shell sleep 0.1
|
||||
# SDRAM: 32MB
|
||||
set *(unsigned long *)0x00ef6020 = 0x08000003
|
||||
cfc_init
|
||||
# USB
|
||||
set *(unsigned short *)0xb0301000 = 0x100
|
||||
|
||||
set $evb=0x08000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x08001000
|
||||
# INITRD_START
|
||||
# set *(unsigned long *)($param + 0x0010) = 0x08300000
|
||||
# INITRD_SIZE
|
||||
# set *(unsigned long *)($param + 0x0014) = 0x00000000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d400000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d50000000
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0"
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $fp = 0
|
||||
set $pc = 0x08002000
|
||||
# set *(unsigned char *)0xffffffff = 0x03
|
||||
si
|
||||
c
|
||||
end
|
||||
|
||||
# Set breakpoints
|
||||
define set_breakpoints
|
||||
b *0x08000030
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
set $pc = 0
|
||||
b *0x04001000
|
||||
b *0x08001000
|
||||
b *0x08002000
|
||||
si
|
||||
c
|
||||
tlb_init
|
||||
del
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
define si
|
||||
stepi
|
||||
x/i $pc
|
||||
show_reg
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
set $pc = 0
|
||||
b *0x04001000
|
||||
b *0x08001000
|
||||
b *0x08002000
|
||||
c
|
||||
tlb_init
|
||||
del
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
|
||||
242
arch/m32r/platforms/mappi/dot.gdbinit
Normal file
242
arch/m32r/platforms/mappi/dot.gdbinit
Normal file
@ -0,0 +1,242 @@
|
||||
# .gdbinit file
|
||||
# $Id: dot.gdbinit.mappi,v 1.4 2004/10/20 02:24:37 takata Exp $
|
||||
#-----
|
||||
# NOTE: this file is generated by a script, "gen_gdbinit.pl".
|
||||
# (Please type "gen_gdbinit.pl --help" and check the help message).
|
||||
# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
|
||||
#-----
|
||||
# target platform: mappi
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
debug_chaos
|
||||
|
||||
# clk xin:cpu:bif:bus=30:360:180:90
|
||||
define clock_init
|
||||
set *(unsigned long *)0x00ef4024 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 1
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 5
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x00000200
|
||||
end
|
||||
|
||||
# Initialize programmable ports
|
||||
define port_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
set *(unsigned short *)0x00ef1060 = 0x5555
|
||||
set *(unsigned short *)0x00ef1062 = 0x5555
|
||||
set *(unsigned short *)0x00ef1064 = 0x5555
|
||||
set *(unsigned short *)0x00ef1066 = 0x5555
|
||||
set *(unsigned short *)0x00ef1068 = 0x5555
|
||||
set *(unsigned short *)0x00ef106a = 0x0000
|
||||
set *(unsigned short *)0x00ef106e = 0x5555
|
||||
set *(unsigned short *)0x00ef1070 = 0x5555
|
||||
# LED ON
|
||||
set *(unsigned char *)($sfrbase + 0x1015) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1085) = 0xff
|
||||
shell sleep 0.1
|
||||
# LED OFF
|
||||
set *(unsigned char *)($sfrbase + 0x1085) = 0x00
|
||||
end
|
||||
document port_init
|
||||
P5=LED(output), P6.b4=LAN_RESET(output)
|
||||
end
|
||||
|
||||
# Initialize SDRAM controller
|
||||
define sdram_init
|
||||
# SDIR0
|
||||
set *(unsigned long *)0x00ef6008 = 0x00000182
|
||||
# SDIR1
|
||||
set *(unsigned long *)0x00ef600c = 0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 0.1
|
||||
# Ch0-MOD
|
||||
set *(unsigned long *)0x00ef602c = 0x00000020
|
||||
# Ch0-TR
|
||||
set *(unsigned long *)0x00ef6028 = 0x00051502
|
||||
# Ch0-ADR (size:64MB)
|
||||
set *(unsigned long *)0x00ef6020 = 0x08000004
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004 = 0x00010e2b
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024 = 0x00000001
|
||||
end
|
||||
document sdram_init
|
||||
SDRAM controller initialization
|
||||
0x08000000 - 0x0bffffff (64MB)
|
||||
end
|
||||
|
||||
# Initialize LAN controller
|
||||
define lanc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# Set BSEL3 (BSEL3 for the Chaos's bselc)
|
||||
set *(unsigned long *)($sfrbase + 0x5300) = 0x0a0a8040
|
||||
set *(unsigned long *)($sfrbase + 0x5304) = 0x01120203
|
||||
set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
|
||||
# Reset (P5=LED,P6.b4=LAN_RESET)
|
||||
set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
|
||||
set *(unsigned char *)($sfrbase + 0x1016) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0xff
|
||||
shell sleep 0.1
|
||||
# swivel: 0=normal, 4=reverse
|
||||
# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0x04
|
||||
set *(unsigned long *)(0x0c000330) = 0xffffffff
|
||||
# Set mac address
|
||||
set $lanc = (void*)0x0c000300
|
||||
set *(unsigned long *)($lanc + 0x0000) = 0x00610010
|
||||
set *(unsigned long *)($lanc + 0x0004) = 0x00200030
|
||||
set *(unsigned long *)($lanc + 0x0008) = 0x00400050
|
||||
set *(unsigned long *)($lanc + 0x000c) = 0x00600007
|
||||
end
|
||||
document lanc_init
|
||||
LAN controller initialization
|
||||
ex.) MAC address: 10 20 30 40 50 60
|
||||
end
|
||||
|
||||
# LCD & CRT dual-head setting (8bpp)
|
||||
define dispc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# BSEL4 Dispc
|
||||
set *(unsigned long *)($sfrbase + 0x5400) = 0x0e0e8000
|
||||
set *(unsigned long *)($sfrbase + 0x5404) = 0x0012220a
|
||||
end
|
||||
|
||||
# MMU enable
|
||||
define mmu_enable
|
||||
set $evb=0x88000000
|
||||
set *(unsigned long *)0xffff0024=1
|
||||
end
|
||||
|
||||
# MMU disable
|
||||
define mmu_disable
|
||||
set $evb=0
|
||||
set *(unsigned long *)0xffff0024=0
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
set $nr_entries = $arg1
|
||||
use_mon_code
|
||||
while ($i < $nr_entries)
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
use_debug_dma
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb 0d32
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb 0d32
|
||||
end
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
end
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
use_mon_code
|
||||
set *(unsigned int)0xfffffffc=0x60
|
||||
shell sleep 0.1
|
||||
clock_init
|
||||
shell sleep 0.1
|
||||
port_init
|
||||
sdram_init
|
||||
lanc_init
|
||||
dispc_init
|
||||
set $evb=0x08000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x08001000
|
||||
# INITRD_START
|
||||
# set *(unsigned long *)($param + 0x0010) = 0x08300000
|
||||
# INITRD_SIZE
|
||||
# set *(unsigned long *)($param + 0x0014) = 0x00000000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d360000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d90000000
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $fp = 0
|
||||
set $pc = 0x08002000
|
||||
si
|
||||
c
|
||||
end
|
||||
|
||||
# Set breakpoints
|
||||
define set_breakpoints
|
||||
b *0x08000030
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
setup
|
||||
#load_modules
|
||||
#set_breakpoints
|
||||
#boot
|
||||
|
||||
245
arch/m32r/platforms/mappi/dot.gdbinit.nommu
Normal file
245
arch/m32r/platforms/mappi/dot.gdbinit.nommu
Normal file
@ -0,0 +1,245 @@
|
||||
# .gdbinit file
|
||||
# $Id$
|
||||
#-----
|
||||
# NOTE: this file is generated by a script, "gen_gdbinit.pl".
|
||||
# (Please type "gen_gdbinit.pl --help" and check the help message).
|
||||
# $ Id: gen_gdbinit.pl,v 1.5 2004/01/23 08:23:25 takata Exp $
|
||||
#-----
|
||||
# target platform: mappi
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
debug_chaos
|
||||
|
||||
# clk xin:cpu:bif:bus=25:200:50:50
|
||||
define clock_init
|
||||
set *(unsigned long *)0x00ef4024 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 2
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 3
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x00000200
|
||||
end
|
||||
|
||||
# Initialize programmable ports
|
||||
define port_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
set *(unsigned short *)0x00ef1060 = 0x5555
|
||||
set *(unsigned short *)0x00ef1062 = 0x5555
|
||||
set *(unsigned short *)0x00ef1064 = 0x5555
|
||||
set *(unsigned short *)0x00ef1066 = 0x5555
|
||||
set *(unsigned short *)0x00ef1068 = 0x5555
|
||||
set *(unsigned short *)0x00ef106a = 0x0000
|
||||
set *(unsigned short *)0x00ef106e = 0x5555
|
||||
set *(unsigned short *)0x00ef1070 = 0x5555
|
||||
# LED ON
|
||||
set *(unsigned char *)($sfrbase + 0x1015) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1085) = 0xff
|
||||
shell sleep 0.1
|
||||
# LED OFF
|
||||
set *(unsigned char *)($sfrbase + 0x1085) = 0x00
|
||||
end
|
||||
document port_init
|
||||
P5=LED(output), P6.b4=LAN_RESET(output)
|
||||
end
|
||||
|
||||
# Initialize SDRAM controller
|
||||
define sdram_init
|
||||
# SDIR0
|
||||
set *(unsigned long *)0x00ef6008 = 0x00000182
|
||||
# SDIR1
|
||||
set *(unsigned long *)0x00ef600c = 0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 0.1
|
||||
# Ch0-MOD
|
||||
set *(unsigned long *)0x00ef602c = 0x00000020
|
||||
# Ch0-TR
|
||||
set *(unsigned long *)0x00ef6028 = 0x00051502
|
||||
# Ch0-ADR (size:64MB)
|
||||
set *(unsigned long *)0x00ef6020 = 0x00000004
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004 = 0x00010f05
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024 = 0x00000001
|
||||
end
|
||||
document sdram_init
|
||||
SDRAM controller initialization
|
||||
0x08000000 - 0x0bffffff (64MB)
|
||||
end
|
||||
|
||||
# Initialize LAN controller
|
||||
define lanc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# Set BSEL3 (BSEL3 for the Chaos's bselc)
|
||||
set *(unsigned long *)($sfrbase + 0x5300) = 0x07078040
|
||||
set *(unsigned long *)($sfrbase + 0x5304) = 0x01110102
|
||||
set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
|
||||
# Reset (P5=LED,P6.b4=LAN_RESET)
|
||||
set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
|
||||
set *(unsigned char *)($sfrbase + 0x1016) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0xff
|
||||
shell sleep 0.1
|
||||
# swivel: 0=normal, 4=reverse
|
||||
# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0x04
|
||||
set *(unsigned long *)(0x0c000330) = 0xffffffff
|
||||
# Set mac address
|
||||
set $lanc = (void*)0x0c000300
|
||||
set *(unsigned long *)($lanc + 0x0000) = 0x00610010
|
||||
set *(unsigned long *)($lanc + 0x0004) = 0x00200030
|
||||
set *(unsigned long *)($lanc + 0x0008) = 0x00400050
|
||||
set *(unsigned long *)($lanc + 0x000c) = 0x00600007
|
||||
end
|
||||
document lanc_init
|
||||
LAN controller initialization
|
||||
ex.) MAC address: 10 20 30 40 50 60
|
||||
end
|
||||
|
||||
# LCD & CRT dual-head setting (8bpp)
|
||||
define dispc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# BSEL4 Dispc
|
||||
set *(unsigned long *)($sfrbase + 0x5400) = 0x06078000
|
||||
set *(unsigned long *)($sfrbase + 0x5404) = 0x00101101
|
||||
end
|
||||
|
||||
# MMU enable
|
||||
define mmu_enable
|
||||
set $evb=0x88000000
|
||||
set *(unsigned long *)0xffff0024=1
|
||||
end
|
||||
|
||||
# MMU disable
|
||||
define mmu_disable
|
||||
set $evb=0
|
||||
set *(unsigned long *)0xffff0024=0
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
set $nr_entries = $arg1
|
||||
use_mon_code
|
||||
while ($i < $nr_entries)
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
use_debug_dma
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb 0d32
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb 0d32
|
||||
end
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
end
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
use_mon_code
|
||||
set *(unsigned int)0xfffffffc=0x60
|
||||
shell sleep 0.1
|
||||
clock_init
|
||||
shell sleep 0.1
|
||||
port_init
|
||||
sdram_init
|
||||
lanc_init
|
||||
dispc_init
|
||||
set $evb=0x00000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x00001000
|
||||
# INITRD_START
|
||||
#set *(unsigned long *)($param + 0x0010) = 0x082a0000
|
||||
# INITRD_SIZE
|
||||
#set *(unsigned long *)($param + 0x0014) = 0x00000000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d200000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d50000000
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.bbox-httpd nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $fp = 0
|
||||
set $pc=0x00002000
|
||||
set *(long *)0xfffffff4=0x8080
|
||||
# b load_flat_binary
|
||||
# set *(unsigned char *)0x08001003=0x63
|
||||
# set *(unsigned char *)0x08001003=0x02
|
||||
si
|
||||
# c
|
||||
end
|
||||
|
||||
# Set breakpoints
|
||||
define set_breakpoints
|
||||
b *0x08000030
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
|
||||
344
arch/m32r/platforms/mappi/dot.gdbinit.smp
Normal file
344
arch/m32r/platforms/mappi/dot.gdbinit.smp
Normal file
@ -0,0 +1,344 @@
|
||||
# .gdbinit file
|
||||
# $Id$
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
debug_chaos
|
||||
|
||||
# clk xin:cpu:bif:bus=1:4:2:1
|
||||
define clock_init_on
|
||||
set *(unsigned long *)0x00ef4024 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 1
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
# set *(unsigned long *)0x00ef4008 = 0x0201
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:4:1:1
|
||||
define clock_init_on_1411
|
||||
set *(unsigned long *)0x00ef4024 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 2
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:4:2:1
|
||||
define clock_init_on_1421
|
||||
set *(unsigned long *)0x00ef4024 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 1
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:8:2:1
|
||||
define clock_init_on_1821
|
||||
set *(unsigned long *)0x00ef4024 = 3
|
||||
set *(unsigned long *)0x00ef4020 = 2
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x3
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:8:4:1
|
||||
define clock_init_on_1841
|
||||
set *(unsigned long *)0x00ef4024 = 3
|
||||
set *(unsigned long *)0x00ef4020 = 1
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x3
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:16:8:1
|
||||
define clock_init_on_11681
|
||||
set *(unsigned long *)0x00ef4024 = 4
|
||||
set *(unsigned long *)0x00ef4020 = 2
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x7
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:1:1:1
|
||||
define clock_init_off
|
||||
# CPU
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
# BIF
|
||||
set *(unsigned long *)0x00ef4020 = 0
|
||||
# BUS
|
||||
set *(unsigned long *)0x00ef4024 = 0
|
||||
# PLL
|
||||
set *(unsigned long *)0x00ef4008 = 0x0000
|
||||
end
|
||||
|
||||
# Initialize programmable ports
|
||||
define port_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
set *(unsigned short *)0x00ef1060 = 0x5555
|
||||
set *(unsigned short *)0x00ef1062 = 0x5555
|
||||
set *(unsigned short *)0x00ef1064 = 0x5555
|
||||
set *(unsigned short *)0x00ef1066 = 0x5555
|
||||
set *(unsigned short *)0x00ef1068 = 0x5555
|
||||
set *(unsigned short *)0x00ef106a = 0x0000
|
||||
set *(unsigned short *)0x00ef106e = 0x5555
|
||||
set *(unsigned short *)0x00ef1070 = 0x5555
|
||||
# LED ON
|
||||
set *(unsigned char *)($sfrbase + 0x1015) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1085) = 0xff
|
||||
shell sleep 0.1
|
||||
# LED OFF
|
||||
set *(unsigned char *)($sfrbase + 0x1085) = 0x00
|
||||
end
|
||||
document port_init
|
||||
P5=LED(output), P6.b4=LAN_RESET(output)
|
||||
end
|
||||
|
||||
# Initialize SDRAM controller for Mappi
|
||||
define sdram_init
|
||||
# SDIR0
|
||||
set *(unsigned long *)0x00ef6008 = 0x00000182
|
||||
# SDIR1
|
||||
set *(unsigned long *)0x00ef600c = 0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 0.1
|
||||
# Ch0-MOD
|
||||
set *(unsigned long *)0x00ef602c = 0x00000020
|
||||
# Ch0-TR
|
||||
set *(unsigned long *)0x00ef6028 = 0x00010002
|
||||
# Ch0-ADR
|
||||
set *(unsigned long *)0x00ef6020 = 0x08000004
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004 = 0x00010107
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024 = 0x00000001
|
||||
end
|
||||
document sdram_init
|
||||
Mappi SDRAM controller initialization
|
||||
0x08000000 - 0x0bffffff (64MB)
|
||||
end
|
||||
|
||||
# Initialize LAN controller for Mappi
|
||||
define lanc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# Set BSEL3 (BSEL3 for the Chaos's bselc)
|
||||
# set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040
|
||||
# set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101
|
||||
set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000
|
||||
set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103
|
||||
set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
|
||||
# Reset (P5=LED,P6.b4=LAN_RESET)
|
||||
set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
|
||||
set *(unsigned char *)($sfrbase + 0x1016) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0xff
|
||||
shell sleep 0.1
|
||||
# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0x04
|
||||
set *(unsigned long *)(0x0c000330) = 0xffffffff
|
||||
# Set mac address
|
||||
set $lanc = (void*)0x0c000300
|
||||
set *(unsigned long *)($lanc + 0x0000) = 0x00610010
|
||||
set *(unsigned long *)($lanc + 0x0004) = 0x00200030
|
||||
set *(unsigned long *)($lanc + 0x0008) = 0x00400050
|
||||
set *(unsigned long *)($lanc + 0x000c) = 0x00600007
|
||||
end
|
||||
document lanc_init
|
||||
Mappi LAN controller initialization
|
||||
ex.) MAC address: 10 20 30 40 50 60
|
||||
end
|
||||
|
||||
# LCD & CRT dual-head setting (8bpp)
|
||||
define dispc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# BSEL4 Dispc
|
||||
# 20MHz
|
||||
# set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282
|
||||
# set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202
|
||||
# 40MHz
|
||||
set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000
|
||||
set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103
|
||||
end
|
||||
|
||||
# MMU enable
|
||||
define mmu_enable
|
||||
set $evb=0x88000000
|
||||
set *(unsigned long *)0xffff0024=1
|
||||
end
|
||||
|
||||
# MMU disable
|
||||
define mmu_disable
|
||||
set $evb=0
|
||||
set *(unsigned long *)0xffff0024=0
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
use_mon_code
|
||||
while ($i < 0d32 )
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
use_debug_dma
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb
|
||||
end
|
||||
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set $task = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$fp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
end
|
||||
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
use_mon_code
|
||||
set *(unsigned int)0xfffffffc=0x60
|
||||
shell sleep 0.1
|
||||
# clock_init_on_1411
|
||||
clock_init_on_1421
|
||||
# clock_init_on_1821
|
||||
# clock_init_on_1841
|
||||
# clock_init_on_11681
|
||||
# clock_init_off
|
||||
shell sleep 0.1
|
||||
port_init
|
||||
sdram_init
|
||||
lanc_init
|
||||
dispc_init
|
||||
set $evb=0x08000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
# load ramdisk_082a0000.mot
|
||||
# load romfs_082a0000.mot
|
||||
# use_mon_code
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x08001000
|
||||
# INITRD_START
|
||||
# set *(unsigned long *)($param + 0x0010) = 0x082a0000
|
||||
# INITRD_SIZE
|
||||
# set *(unsigned long *)($param + 0x0014) = 0x00000000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d160000000
|
||||
# set *(unsigned long *)($param + 0x0018) = 0d80000000
|
||||
# set *(unsigned long *)($param + 0x0018) = 0d40000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d40000000
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
|
||||
# set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $pc=0x08002000
|
||||
set *(unsigned char *)0x08001003=0x03
|
||||
si
|
||||
c
|
||||
end
|
||||
|
||||
# Set breakpoints
|
||||
define set_breakpoints
|
||||
b *0x08000030
|
||||
end
|
||||
|
||||
## Boot MP
|
||||
define boot_mp
|
||||
set_kernel_parameters
|
||||
set *(unsigned long *)0x00f00000 = boot - 0x80000000
|
||||
set *(unsigned long *)0x00eff2f8 = 0x2
|
||||
x 0x00eff2f8
|
||||
|
||||
set $pc=0x08002000
|
||||
si
|
||||
c
|
||||
end
|
||||
document boot_mp
|
||||
Boot BSP
|
||||
end
|
||||
|
||||
## Boot UP
|
||||
define boot_up
|
||||
set_kernel_parameters
|
||||
set $pc=0x08002000
|
||||
si
|
||||
c
|
||||
end
|
||||
document boot_up
|
||||
Boot BSP
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
setup
|
||||
load_modules
|
||||
boot_mp
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
setup
|
||||
233
arch/m32r/platforms/mappi2/dot.gdbinit.vdec2
Normal file
233
arch/m32r/platforms/mappi2/dot.gdbinit.vdec2
Normal file
@ -0,0 +1,233 @@
|
||||
# .gdbinit file
|
||||
# $Id: dot.gdbinit.vdec2,v 1.2 2004/11/11 02:03:15 takata Exp $
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
use_debug_dma
|
||||
|
||||
# Initialize SDRAM controller for Mappi
|
||||
define sdram_init
|
||||
# SDIR0
|
||||
set *(unsigned long *)0x00ef6008=0x00000182
|
||||
# SDIR1
|
||||
set *(unsigned long *)0x00ef600c=0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 1
|
||||
# Ch0-MOD
|
||||
set *(unsigned long *)0x00ef602c=0x00000020
|
||||
# Ch0-TR
|
||||
set *(unsigned long *)0x00ef6028=0x00041302
|
||||
# Ch0-ADR
|
||||
set *(unsigned long *)0x00ef6020=0x08000004
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004=0x00010705
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024=0x00000001
|
||||
end
|
||||
document sdram_init
|
||||
Mappi SDRAM controller initialization
|
||||
0x08000000 - 0x0bffffff (64MB)
|
||||
end
|
||||
|
||||
# Initialize SDRAM controller for Mappi
|
||||
define sdram_init2
|
||||
# SDIR0
|
||||
set *(unsigned long *)0x00ef6008=0x00000182
|
||||
# Ch0-MOD
|
||||
set *(unsigned long *)0x00ef602c=0x00000020
|
||||
# Ch0-TR
|
||||
set *(unsigned long *)0x00ef6028=0x00010002
|
||||
# Ch0-ADR
|
||||
set *(unsigned long *)0x00ef6020=0x08000004
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004=0x00010107
|
||||
# SDIR1
|
||||
set *(unsigned long *)0x00ef600c=0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 1
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024=0x00000001
|
||||
shell sleep 1
|
||||
end
|
||||
document sdram_init
|
||||
Mappi SDRAM controller initialization
|
||||
0x08000000 - 0x0bffffff (64MB)
|
||||
end
|
||||
|
||||
# Initialize LAN controller for Mappi
|
||||
define lanc_init
|
||||
# Set BSEL1 (BSEL3 for the Chaos's bselc)
|
||||
#set *(unsigned long *)0x00ef5004 = 0x0fff330f
|
||||
#set *(unsigned long *)0x00ef5004 = 0x01113301
|
||||
|
||||
# set *(unsigned long *)0x00ef5004 = 0x02011101
|
||||
# set *(unsigned long *)0x00ef5004 = 0x04441104
|
||||
|
||||
# BSEL5
|
||||
# set *(unsigned long *)0x00ef5014 = 0x0ccc310c
|
||||
# set *(unsigned long *)0x00ef5014 = 0x0303310f
|
||||
# set *(unsigned long *)0x00ef5014 = 0x01011102 -> NG
|
||||
# set *(unsigned long *)0x00ef5014 = 0x03033103
|
||||
|
||||
set *(unsigned long *)0x00ef500c = 0x0b0b1304
|
||||
set *(unsigned long *)0x00ef5010 = 0x03033302
|
||||
# set *(unsigned long *)0x00ef5018 = 0x02223302
|
||||
end
|
||||
|
||||
# MMU enable
|
||||
define mmu_enable
|
||||
set $evb=0x88000000
|
||||
set *(unsigned long *)0xffff0024=1
|
||||
end
|
||||
|
||||
# MMU disable
|
||||
define mmu_disable
|
||||
set $evb=0
|
||||
set *(unsigned long *)0xffff0024=0
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
while ($i < 0d16 )
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb
|
||||
end
|
||||
|
||||
# Cache ON
|
||||
define set_cache_type
|
||||
set $mctype = (void*)0xfffffff8
|
||||
# chaos
|
||||
# set *(unsigned long *)($mctype) = 0x0000c000
|
||||
# m32102 i-cache only
|
||||
set *(unsigned long *)($mctype) = 0x00008000
|
||||
# m32102 d-cache only
|
||||
# set *(unsigned long *)($mctype) = 0x00004000
|
||||
end
|
||||
define cache_on
|
||||
set $param = (void*)0x08001000
|
||||
set *(unsigned long *)($param) = 0x60ff6102
|
||||
end
|
||||
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set $task = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
|
||||
set $mests = *(unsigned long *)0xffff000c
|
||||
set $mdeva = *(unsigned long *)0xffff0010
|
||||
printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
|
||||
end
|
||||
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
sdram_init
|
||||
# lanc_init
|
||||
# dispc_init
|
||||
# set $evb=0x08000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
# load busybox.mot
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x08001000
|
||||
|
||||
## MOUNT_ROOT_RDONLY
|
||||
set {long}($param+0x00)=0
|
||||
## RAMDISK_FLAGS
|
||||
#set {long}($param+0x04)=0
|
||||
## ORIG_ROOT_DEV
|
||||
#set {long}($param+0x08)=0x00000100
|
||||
## LOADER_TYPE
|
||||
#set {long}($param+0x0C)=0
|
||||
## INITRD_START
|
||||
set {long}($param+0x10)=0x082a0000
|
||||
## INITRD_SIZE
|
||||
set {long}($param+0x14)=0d6200000
|
||||
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d25000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d25000000
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
|
||||
|
||||
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
debug_chaos
|
||||
set $pc=0x08002000
|
||||
set $fp=0
|
||||
del b
|
||||
si
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
|
||||
restart
|
||||
boot
|
||||
|
||||
|
||||
224
arch/m32r/platforms/mappi3/dot.gdbinit
Normal file
224
arch/m32r/platforms/mappi3/dot.gdbinit
Normal file
@ -0,0 +1,224 @@
|
||||
# .gdbinit file
|
||||
# $Id: dot.gdbinit,v 1.1 2005/04/11 02:21:08 sakugawa Exp $
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
use_debug_dma
|
||||
|
||||
# Initialize SDRAM controller for Mappi
|
||||
define sdram_init
|
||||
# SDIR0
|
||||
set *(unsigned long *)0x00ef6008 = 0x00000182
|
||||
# SDIR1
|
||||
set *(unsigned long *)0x00ef600c = 0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 0.1
|
||||
# MOD
|
||||
set *(unsigned long *)0x00ef602c = 0x00000020
|
||||
set *(unsigned long *)0x00ef604c = 0x00000020
|
||||
# TR
|
||||
set *(unsigned long *)0x00ef6028 = 0x00051502
|
||||
set *(unsigned long *)0x00ef6048 = 0x00051502
|
||||
# ADR
|
||||
set *(unsigned long *)0x00ef6020 = 0x08000004
|
||||
set *(unsigned long *)0x00ef6040 = 0x0c000004
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004 = 0x00010517
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024 = 0x00000001
|
||||
set *(unsigned long *)0x00ef6044 = 0x00000001
|
||||
end
|
||||
|
||||
# Initialize LAN controller for Mappi
|
||||
define lanc_init
|
||||
# Set BSEL4
|
||||
#set *(unsigned long *)0x00ef5004 = 0x0fff330f
|
||||
#set *(unsigned long *)0x00ef5004 = 0x01113301
|
||||
|
||||
# set *(unsigned long *)0x00ef5004 = 0x02011101
|
||||
# set *(unsigned long *)0x00ef5004 = 0x04441104
|
||||
end
|
||||
|
||||
define clock_init
|
||||
set *(unsigned long *)0x00ef4010 = 2
|
||||
set *(unsigned long *)0x00ef4014 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 3
|
||||
set *(unsigned long *)0x00ef4024 = 3
|
||||
set *(unsigned long *)0x00ef4004 = 0x7
|
||||
# shell sleep 0.1
|
||||
# set *(unsigned long *)0x00ef4004 = 0x5
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
define port_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
set *(unsigned short *)0x00ef1060 = 0x5555
|
||||
set *(unsigned short *)0x00ef1062 = 0x5555
|
||||
set *(unsigned short *)0x00ef1064 = 0x5555
|
||||
set *(unsigned short *)0x00ef1066 = 0x5555
|
||||
set *(unsigned short *)0x00ef1068 = 0x5555
|
||||
set *(unsigned short *)0x00ef106a = 0x0000
|
||||
set *(unsigned short *)0x00ef106e = 0x5555
|
||||
set *(unsigned short *)0x00ef1070 = 0x5555
|
||||
end
|
||||
|
||||
# MMU enable
|
||||
define mmu_enable
|
||||
set $evb=0x88000000
|
||||
set *(unsigned long *)0xffff0024=1
|
||||
end
|
||||
|
||||
# MMU disable
|
||||
define mmu_disable
|
||||
set $evb=0
|
||||
set *(unsigned long *)0xffff0024=0
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
while ($i < 0d16 )
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb
|
||||
end
|
||||
|
||||
# Cache ON
|
||||
define set_cache_type
|
||||
set $mctype = (void*)0xfffffff8
|
||||
# chaos
|
||||
# set *(unsigned long *)($mctype) = 0x0000c000
|
||||
# m32102 i-cache only
|
||||
set *(unsigned long *)($mctype) = 0x00008000
|
||||
# m32102 d-cache only
|
||||
# set *(unsigned long *)($mctype) = 0x00004000
|
||||
end
|
||||
define cache_on
|
||||
set $param = (void*)0x08001000
|
||||
set *(unsigned long *)($param) = 0x60ff6102
|
||||
end
|
||||
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set $task = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
|
||||
set $mests = *(unsigned long *)0xffff000c
|
||||
set $mdeva = *(unsigned long *)0xffff0010
|
||||
printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
|
||||
end
|
||||
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
clock_init
|
||||
shell sleep 0.1
|
||||
port_init
|
||||
sdram_init
|
||||
# lanc_init
|
||||
# dispc_init
|
||||
# set $evb=0x08000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
# load busybox.mot
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x08001000
|
||||
|
||||
## MOUNT_ROOT_RDONLY
|
||||
set {long}($param+0x00)=0
|
||||
## RAMDISK_FLAGS
|
||||
#set {long}($param+0x04)=0
|
||||
## ORIG_ROOT_DEV
|
||||
#set {long}($param+0x08)=0x00000100
|
||||
## LOADER_TYPE
|
||||
#set {long}($param+0x0C)=0
|
||||
## INITRD_START
|
||||
set {long}($param+0x10)=0x082a0000
|
||||
## INITRD_SIZE
|
||||
set {long}($param+0x14)=0d6200000
|
||||
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d100000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d50000000
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6_04 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
|
||||
|
||||
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
debug_chaos
|
||||
set *(unsigned long *)0x00f00000=0x08002000
|
||||
set $pc=0x08002000
|
||||
set $fp=0
|
||||
del b
|
||||
si
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
|
||||
restart
|
||||
boot
|
||||
154
arch/m32r/platforms/oaks32r/dot.gdbinit.nommu
Normal file
154
arch/m32r/platforms/oaks32r/dot.gdbinit.nommu
Normal file
@ -0,0 +1,154 @@
|
||||
# .gdbinit file
|
||||
# $Id: dot.gdbinit.oaks32r,v 1.4 2004/10/20 02:24:37 takata Exp $
|
||||
#-----
|
||||
# NOTE: this file is generated by a script, "gen_gdbinit.pl".
|
||||
# (Please type "gen_gdbinit.pl --help" and check the help message).
|
||||
# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
|
||||
#-----
|
||||
# target platform: oaks32r
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
|
||||
# clk xin:cpu:bus=16:66:33
|
||||
define clock_init
|
||||
set *(unsigned long *)0x00ef4008 = 1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4000 = 0x00020100
|
||||
end
|
||||
|
||||
# Initialize programmable ports
|
||||
define port_init
|
||||
set *(unsigned long *)0x00ef1000 = 0x1
|
||||
set *(unsigned long *)0x00ef1060 = 0x01400001
|
||||
set *(unsigned long *)0x00ef1064 = 0x00015555
|
||||
set *(unsigned long *)0x00ef1068 = 0x55555050
|
||||
set *(unsigned long *)0x00ef106c = 0x05150040
|
||||
end
|
||||
|
||||
# Initialize SDRAM controller
|
||||
define sdram_init
|
||||
set *(unsigned long *)0x00ef6008 = 0x00000182
|
||||
set *(unsigned long *)0x00ef600c = 0x00000001
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef602c = 0x00000010
|
||||
set *(unsigned long *)0x00ef6028 = 0x00000300
|
||||
set *(unsigned long *)0x00ef6048 = 0x00000001
|
||||
set *(unsigned long *)0x00ef6020 = 0x01000041
|
||||
set *(unsigned long *)0x00ef6004 = 0x00010117
|
||||
set *(unsigned long *)0x00ef6010 = 0x00000001
|
||||
set *(unsigned long *)0x00ef6024 = 0x00000001
|
||||
end
|
||||
document sdram_init
|
||||
SDRAM controller initialization
|
||||
0x01000000 - 0x017fffff (8MB)
|
||||
end
|
||||
|
||||
# Initialize LAN controller
|
||||
define lanc_init
|
||||
set *(unsigned long *)0x00ef5008 = 0x03031303
|
||||
#RST DRV (P64)
|
||||
set *(unsigned char *)0x00ef1046 = 0x08
|
||||
set *(unsigned char *)0x00ef1026 = 0xff
|
||||
set *(unsigned char *)0x00ef1026 = 0x00
|
||||
set *(unsigned short *)0x02000630 = 0xffff
|
||||
end
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
end
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
use_mon_code
|
||||
set *(unsigned int)0xfffffffc=0x60
|
||||
shell sleep 0.1
|
||||
clock_init
|
||||
shell sleep 0.1
|
||||
port_init
|
||||
sdram_init
|
||||
lanc_init
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x01001000
|
||||
# INITRD_START
|
||||
# set *(unsigned long *)($param + 0x0010) = 0x00000000
|
||||
# INITRD_SIZE
|
||||
# set *(unsigned long *)($param + 0x0014) = 0x00000000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d66666667
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d33333333
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $fp = 0
|
||||
set $pc = 0x01002000
|
||||
si
|
||||
c
|
||||
end
|
||||
|
||||
# Set breakpoints
|
||||
define set_breakpoints
|
||||
b *0x00000020
|
||||
b *0x00000030
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
setup
|
||||
#load_modules
|
||||
#set_breakpoints
|
||||
#boot
|
||||
|
||||
218
arch/m32r/platforms/opsput/dot.gdbinit
Normal file
218
arch/m32r/platforms/opsput/dot.gdbinit
Normal file
@ -0,0 +1,218 @@
|
||||
# .gdbinit file
|
||||
# $Id: dot.gdbinit,v 1.1 2004/07/27 06:54:20 sakugawa Exp $
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
set height 0
|
||||
debug_chaos
|
||||
|
||||
# clk xin:cpu:bus=1:8:1
|
||||
define clock_init_on_181
|
||||
set *(unsigned long *)0x00ef400c = 0x2
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4000 = 0x101
|
||||
end
|
||||
# clk xin:cpu:bus=1:8:2
|
||||
define clock_init_on_182
|
||||
set *(unsigned long *)0x00ef400c = 0x1
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4000 = 0x101
|
||||
end
|
||||
|
||||
# clk xin:cpu:bus=1:8:4
|
||||
define clock_init_on_184
|
||||
set *(unsigned long *)0x00ef400c = 0x0
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4000 = 0x101
|
||||
end
|
||||
|
||||
# clk xin:cpu:bus=1:1:1
|
||||
define clock_init_off
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4000 = 0x0
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4004 = 0x0
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef400c = 0x0
|
||||
end
|
||||
|
||||
define tlb_init
|
||||
set $tlbbase = 0xfe000000
|
||||
set *(unsigned long *)($tlbbase + 0x04) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x0c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x14) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x1c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x24) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x2c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x34) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x3c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x44) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x4c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x54) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x5c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x64) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x6c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x74) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x7c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x84) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x8c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x94) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x9c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xa4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xac) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xb4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xbc) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xc4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xcc) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xd4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xdc) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xe4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xec) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xf4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xfc) = 0x0
|
||||
set $tlbbase = 0xfe000800
|
||||
set *(unsigned long *)($tlbbase + 0x04) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x0c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x14) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x1c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x24) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x2c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x34) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x3c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x44) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x4c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x54) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x5c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x64) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x6c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x74) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x7c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x84) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x8c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x94) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0x9c) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xa4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xac) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xb4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xbc) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xc4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xcc) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xd4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xdc) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xe4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xec) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xf4) = 0x0
|
||||
set *(unsigned long *)($tlbbase + 0xfc) = 0x0
|
||||
end
|
||||
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x88001000
|
||||
# INITRD_START
|
||||
# set *(unsigned long *)($param + 0x0010) = 0x08300000
|
||||
# INITRD_SIZE
|
||||
# set *(unsigned long *)($param + 0x0014) = 0x00400000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d200000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d50000000
|
||||
# set *(unsigned long *)($param + 0x001c) = 0d25000000
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 \
|
||||
root=/dev/nfsroot \
|
||||
nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 \
|
||||
nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \
|
||||
mem=16m \0"
|
||||
end
|
||||
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $pc=0x88002000
|
||||
set $fp=0
|
||||
set $evb=0x88000000
|
||||
si
|
||||
c
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
use_mon_code
|
||||
while ($i < 0d32 )
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
# use_debug_dma
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb
|
||||
end
|
||||
|
||||
define show_regs
|
||||
printf " R0[%08lx] R1[%08lx] R2[%08lx] R3[%08lx]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[%08lx] R5[%08lx] R6[%08lx] R7[%08lx]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[%08lx] R9[%08lx] R10[%08lx] R11[%08lx]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[%08lx] FP[%08lx] LR[%08lx] SP[%08lx]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[%08lx] CBR[%08lx] SPI[%08lx] SPU[%08lx]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[%08lx] PC[%08lx] ACCL[%08lx] ACCH[%08lx]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[%08lx]\n",$evb
|
||||
end
|
||||
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
en 1
|
||||
set $pc=0x0
|
||||
c
|
||||
tlb_init
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
define setup
|
||||
debug_chaos
|
||||
# Clock
|
||||
# shell sleep 0.1
|
||||
# clock_init_off
|
||||
# shell sleep 1
|
||||
# clock_init_on_182
|
||||
# shell sleep 0.1
|
||||
# SDRAM
|
||||
set *(unsigned long *)0xa0ef6004 = 0x0001053f
|
||||
set *(unsigned long *)0xa0ef6028 = 0x00031102
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
set $pc=0x0
|
||||
b *0x30000
|
||||
c
|
||||
dis 1
|
||||
setup
|
||||
tlb_init
|
||||
load_modules
|
||||
boot
|
||||
Reference in New Issue
Block a user