lk/linux-kernel-test
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

perf_counter: powerpc: use u64 for event codes internally

Browse Source 
Although the perf_counter API allows 63-bit raw event codes,
internally in the powerpc back-end we had been using 32-bit
event codes.  This expands them to 64 bits so that we can add
bits for specifying threshold start/stop events and instruction
sampling modes later.

This also corrects the return value of can_go_on_limited_pmc;
we were returning an event code rather than just a 0/1 value in
some circumstances. That didn't particularly matter while event
codes were 32-bit, but now that event codes are 64-bit it
might, so this fixes it.

[ Impact: extend PowerPC perfcounter interfaces from u32 to u64 ]

Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
LKML-Reference: <18955.36874.472452.353104@drongo.ozlabs.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Paul Mackerras
2009-05-14 13:29:14 +10:00
committed by Ingo Molnar
parent 2e569d3672
commit ef923214a4
7 changed files with 48 additions and 52 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
arch/powerpc/kernel/power5-pmu.c
View File

@@ -139,7 +139,7 @@ static u64 unit_cons[PM_LASTUNIT+1][2] = {
[PM_GRS] = { 0x30002000000000ull, 0x30000400000000ull },
};
static int power5_get_constraint(unsigned int event, u64 *maskp, u64 *valp)
static int power5_get_constraint(u64 event, u64 *maskp, u64 *valp)
{
int pmc, byte, unit, sh;
int bit, fmask;
@@ -224,7 +224,7 @@ static const unsigned int event_alternatives[][MAX_ALT] = {
* Scan the alternatives table for a match and return the
* index into the alternatives table if found, else -1.
*/
static int find_alternative(unsigned int event)
static int find_alternative(u64 event)
{
int i, j;
@@ -250,7 +250,7 @@ static const unsigned char bytedecode_alternatives[4][4] = {
* PMCSEL values on other counters. This returns the alternative
* event code for those that do, or -1 otherwise.
*/
static int find_alternative_bdecode(unsigned int event)
static u64 find_alternative_bdecode(u64 event)
{
int pmc, altpmc, pp, j;
@@ -269,10 +269,10 @@ static int find_alternative_bdecode(unsigned int event)
return -1;
}
static int power5_get_alternatives(unsigned int event, unsigned int flags,
unsigned int alt[])
static int power5_get_alternatives(u64 event, unsigned int flags, u64 alt[])
{
int i, j, ae, nalt = 1;
int i, j, nalt = 1;
u64 ae;
alt[0] = event;
nalt = 1;
@@ -338,7 +338,7 @@ static unsigned char direct_event_is_marked[0x28] = {
* Returns 1 if event counts things relating to marked instructions
* and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
*/
static int power5_marked_instr_event(unsigned int event)
static int power5_marked_instr_event(u64 event)
{
int pmc, psel;
int bit, byte, unit;
@@ -382,7 +382,7 @@ static int power5_marked_instr_event(unsigned int event)
return (mask >> (byte * 8 + bit)) & 1;
}
static int power5_compute_mmcr(unsigned int event[], int n_ev,
static int power5_compute_mmcr(u64 event[], int n_ev,
unsigned int hwc[], u64 mmcr[])
{
u64 mmcr1 = 0;