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m68knommu: merge old ColdFire interrupt controller masking macros

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Currently the code that supports setting the old style ColdFire interrupt
controller mask registers is macros in the include files of each of the
CPU types. Merge all these into a set of real masking functions in the
old Coldfire interrupt controller code proper. All the macros are basically
the same (excepting a register size difference on really early parts).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer
2009-05-19 14:38:08 +10:00
parent 5187995f0a
commit f2154bef81
11 changed files with 109 additions and 140 deletions
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16
arch/m68k/include/asm/m5206sim.h
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@@ -117,21 +117,11 @@
#define MCFSIM_DMA2ICR MCFSIM_ICR15 /* DMA 2 ICR */
#endif
#if defined(CONFIG_M5206e)
#define MCFSIM_IMR_MASKALL 0xfffe /* All SIM intr sources */
#endif
/*
* Macro to get and set IMR register. It is 16 bits on the 5206.
* Let the common interrupt handler code know that the ColdFire 5206*
* family of CPU's only has a 16bit sized IMR register.
*/
#define mcf_getimr() \
*((volatile unsigned short *) (MCF_MBAR + MCFSIM_IMR))
#define mcf_setimr(imr) \
*((volatile unsigned short *) (MCF_MBAR + MCFSIM_IMR)) = (imr)
#define mcf_getipr() \
*((volatile unsigned short *) (MCF_MBAR + MCFSIM_IPR))
#define MCFSIM_IMR_IS_16BITS
/****************************************************************************/
#endif /* m5206sim_h */