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m68knommu: merge old ColdFire interrupt controller masking macros

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Currently the code that supports setting the old style ColdFire interrupt
controller mask registers is macros in the include files of each of the
CPU types. Merge all these into a set of real masking functions in the
old Coldfire interrupt controller code proper. All the macros are basically
the same (excepting a register size difference on really early parts).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer
2009-05-19 14:38:08 +10:00
parent 5187995f0a
commit f2154bef81
11 changed files with 109 additions and 140 deletions
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13
arch/m68k/include/asm/m5407sim.h
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@@ -96,19 +96,6 @@
#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */
/*
* Macro to set IMR register. It is 32 bits on the 5407.
*/
#define mcf_getimr() \
*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))
#define mcf_setimr(imr) \
*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
#define mcf_getipr() \
*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR))
/*
* Some symbol defines for the Parallel Port Pin Assignment Register
*/