powerpc/of: add eSPI controller dts bindings and DTS modification
Also modifiy the document of cell-index in SPI controller. Add the SPI flash(s25fl128p01) support on p4080ds and mpc8536ds board. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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@@ -1,7 +1,9 @@
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* SPI (Serial Peripheral Interface)
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* SPI (Serial Peripheral Interface)
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Required properties:
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Required properties:
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- cell-index : SPI controller index.
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- cell-index : QE SPI subblock index.
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0: QE subblock SPI1
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1: QE subblock SPI2
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- compatible : should be "fsl,spi".
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- compatible : should be "fsl,spi".
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- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
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- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
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- reg : Offset and length of the register set for the device
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- reg : Offset and length of the register set for the device
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@@ -29,3 +31,23 @@ Example:
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gpios = <&gpio 18 1 // device reg=<0>
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gpios = <&gpio 18 1 // device reg=<0>
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&gpio 19 1>; // device reg=<1>
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&gpio 19 1>; // device reg=<1>
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};
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};
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* eSPI (Enhanced Serial Peripheral Interface)
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Required properties:
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- compatible : should be "fsl,mpc8536-espi".
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- reg : Offset and length of the register set for the device.
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- interrupts : should contain eSPI interrupt, the device has one interrupt.
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- fsl,espi-num-chipselects : the number of the chipselect signals.
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Example:
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spi@110000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc8536-espi";
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reg = <0x110000 0x1000>;
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interrupts = <53 0x2>;
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interrupt-parent = <&mpic>;
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fsl,espi-num-chipselects = <4>;
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};
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@@ -108,6 +108,58 @@
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};
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};
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};
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};
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spi@7000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc8536-espi";
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reg = <0x7000 0x1000>;
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interrupts = <59 0x2>;
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interrupt-parent = <&mpic>;
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fsl,espi-num-chipselects = <4>;
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,s25sl12801";
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reg = <0>;
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spi-max-frequency = <40000000>;
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partition@u-boot {
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label = "u-boot";
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reg = <0x00000000 0x00100000>;
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read-only;
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};
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partition@kernel {
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label = "kernel";
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reg = <0x00100000 0x00500000>;
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read-only;
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};
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partition@dtb {
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label = "dtb";
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reg = <0x00600000 0x00100000>;
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read-only;
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};
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partition@fs {
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label = "file system";
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reg = <0x00700000 0x00900000>;
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};
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};
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flash@1 {
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compatible = "spansion,s25sl12801";
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reg = <1>;
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spi-max-frequency = <40000000>;
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};
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flash@2 {
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compatible = "spansion,s25sl12801";
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reg = <2>;
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spi-max-frequency = <40000000>;
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};
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flash@3 {
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compatible = "spansion,s25sl12801";
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reg = <3>;
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spi-max-frequency = <40000000>;
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};
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};
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dma@21300 {
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dma@21300 {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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@@ -236,22 +236,19 @@
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};
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};
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spi@110000 {
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spi@110000 {
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cell-index = <0>;
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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compatible = "fsl,espi";
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compatible = "fsl,p4080-espi", "fsl,mpc8536-espi";
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reg = <0x110000 0x1000>;
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reg = <0x110000 0x1000>;
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interrupts = <53 0x2>;
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interrupts = <53 0x2>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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espi,num-ss-bits = <4>;
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fsl,espi-num-chipselects = <4>;
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mode = "cpu";
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fsl_m25p80@0 {
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flash@0 {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,espi-flash";
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compatible = "spansion,s25sl12801";
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reg = <0>;
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reg = <0>;
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linux,modalias = "fsl_m25p80";
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spi-max-frequency = <40000000>; /* input clock */
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spi-max-frequency = <40000000>; /* input clock */
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partition@u-boot {
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partition@u-boot {
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label = "u-boot";
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label = "u-boot";
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