drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabled
Avoid needless uvd reprogramming if uvd powergating is disabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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@@ -1491,17 +1491,20 @@ void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate)
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pi->uvd_power_gated = gate;
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pi->uvd_power_gated = gate;
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if (gate) {
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if (gate) {
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uvd_v1_0_stop(rdev);
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if (pi->caps_uvd_pg) {
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cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);
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uvd_v1_0_stop(rdev);
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cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);
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}
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kv_update_uvd_dpm(rdev, gate);
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kv_update_uvd_dpm(rdev, gate);
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if (pi->caps_uvd_pg)
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if (pi->caps_uvd_pg)
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kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerOFF);
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kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerOFF);
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} else {
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} else {
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if (pi->caps_uvd_pg)
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if (pi->caps_uvd_pg) {
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kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON);
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kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON);
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uvd_v4_2_resume(rdev);
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uvd_v4_2_resume(rdev);
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uvd_v1_0_start(rdev);
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uvd_v1_0_start(rdev);
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cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);
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cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);
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}
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kv_update_uvd_dpm(rdev, gate);
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kv_update_uvd_dpm(rdev, gate);
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}
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}
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}
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}
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