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drm/radeon/kms: Update memory bandwidth requirements in mode_set_base hook.

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The hook may change the number of bytes per pixel being scanned out, which
affects the CRTC memory bandwidth requirements. E.g. booting in 8bpp and then
running X in 32bpp would result in the bandwidth requirements being
underestimated for the latter and consequently in CRTC FIFO underruns causing
visible artifacts with 3D intensive workloads.

ATOM changes only compile-tested.

Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Michel Dänzer
2009-10-08 10:44:09 +02:00
committed by Dave Airlie
parent e33497aaae
commit f30f37def4
2 changed files with 8 additions and 4 deletions
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5
drivers/gpu/drm/radeon/atombios_crtc.c
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@ -563,6 +563,10 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
radeon_fb = to_radeon_framebuffer(old_fb);
radeon_gem_object_unpin(radeon_fb->obj);
}
/* Bytes per pixel may have changed */
radeon_bandwidth_update(rdev);
return 0;
}
@ -701,7 +705,6 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
}
atombios_overscan_setup(crtc, mode, adjusted_mode);
atombios_scaler_setup(crtc);
radeon_bandwidth_update(rdev);
return 0;
}