be2net: fix tx completion polling
In tx/mcc polling, napi_complete() is being incorrectly called before reaping tx completions. This can cause tx compl processing to be scheduled on another cpu concurrently which can result in a panic. This if fixed by calling napi complete() after tx/mcc compl processing but before re-enabling interrupts (via a cq notify). Signed-off-by: Sathya Perla <sathyap@serverengines.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller
parent
b88aafd365
commit
f31e50a802
@@ -583,7 +583,7 @@ static void be_set_multicast_list(struct net_device *netdev)
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}
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be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
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&adapter->mc_cmd_mem);
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&adapter->mc_cmd_mem);
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done:
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return;
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}
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@@ -1469,23 +1469,38 @@ int be_poll_rx(struct napi_struct *napi, int budget)
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return work_done;
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}
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void be_process_tx(struct be_adapter *adapter)
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/* As TX and MCC share the same EQ check for both TX and MCC completions.
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* For TX/MCC we don't honour budget; consume everything
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*/
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static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
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{
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struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
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struct be_adapter *adapter =
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container_of(tx_eq, struct be_adapter, tx_eq);
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struct be_queue_info *txq = &adapter->tx_obj.q;
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struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
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struct be_eth_tx_compl *txcp;
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u32 num_cmpl = 0;
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int tx_compl = 0, mcc_compl, status = 0;
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u16 end_idx;
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while ((txcp = be_tx_compl_get(tx_cq))) {
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end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
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wrb_index, txcp);
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wrb_index, txcp);
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be_tx_compl_process(adapter, end_idx);
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num_cmpl++;
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tx_compl++;
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}
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if (num_cmpl) {
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be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
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mcc_compl = be_process_mcc(adapter, &status);
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napi_complete(napi);
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if (mcc_compl) {
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struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
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be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
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}
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if (tx_compl) {
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be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
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/* As Tx wrbs have been freed up, wake up netdev queue if
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* it was stopped due to lack of tx wrbs.
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@@ -1496,24 +1511,8 @@ void be_process_tx(struct be_adapter *adapter)
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}
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drvr_stats(adapter)->be_tx_events++;
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drvr_stats(adapter)->be_tx_compl += num_cmpl;
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drvr_stats(adapter)->be_tx_compl += tx_compl;
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}
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}
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/* As TX and MCC share the same EQ check for both TX and MCC completions.
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* For TX/MCC we don't honour budget; consume everything
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*/
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static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
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{
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struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
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struct be_adapter *adapter =
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container_of(tx_eq, struct be_adapter, tx_eq);
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napi_complete(napi);
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be_process_tx(adapter);
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be_process_mcc(adapter);
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return 1;
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}
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