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tg3: Move TG3_FLG2_PROTECTED_NVRAM to tg3_flags3

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We need room for another TSO flag and it would be most efficient if it
resided in tg3_flags2.  This patch moves the TG3_FLG2_PROTECTED_NVRAM
to tg3_flags3 to make room.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson
2009-11-13 13:03:36 +00:00
committed by David S. Miller
parent 24f4efd4e6
commit f66a29b03a
2 changed files with 7 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/net/tg3.c
View File

@@ -2249,7 +2249,7 @@ static void tg3_nvram_unlock(struct tg3 *tp)
static void tg3_enable_nvram_access(struct tg3 *tp) static void tg3_enable_nvram_access(struct tg3 *tp)
{ {
if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
!(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) { !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM)) {
u32 nvaccess = tr32(NVRAM_ACCESS); u32 nvaccess = tr32(NVRAM_ACCESS);
tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE); tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
@@ -2260,7 +2260,7 @@ static void tg3_enable_nvram_access(struct tg3 *tp)
static void tg3_disable_nvram_access(struct tg3 *tp) static void tg3_disable_nvram_access(struct tg3 *tp)
{ {
if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
!(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) { !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM)) {
u32 nvaccess = tr32(NVRAM_ACCESS); u32 nvaccess = tr32(NVRAM_ACCESS);
tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE); tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
@@ -10970,7 +10970,7 @@ static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp)
/* NVRAM protection for TPM */ /* NVRAM protection for TPM */
if (nvcfg1 & (1 << 27)) if (nvcfg1 & (1 << 27))
tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM; tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;
switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {
case FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ: case FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ:
@@ -11011,7 +11011,7 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp)
/* NVRAM protection for TPM */ /* NVRAM protection for TPM */
if (nvcfg1 & (1 << 27)) { if (nvcfg1 & (1 << 27)) {
tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM; tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;
protect = 1; protect = 1;
} }
@@ -11105,7 +11105,7 @@ static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp)
/* NVRAM protection for TPM */ /* NVRAM protection for TPM */
if (nvcfg1 & (1 << 27)) { if (nvcfg1 & (1 << 27)) {
tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM; tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;
protect = 1; protect = 1;
} }
@@ -11607,7 +11607,7 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
tg3_enable_nvram_access(tp); tg3_enable_nvram_access(tp);
if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
!(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM))
tw32(NVRAM_WRITE1, 0x406); tw32(NVRAM_WRITE1, 0x406);
grc_mode = tr32(GRC_MODE); grc_mode = tr32(GRC_MODE);

2
drivers/net/tg3.h
View File

@@ -2753,7 +2753,6 @@ struct tg3 {
#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000 #define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000
#define TG3_FLG2_5705_PLUS 0x00040000 #define TG3_FLG2_5705_PLUS 0x00040000
#define TG3_FLG2_5750_PLUS 0x00080000 #define TG3_FLG2_5750_PLUS 0x00080000
#define TG3_FLG2_PROTECTED_NVRAM 0x00100000
#define TG3_FLG2_USING_MSI 0x00200000 #define TG3_FLG2_USING_MSI 0x00200000
#define TG3_FLG2_USING_MSIX 0x00400000 #define TG3_FLG2_USING_MSIX 0x00400000
#define TG3_FLG2_USING_MSI_OR_MSIX (TG3_FLG2_USING_MSI | \ #define TG3_FLG2_USING_MSI_OR_MSIX (TG3_FLG2_USING_MSI | \
@@ -2773,6 +2772,7 @@ struct tg3 {
u32 tg3_flags3; u32 tg3_flags3;
#define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001 #define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001
#define TG3_FLG3_ENABLE_APE 0x00000002 #define TG3_FLG3_ENABLE_APE 0x00000002
#define TG3_FLG3_PROTECTED_NVRAM 0x00000004
#define TG3_FLG3_5701_DMA_BUG 0x00000008 #define TG3_FLG3_5701_DMA_BUG 0x00000008
#define TG3_FLG3_USE_PHYLIB 0x00000010 #define TG3_FLG3_USE_PHYLIB 0x00000010
#define TG3_FLG3_MDIOBUS_INITED 0x00000020 #define TG3_FLG3_MDIOBUS_INITED 0x00000020