i386: move kernel/cpu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
192
arch/x86/kernel/cpu/proc.c
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192
arch/x86/kernel/cpu/proc.c
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#include <linux/smp.h>
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#include <linux/timex.h>
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#include <linux/string.h>
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#include <asm/semaphore.h>
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#include <linux/seq_file.h>
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#include <linux/cpufreq.h>
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/*
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* Get CPU information for use by the procfs.
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*/
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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/*
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* These flag bits must match the definitions in <asm/cpufeature.h>.
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* NULL means this bit is undefined or reserved; either way it doesn't
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* have meaning as far as Linux is concerned. Note that it's important
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* to realize there is a difference between this table and CPUID -- if
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* applications want to get the raw CPUID data, they should access
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* /dev/cpu/<cpu_nr>/cpuid instead.
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*/
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static const char * const x86_cap_flags[] = {
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/* Intel-defined */
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"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
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"pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
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"fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
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/* AMD-defined */
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
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NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
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"3dnowext", "3dnow",
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/* Transmeta-defined */
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"recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Other (Linux-defined) */
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"cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
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NULL, NULL, NULL, NULL,
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"constant_tsc", "up", NULL, "arch_perfmon",
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"pebs", "bts", NULL, "sync_rdtsc",
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"rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Intel-defined (#2) */
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"pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
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"tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
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NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt",
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* VIA/Cyrix/Centaur-defined */
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NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
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"ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* AMD-defined (#2) */
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"lahf_lm", "cmp_legacy", "svm", "extapic", "cr8_legacy",
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"altmovcr8", "abm", "sse4a",
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"misalignsse", "3dnowprefetch",
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"osvw", "ibs", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Auxiliary (Linux-defined) */
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"ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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static const char * const x86_power_flags[] = {
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"ts", /* temperature sensor */
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"fid", /* frequency id control */
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"vid", /* voltage id control */
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"ttp", /* thermal trip */
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"tm",
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"stc",
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"100mhzsteps",
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"hwpstate",
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"", /* constant_tsc - moved to flags */
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/* nothing */
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};
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struct cpuinfo_x86 *c = v;
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int i, n = c - cpu_data;
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int fpu_exception;
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#ifdef CONFIG_SMP
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if (!cpu_online(n))
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return 0;
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#endif
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seq_printf(m, "processor\t: %d\n"
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"vendor_id\t: %s\n"
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"cpu family\t: %d\n"
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"model\t\t: %d\n"
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"model name\t: %s\n",
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n,
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c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
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c->x86,
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c->x86_model,
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c->x86_model_id[0] ? c->x86_model_id : "unknown");
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if (c->x86_mask || c->cpuid_level >= 0)
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seq_printf(m, "stepping\t: %d\n", c->x86_mask);
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else
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seq_printf(m, "stepping\t: unknown\n");
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if ( cpu_has(c, X86_FEATURE_TSC) ) {
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unsigned int freq = cpufreq_quick_get(n);
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if (!freq)
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freq = cpu_khz;
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seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
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freq / 1000, (freq % 1000));
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}
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/* Cache size */
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if (c->x86_cache_size >= 0)
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seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
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#ifdef CONFIG_X86_HT
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if (c->x86_max_cores * smp_num_siblings > 1) {
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seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
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seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[n]));
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seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
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seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
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}
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#endif
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/* We use exception 16 if we have hardware math and we've either seen it or the CPU claims it is internal */
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fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu);
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seq_printf(m, "fdiv_bug\t: %s\n"
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"hlt_bug\t\t: %s\n"
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"f00f_bug\t: %s\n"
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"coma_bug\t: %s\n"
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"fpu\t\t: %s\n"
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"fpu_exception\t: %s\n"
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"cpuid level\t: %d\n"
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"wp\t\t: %s\n"
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"flags\t\t:",
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c->fdiv_bug ? "yes" : "no",
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c->hlt_works_ok ? "no" : "yes",
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c->f00f_bug ? "yes" : "no",
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c->coma_bug ? "yes" : "no",
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c->hard_math ? "yes" : "no",
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fpu_exception ? "yes" : "no",
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c->cpuid_level,
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c->wp_works_ok ? "yes" : "no");
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for ( i = 0 ; i < 32*NCAPINTS ; i++ )
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if ( test_bit(i, c->x86_capability) &&
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x86_cap_flags[i] != NULL )
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seq_printf(m, " %s", x86_cap_flags[i]);
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for (i = 0; i < 32; i++)
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if (c->x86_power & (1 << i)) {
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if (i < ARRAY_SIZE(x86_power_flags) &&
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x86_power_flags[i])
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seq_printf(m, "%s%s",
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x86_power_flags[i][0]?" ":"",
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x86_power_flags[i]);
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else
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seq_printf(m, " [%d]", i);
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}
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seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
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c->loops_per_jiffy/(500000/HZ),
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(c->loops_per_jiffy/(5000/HZ)) % 100);
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seq_printf(m, "clflush size\t: %u\n\n", c->x86_clflush_size);
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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return *pos < NR_CPUS ? cpu_data + *pos : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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