Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Olof Johansson:
 "Most of this branch consists of updates, additions and general churn
  of the device tree source files in the kernel (arch/arm/boot/dts).
  Besides that, there are a few things to point out:

   - Lots of platform conversion on OMAP2+, with removal of old board
     files for various platforms.
   - Final conversion of a bunch of ux500 (ST-Ericsson) platforms as
     well
   - Some updates to pinctrl and other subsystems.  Most of these are
     for DT-enablement of the various platforms and acks have been
     collected"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (385 commits)
  ARM: dts: bcm11351: Use GIC/IRQ defines for sdio interrupts
  ARM: dts: bcm: Add missing UARTs for bcm11351 (bcm281xx)
  ARM: dts: bcm281xx: Add card detect GPIO
  ARM: dts: rename ARCH_BCM to ARCH_BCM_MOBILE (dt)
  ARM: bcm281xx: Add device node for the GPIO controller
  ARM: mvebu: Add Netgear ReadyNAS 104 board
  ARM: tegra: fix Tegra114 IOMMU register address
  ARM: kirkwood: add support for OpenBlocks A7 platform
  ARM: dts: omap4-panda: add DPI pinmuxing
  ARM: dts: AM33xx: Add RNG node
  ARM: dts: AM33XX: Add hwspinlock node
  ARM: dts: OMAP5: Add hwspinlock node
  ARM: dts: OMAP4: Add hwspinlock node
  ARM: dts: use 'status' property for PCIe nodes
  ARM: dts: sirf: add missed address-cells and size-cells for prima2 I2C
  ARM: dts: sirf: add missed cell, cs and dma channel for SPI nodes
  ARM: dts: sirf: add missed graphics2d iobg in atlas6 dts
  ARM: dts: sirf: add missed chhifbg node in prima2 and atlas6 dts
  ARM: dts: sirf: add missed memcontrol-monitor node in prima2 and atlas6 dts
  ARM: mvebu: Add the core-divider clock to Armada 370/XP
  ...
This commit is contained in:
Linus Torvalds
2013-11-11 17:34:56 +09:00
274 changed files with 15369 additions and 8905 deletions

View File

@@ -21,7 +21,8 @@ Required properties:
Optional properties: Optional properties:
- ti,no_idle_on_suspend: When present, it prevents the PM to idle the module - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
during suspend. during suspend.
- ti,no-reset-on-init: When present, the module should not be reset at init
- ti,no-idle-on-init: When present, the module should not be idled at init
Example: Example:

View File

@@ -18,6 +18,15 @@ Required properties:
Optional properties: Optional properties:
- interrupts : Interrupt source for parent controllers if the VIC is nested. - interrupts : Interrupt source for parent controllers if the VIC is nested.
- valid-mask : A one cell big bit mask of valid interrupt sources. Each bit
represents single interrupt source, starting from source 0 at LSb and ending
at source 31 at MSb. A bit that is set means that the source is wired and
clear means otherwise. If unspecified, defaults to all valid.
- valid-wakeup-mask : A one cell big bit mask of interrupt sources that can be
configured as wake up source for the system. Order of bits is the same as for
valid-mask property. A set bit means that this interrupt source can be
configured as a wake up source for the system. If unspecied, defaults to all
interrupt sources configurable as wake up sources.
Example: Example:
@@ -26,4 +35,7 @@ Example:
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
reg = <0x60000 0x1000>; reg = <0x60000 0x1000>;
valid-mask = <0xffffff7f>;
valid-wakeup-mask = <0x0000ff7f>;
}; };

View File

@@ -0,0 +1,19 @@
* Core Divider Clock bindings for Marvell MVEBU SoCs
The following is a list of provided IDs and clock names on Armada 370/XP:
0 = nand (NAND clock)
Required properties:
- compatible : must be "marvell,armada-370-corediv-clock"
- reg : must be the register address of Core Divider control register
- #clock-cells : from common clock binding; shall be set to 1
- clocks : must be set to the parent's phandle
Example:
corediv_clk: corediv-clocks@18740 {
compatible = "marvell,armada-370-corediv-clock";
reg = <0x18740 0xc>;
#clock-cells = <1>;
clocks = <&pll>;
};

View File

@@ -0,0 +1,31 @@
OMAP SoC AES crypto Module
Required properties:
- compatible : Should contain entries for this and backward compatible
AES versions:
- "ti,omap2-aes" for OMAP2.
- "ti,omap3-aes" for OMAP3.
- "ti,omap4-aes" for OMAP4 and AM33XX.
Note that the OMAP2 and 3 versions are compatible (OMAP3 supports
more algorithms) but they are incompatible with OMAP4.
- ti,hwmods: Name of the hwmod associated with the AES module
- reg : Offset and length of the register set for the module
- interrupts : the interrupt-specifier for the AES module.
Optional properties:
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
Example:
/* AM335x */
aes: aes@53500000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x53500000 0xa0>;
interrupts = <102>;
dmas = <&edma 6>,
<&edma 5>;
dma-names = "tx", "rx";
};

View File

@@ -0,0 +1,28 @@
OMAP SoC SHA crypto Module
Required properties:
- compatible : Should contain entries for this and backward compatible
SHAM versions:
- "ti,omap2-sham" for OMAP2 & OMAP3.
- "ti,omap4-sham" for OMAP4 and AM33XX.
Note that these two versions are incompatible.
- ti,hwmods: Name of the hwmod associated with the SHAM module
- reg : Offset and length of the register set for the module
- interrupts : the interrupt-specifier for the SHAM module.
Optional properties:
- dmas: DMA specifiers for the rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request name. Should be "rx" if a dma is present.
Example:
/* AM335x */
sham: sham@53100000 {
compatible = "ti,omap4-sham";
ti,hwmods = "sham";
reg = <0x53100000 0x200>;
interrupts = <109>;
dmas = <&edma 36>;
dma-names = "rx";
};

View File

@@ -0,0 +1,22 @@
OMAP SoC HWRNG Module
Required properties:
- compatible : Should contain entries for this and backward compatible
RNG versions:
- "ti,omap2-rng" for OMAP2.
- "ti,omap4-rng" for OMAP4, OMAP5 and AM33XX.
Note that these two versions are incompatible.
- ti,hwmods: Name of the hwmod associated with the RNG module
- reg : Offset and length of the register set for the module
- interrupts : the interrupt number for the RNG module.
Only used for "ti,omap4-rng".
Example:
/* AM335x */
rng: rng@48310000 {
compatible = "ti,omap4-rng";
ti,hwmods = "rng";
reg = <0x48310000 0x2000>;
interrupts = <111>;
};

View File

@@ -20,8 +20,17 @@ ti,dual-volt: boolean, supports dual voltage cards
ti,non-removable: non-removable slot (like eMMC) ti,non-removable: non-removable slot (like eMMC)
ti,needs-special-reset: Requires a special softreset sequence ti,needs-special-reset: Requires a special softreset sequence
ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
dmas: List of DMA specifiers with the controller specific format
as described in the generic DMA client binding. A tx and rx
specifier is required.
dma-names: List of DMA request names. These strings correspond
1:1 with the DMA specifiers listed in dmas. The string naming is
to be "rx" and "tx" for RX and TX DMA requests, respectively.
Examples:
[hwmod populated DMA resources]
Example:
mmc1: mmc@0x4809c000 { mmc1: mmc@0x4809c000 {
compatible = "ti,omap4-hsmmc"; compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>; reg = <0x4809c000 0x400>;
@@ -31,3 +40,18 @@ Example:
vmmc-supply = <&vmmc>; /* phandle to regulator node */ vmmc-supply = <&vmmc>; /* phandle to regulator node */
ti,non-removable; ti,non-removable;
}; };
[generic DMA request binding]
mmc1: mmc@0x4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
ti,hwmods = "mmc1";
ti,dual-volt;
bus-width = <4>;
vmmc-supply = <&vmmc>; /* phandle to regulator node */
ti,non-removable;
dmas = <&edma 24
&edma 25>;
dma-names = "tx", "rx";
};

View File

@@ -59,16 +59,16 @@ Required subnode-properties:
Optional subnode-properties: Optional subnode-properties:
- fsl,drive-strength: Integer. - fsl,drive-strength: Integer.
0: 4 mA 0: MXS_DRIVE_4mA
1: 8 mA 1: MXS_DRIVE_8mA
2: 12 mA 2: MXS_DRIVE_12mA
3: 16 mA 3: MXS_DRIVE_16mA
- fsl,voltage: Integer. - fsl,voltage: Integer.
0: 1.8 V 0: MXS_VOLTAGE_LOW - 1.8 V
1: 3.3 V 1: MXS_VOLTAGE_HIGH - 3.3 V
- fsl,pull-up: Integer. - fsl,pull-up: Integer.
0: Disable the internal pull-up 0: MXS_PULL_DISABLE - Disable the internal pull-up
1: Enable the internal pull-up 1: MXS_PULL_ENABLE - Enable the internal pull-up
Note that when enabling the pull-up, the internal pad keeper gets disabled. Note that when enabling the pull-up, the internal pad keeper gets disabled.
Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up
@@ -85,23 +85,32 @@ pinctrl@80018000 {
mmc0_8bit_pins_a: mmc0-8bit@0 { mmc0_8bit_pins_a: mmc0-8bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2000 0x2010 0x2020 0x2030 MX28_PAD_SSP0_DATA0__SSP0_D0
0x2040 0x2050 0x2060 0x2070 MX28_PAD_SSP0_DATA1__SSP0_D1
0x2080 0x2090 0x20a0>; MX28_PAD_SSP0_DATA2__SSP0_D2
fsl,drive-strength = <1>; MX28_PAD_SSP0_DATA3__SSP0_D3
fsl,voltage = <1>; MX28_PAD_SSP0_DATA4__SSP0_D4
fsl,pull-up = <1>; MX28_PAD_SSP0_DATA5__SSP0_D5
MX28_PAD_SSP0_DATA6__SSP0_D6
MX28_PAD_SSP0_DATA7__SSP0_D7
MX28_PAD_SSP0_CMD__SSP0_CMD
MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
MX28_PAD_SSP0_SCK__SSP0_SCK
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mmc_cd_cfg: mmc-cd-cfg { mmc_cd_cfg: mmc-cd-cfg {
fsl,pinmux-ids = <0x2090>; fsl,pinmux-ids = <MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
mmc_sck_cfg: mmc-sck-cfg { mmc_sck_cfg: mmc-sck-cfg {
fsl,pinmux-ids = <0x20a0>; fsl,pinmux-ids = <MX28_PAD_SSP0_SCK__SSP0_SCK>;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };
@@ -112,811 +121,7 @@ adjusting the configuration for pins card-detection and clock from what group
node mmc0-8bit defines. Only the configuration properties to be adjusted need node mmc0-8bit defines. Only the configuration properties to be adjusted need
to be listed in the config nodes. to be listed in the config nodes.
Valid values for i.MX28 pinmux-id: Valid values for i.MX28/i.MX23 pinmux-id are defined in
arch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h.
pinmux id The definitions for the padconfig properties can be found in
------ -- arch/arm/boot/dts/mxs-pinfunc.h.
MX28_PAD_GPMI_D00__GPMI_D0 0x0000
MX28_PAD_GPMI_D01__GPMI_D1 0x0010
MX28_PAD_GPMI_D02__GPMI_D2 0x0020
MX28_PAD_GPMI_D03__GPMI_D3 0x0030
MX28_PAD_GPMI_D04__GPMI_D4 0x0040
MX28_PAD_GPMI_D05__GPMI_D5 0x0050
MX28_PAD_GPMI_D06__GPMI_D6 0x0060
MX28_PAD_GPMI_D07__GPMI_D7 0x0070
MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
MX28_PAD_GPMI_CE2N__GPMI_CE2N 0x0120
MX28_PAD_GPMI_CE3N__GPMI_CE3N 0x0130
MX28_PAD_GPMI_RDY0__GPMI_READY0 0x0140
MX28_PAD_GPMI_RDY1__GPMI_READY1 0x0150
MX28_PAD_GPMI_RDY2__GPMI_READY2 0x0160
MX28_PAD_GPMI_RDY3__GPMI_READY3 0x0170
MX28_PAD_GPMI_RDN__GPMI_RDN 0x0180
MX28_PAD_GPMI_WRN__GPMI_WRN 0x0190
MX28_PAD_GPMI_ALE__GPMI_ALE 0x01a0
MX28_PAD_GPMI_CLE__GPMI_CLE 0x01b0
MX28_PAD_GPMI_RESETN__GPMI_RESETN 0x01c0
MX28_PAD_LCD_D00__LCD_D0 0x1000
MX28_PAD_LCD_D01__LCD_D1 0x1010
MX28_PAD_LCD_D02__LCD_D2 0x1020
MX28_PAD_LCD_D03__LCD_D3 0x1030
MX28_PAD_LCD_D04__LCD_D4 0x1040
MX28_PAD_LCD_D05__LCD_D5 0x1050
MX28_PAD_LCD_D06__LCD_D6 0x1060
MX28_PAD_LCD_D07__LCD_D7 0x1070
MX28_PAD_LCD_D08__LCD_D8 0x1080
MX28_PAD_LCD_D09__LCD_D9 0x1090
MX28_PAD_LCD_D10__LCD_D10 0x10a0
MX28_PAD_LCD_D11__LCD_D11 0x10b0
MX28_PAD_LCD_D12__LCD_D12 0x10c0
MX28_PAD_LCD_D13__LCD_D13 0x10d0
MX28_PAD_LCD_D14__LCD_D14 0x10e0
MX28_PAD_LCD_D15__LCD_D15 0x10f0
MX28_PAD_LCD_D16__LCD_D16 0x1100
MX28_PAD_LCD_D17__LCD_D17 0x1110
MX28_PAD_LCD_D18__LCD_D18 0x1120
MX28_PAD_LCD_D19__LCD_D19 0x1130
MX28_PAD_LCD_D20__LCD_D20 0x1140
MX28_PAD_LCD_D21__LCD_D21 0x1150
MX28_PAD_LCD_D22__LCD_D22 0x1160
MX28_PAD_LCD_D23__LCD_D23 0x1170
MX28_PAD_LCD_RD_E__LCD_RD_E 0x1180
MX28_PAD_LCD_WR_RWN__LCD_WR_RWN 0x1190
MX28_PAD_LCD_RS__LCD_RS 0x11a0
MX28_PAD_LCD_CS__LCD_CS 0x11b0
MX28_PAD_LCD_VSYNC__LCD_VSYNC 0x11c0
MX28_PAD_LCD_HSYNC__LCD_HSYNC 0x11d0
MX28_PAD_LCD_DOTCLK__LCD_DOTCLK 0x11e0
MX28_PAD_LCD_ENABLE__LCD_ENABLE 0x11f0
MX28_PAD_SSP0_DATA0__SSP0_D0 0x2000
MX28_PAD_SSP0_DATA1__SSP0_D1 0x2010
MX28_PAD_SSP0_DATA2__SSP0_D2 0x2020
MX28_PAD_SSP0_DATA3__SSP0_D3 0x2030
MX28_PAD_SSP0_DATA4__SSP0_D4 0x2040
MX28_PAD_SSP0_DATA5__SSP0_D5 0x2050
MX28_PAD_SSP0_DATA6__SSP0_D6 0x2060
MX28_PAD_SSP0_DATA7__SSP0_D7 0x2070
MX28_PAD_SSP0_CMD__SSP0_CMD 0x2080
MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT 0x2090
MX28_PAD_SSP0_SCK__SSP0_SCK 0x20a0
MX28_PAD_SSP1_SCK__SSP1_SCK 0x20c0
MX28_PAD_SSP1_CMD__SSP1_CMD 0x20d0
MX28_PAD_SSP1_DATA0__SSP1_D0 0x20e0
MX28_PAD_SSP1_DATA3__SSP1_D3 0x20f0
MX28_PAD_SSP2_SCK__SSP2_SCK 0x2100
MX28_PAD_SSP2_MOSI__SSP2_CMD 0x2110
MX28_PAD_SSP2_MISO__SSP2_D0 0x2120
MX28_PAD_SSP2_SS0__SSP2_D3 0x2130
MX28_PAD_SSP2_SS1__SSP2_D4 0x2140
MX28_PAD_SSP2_SS2__SSP2_D5 0x2150
MX28_PAD_SSP3_SCK__SSP3_SCK 0x2180
MX28_PAD_SSP3_MOSI__SSP3_CMD 0x2190
MX28_PAD_SSP3_MISO__SSP3_D0 0x21a0
MX28_PAD_SSP3_SS0__SSP3_D3 0x21b0
MX28_PAD_AUART0_RX__AUART0_RX 0x3000
MX28_PAD_AUART0_TX__AUART0_TX 0x3010
MX28_PAD_AUART0_CTS__AUART0_CTS 0x3020
MX28_PAD_AUART0_RTS__AUART0_RTS 0x3030
MX28_PAD_AUART1_RX__AUART1_RX 0x3040
MX28_PAD_AUART1_TX__AUART1_TX 0x3050
MX28_PAD_AUART1_CTS__AUART1_CTS 0x3060
MX28_PAD_AUART1_RTS__AUART1_RTS 0x3070
MX28_PAD_AUART2_RX__AUART2_RX 0x3080
MX28_PAD_AUART2_TX__AUART2_TX 0x3090
MX28_PAD_AUART2_CTS__AUART2_CTS 0x30a0
MX28_PAD_AUART2_RTS__AUART2_RTS 0x30b0
MX28_PAD_AUART3_RX__AUART3_RX 0x30c0
MX28_PAD_AUART3_TX__AUART3_TX 0x30d0
MX28_PAD_AUART3_CTS__AUART3_CTS 0x30e0
MX28_PAD_AUART3_RTS__AUART3_RTS 0x30f0
MX28_PAD_PWM0__PWM_0 0x3100
MX28_PAD_PWM1__PWM_1 0x3110
MX28_PAD_PWM2__PWM_2 0x3120
MX28_PAD_SAIF0_MCLK__SAIF0_MCLK 0x3140
MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK 0x3150
MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK 0x3160
MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 0x3170
MX28_PAD_I2C0_SCL__I2C0_SCL 0x3180
MX28_PAD_I2C0_SDA__I2C0_SDA 0x3190
MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 0x31a0
MX28_PAD_SPDIF__SPDIF_TX 0x31b0
MX28_PAD_PWM3__PWM_3 0x31c0
MX28_PAD_PWM4__PWM_4 0x31d0
MX28_PAD_LCD_RESET__LCD_RESET 0x31e0
MX28_PAD_ENET0_MDC__ENET0_MDC 0x4000
MX28_PAD_ENET0_MDIO__ENET0_MDIO 0x4010
MX28_PAD_ENET0_RX_EN__ENET0_RX_EN 0x4020
MX28_PAD_ENET0_RXD0__ENET0_RXD0 0x4030
MX28_PAD_ENET0_RXD1__ENET0_RXD1 0x4040
MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK 0x4050
MX28_PAD_ENET0_TX_EN__ENET0_TX_EN 0x4060
MX28_PAD_ENET0_TXD0__ENET0_TXD0 0x4070
MX28_PAD_ENET0_TXD1__ENET0_TXD1 0x4080
MX28_PAD_ENET0_RXD2__ENET0_RXD2 0x4090
MX28_PAD_ENET0_RXD3__ENET0_RXD3 0x40a0
MX28_PAD_ENET0_TXD2__ENET0_TXD2 0x40b0
MX28_PAD_ENET0_TXD3__ENET0_TXD3 0x40c0
MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK 0x40d0
MX28_PAD_ENET0_COL__ENET0_COL 0x40e0
MX28_PAD_ENET0_CRS__ENET0_CRS 0x40f0
MX28_PAD_ENET_CLK__CLKCTRL_ENET 0x4100
MX28_PAD_JTAG_RTCK__JTAG_RTCK 0x4140
MX28_PAD_EMI_D00__EMI_DATA0 0x5000
MX28_PAD_EMI_D01__EMI_DATA1 0x5010
MX28_PAD_EMI_D02__EMI_DATA2 0x5020
MX28_PAD_EMI_D03__EMI_DATA3 0x5030
MX28_PAD_EMI_D04__EMI_DATA4 0x5040
MX28_PAD_EMI_D05__EMI_DATA5 0x5050
MX28_PAD_EMI_D06__EMI_DATA6 0x5060
MX28_PAD_EMI_D07__EMI_DATA7 0x5070
MX28_PAD_EMI_D08__EMI_DATA8 0x5080
MX28_PAD_EMI_D09__EMI_DATA9 0x5090
MX28_PAD_EMI_D10__EMI_DATA10 0x50a0
MX28_PAD_EMI_D11__EMI_DATA11 0x50b0
MX28_PAD_EMI_D12__EMI_DATA12 0x50c0
MX28_PAD_EMI_D13__EMI_DATA13 0x50d0
MX28_PAD_EMI_D14__EMI_DATA14 0x50e0
MX28_PAD_EMI_D15__EMI_DATA15 0x50f0
MX28_PAD_EMI_ODT0__EMI_ODT0 0x5100
MX28_PAD_EMI_DQM0__EMI_DQM0 0x5110
MX28_PAD_EMI_ODT1__EMI_ODT1 0x5120
MX28_PAD_EMI_DQM1__EMI_DQM1 0x5130
MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK 0x5140
MX28_PAD_EMI_CLK__EMI_CLK 0x5150
MX28_PAD_EMI_DQS0__EMI_DQS0 0x5160
MX28_PAD_EMI_DQS1__EMI_DQS1 0x5170
MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN 0x51a0
MX28_PAD_EMI_A00__EMI_ADDR0 0x6000
MX28_PAD_EMI_A01__EMI_ADDR1 0x6010
MX28_PAD_EMI_A02__EMI_ADDR2 0x6020
MX28_PAD_EMI_A03__EMI_ADDR3 0x6030
MX28_PAD_EMI_A04__EMI_ADDR4 0x6040
MX28_PAD_EMI_A05__EMI_ADDR5 0x6050
MX28_PAD_EMI_A06__EMI_ADDR6 0x6060
MX28_PAD_EMI_A07__EMI_ADDR7 0x6070
MX28_PAD_EMI_A08__EMI_ADDR8 0x6080
MX28_PAD_EMI_A09__EMI_ADDR9 0x6090
MX28_PAD_EMI_A10__EMI_ADDR10 0x60a0
MX28_PAD_EMI_A11__EMI_ADDR11 0x60b0
MX28_PAD_EMI_A12__EMI_ADDR12 0x60c0
MX28_PAD_EMI_A13__EMI_ADDR13 0x60d0
MX28_PAD_EMI_A14__EMI_ADDR14 0x60e0
MX28_PAD_EMI_BA0__EMI_BA0 0x6100
MX28_PAD_EMI_BA1__EMI_BA1 0x6110
MX28_PAD_EMI_BA2__EMI_BA2 0x6120
MX28_PAD_EMI_CASN__EMI_CASN 0x6130
MX28_PAD_EMI_RASN__EMI_RASN 0x6140
MX28_PAD_EMI_WEN__EMI_WEN 0x6150
MX28_PAD_EMI_CE0N__EMI_CE0N 0x6160
MX28_PAD_EMI_CE1N__EMI_CE1N 0x6170
MX28_PAD_EMI_CKE__EMI_CKE 0x6180
MX28_PAD_GPMI_D00__SSP1_D0 0x0001
MX28_PAD_GPMI_D01__SSP1_D1 0x0011
MX28_PAD_GPMI_D02__SSP1_D2 0x0021
MX28_PAD_GPMI_D03__SSP1_D3 0x0031
MX28_PAD_GPMI_D04__SSP1_D4 0x0041
MX28_PAD_GPMI_D05__SSP1_D5 0x0051
MX28_PAD_GPMI_D06__SSP1_D6 0x0061
MX28_PAD_GPMI_D07__SSP1_D7 0x0071
MX28_PAD_GPMI_CE0N__SSP3_D0 0x0101
MX28_PAD_GPMI_CE1N__SSP3_D3 0x0111
MX28_PAD_GPMI_CE2N__CAN1_TX 0x0121
MX28_PAD_GPMI_CE3N__CAN1_RX 0x0131
MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT 0x0141
MX28_PAD_GPMI_RDY1__SSP1_CMD 0x0151
MX28_PAD_GPMI_RDY2__CAN0_TX 0x0161
MX28_PAD_GPMI_RDY3__CAN0_RX 0x0171
MX28_PAD_GPMI_RDN__SSP3_SCK 0x0181
MX28_PAD_GPMI_WRN__SSP1_SCK 0x0191
MX28_PAD_GPMI_ALE__SSP3_D1 0x01a1
MX28_PAD_GPMI_CLE__SSP3_D2 0x01b1
MX28_PAD_GPMI_RESETN__SSP3_CMD 0x01c1
MX28_PAD_LCD_D03__ETM_DA8 0x1031
MX28_PAD_LCD_D04__ETM_DA9 0x1041
MX28_PAD_LCD_D08__ETM_DA3 0x1081
MX28_PAD_LCD_D09__ETM_DA4 0x1091
MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT 0x1141
MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN 0x1151
MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT 0x1161
MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN 0x1171
MX28_PAD_LCD_RD_E__LCD_VSYNC 0x1181
MX28_PAD_LCD_WR_RWN__LCD_HSYNC 0x1191
MX28_PAD_LCD_RS__LCD_DOTCLK 0x11a1
MX28_PAD_LCD_CS__LCD_ENABLE 0x11b1
MX28_PAD_LCD_VSYNC__SAIF1_SDATA0 0x11c1
MX28_PAD_LCD_HSYNC__SAIF1_SDATA1 0x11d1
MX28_PAD_LCD_DOTCLK__SAIF1_MCLK 0x11e1
MX28_PAD_SSP0_DATA4__SSP2_D0 0x2041
MX28_PAD_SSP0_DATA5__SSP2_D3 0x2051
MX28_PAD_SSP0_DATA6__SSP2_CMD 0x2061
MX28_PAD_SSP0_DATA7__SSP2_SCK 0x2071
MX28_PAD_SSP1_SCK__SSP2_D1 0x20c1
MX28_PAD_SSP1_CMD__SSP2_D2 0x20d1
MX28_PAD_SSP1_DATA0__SSP2_D6 0x20e1
MX28_PAD_SSP1_DATA3__SSP2_D7 0x20f1
MX28_PAD_SSP2_SCK__AUART2_RX 0x2101
MX28_PAD_SSP2_MOSI__AUART2_TX 0x2111
MX28_PAD_SSP2_MISO__AUART3_RX 0x2121
MX28_PAD_SSP2_SS0__AUART3_TX 0x2131
MX28_PAD_SSP2_SS1__SSP2_D1 0x2141
MX28_PAD_SSP2_SS2__SSP2_D2 0x2151
MX28_PAD_SSP3_SCK__AUART4_TX 0x2181
MX28_PAD_SSP3_MOSI__AUART4_RX 0x2191
MX28_PAD_SSP3_MISO__AUART4_RTS 0x21a1
MX28_PAD_SSP3_SS0__AUART4_CTS 0x21b1
MX28_PAD_AUART0_RX__I2C0_SCL 0x3001
MX28_PAD_AUART0_TX__I2C0_SDA 0x3011
MX28_PAD_AUART0_CTS__AUART4_RX 0x3021
MX28_PAD_AUART0_RTS__AUART4_TX 0x3031
MX28_PAD_AUART1_RX__SSP2_CARD_DETECT 0x3041
MX28_PAD_AUART1_TX__SSP3_CARD_DETECT 0x3051
MX28_PAD_AUART1_CTS__USB0_OVERCURRENT 0x3061
MX28_PAD_AUART1_RTS__USB0_ID 0x3071
MX28_PAD_AUART2_RX__SSP3_D1 0x3081
MX28_PAD_AUART2_TX__SSP3_D2 0x3091
MX28_PAD_AUART2_CTS__I2C1_SCL 0x30a1
MX28_PAD_AUART2_RTS__I2C1_SDA 0x30b1
MX28_PAD_AUART3_RX__CAN0_TX 0x30c1
MX28_PAD_AUART3_TX__CAN0_RX 0x30d1
MX28_PAD_AUART3_CTS__CAN1_TX 0x30e1
MX28_PAD_AUART3_RTS__CAN1_RX 0x30f1
MX28_PAD_PWM0__I2C1_SCL 0x3101
MX28_PAD_PWM1__I2C1_SDA 0x3111
MX28_PAD_PWM2__USB0_ID 0x3121
MX28_PAD_SAIF0_MCLK__PWM_3 0x3141
MX28_PAD_SAIF0_LRCLK__PWM_4 0x3151
MX28_PAD_SAIF0_BITCLK__PWM_5 0x3161
MX28_PAD_SAIF0_SDATA0__PWM_6 0x3171
MX28_PAD_I2C0_SCL__TIMROT_ROTARYA 0x3181
MX28_PAD_I2C0_SDA__TIMROT_ROTARYB 0x3191
MX28_PAD_SAIF1_SDATA0__PWM_7 0x31a1
MX28_PAD_LCD_RESET__LCD_VSYNC 0x31e1
MX28_PAD_ENET0_MDC__GPMI_CE4N 0x4001
MX28_PAD_ENET0_MDIO__GPMI_CE5N 0x4011
MX28_PAD_ENET0_RX_EN__GPMI_CE6N 0x4021
MX28_PAD_ENET0_RXD0__GPMI_CE7N 0x4031
MX28_PAD_ENET0_RXD1__GPMI_READY4 0x4041
MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER 0x4051
MX28_PAD_ENET0_TX_EN__GPMI_READY5 0x4061
MX28_PAD_ENET0_TXD0__GPMI_READY6 0x4071
MX28_PAD_ENET0_TXD1__GPMI_READY7 0x4081
MX28_PAD_ENET0_RXD2__ENET1_RXD0 0x4091
MX28_PAD_ENET0_RXD3__ENET1_RXD1 0x40a1
MX28_PAD_ENET0_TXD2__ENET1_TXD0 0x40b1
MX28_PAD_ENET0_TXD3__ENET1_TXD1 0x40c1
MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER 0x40d1
MX28_PAD_ENET0_COL__ENET1_TX_EN 0x40e1
MX28_PAD_ENET0_CRS__ENET1_RX_EN 0x40f1
MX28_PAD_GPMI_CE2N__ENET0_RX_ER 0x0122
MX28_PAD_GPMI_CE3N__SAIF1_MCLK 0x0132
MX28_PAD_GPMI_RDY0__USB0_ID 0x0142
MX28_PAD_GPMI_RDY2__ENET0_TX_ER 0x0162
MX28_PAD_GPMI_RDY3__HSADC_TRIGGER 0x0172
MX28_PAD_GPMI_ALE__SSP3_D4 0x01a2
MX28_PAD_GPMI_CLE__SSP3_D5 0x01b2
MX28_PAD_LCD_D00__ETM_DA0 0x1002
MX28_PAD_LCD_D01__ETM_DA1 0x1012
MX28_PAD_LCD_D02__ETM_DA2 0x1022
MX28_PAD_LCD_D03__ETM_DA3 0x1032
MX28_PAD_LCD_D04__ETM_DA4 0x1042
MX28_PAD_LCD_D05__ETM_DA5 0x1052
MX28_PAD_LCD_D06__ETM_DA6 0x1062
MX28_PAD_LCD_D07__ETM_DA7 0x1072
MX28_PAD_LCD_D08__ETM_DA8 0x1082
MX28_PAD_LCD_D09__ETM_DA9 0x1092
MX28_PAD_LCD_D10__ETM_DA10 0x10a2
MX28_PAD_LCD_D11__ETM_DA11 0x10b2
MX28_PAD_LCD_D12__ETM_DA12 0x10c2
MX28_PAD_LCD_D13__ETM_DA13 0x10d2
MX28_PAD_LCD_D14__ETM_DA14 0x10e2
MX28_PAD_LCD_D15__ETM_DA15 0x10f2
MX28_PAD_LCD_D16__ETM_DA7 0x1102
MX28_PAD_LCD_D17__ETM_DA6 0x1112
MX28_PAD_LCD_D18__ETM_DA5 0x1122
MX28_PAD_LCD_D19__ETM_DA4 0x1132
MX28_PAD_LCD_D20__ETM_DA3 0x1142
MX28_PAD_LCD_D21__ETM_DA2 0x1152
MX28_PAD_LCD_D22__ETM_DA1 0x1162
MX28_PAD_LCD_D23__ETM_DA0 0x1172
MX28_PAD_LCD_RD_E__ETM_TCTL 0x1182
MX28_PAD_LCD_WR_RWN__ETM_TCLK 0x1192
MX28_PAD_LCD_HSYNC__ETM_TCTL 0x11d2
MX28_PAD_LCD_DOTCLK__ETM_TCLK 0x11e2
MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT 0x20c2
MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN 0x20d2
MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT 0x20e2
MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN 0x20f2
MX28_PAD_SSP2_SCK__SAIF0_SDATA1 0x2102
MX28_PAD_SSP2_MOSI__SAIF0_SDATA2 0x2112
MX28_PAD_SSP2_MISO__SAIF1_SDATA1 0x2122
MX28_PAD_SSP2_SS0__SAIF1_SDATA2 0x2132
MX28_PAD_SSP2_SS1__USB1_OVERCURRENT 0x2142
MX28_PAD_SSP2_SS2__USB0_OVERCURRENT 0x2152
MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT 0x2182
MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN 0x2192
MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT 0x21a2
MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN 0x21b2
MX28_PAD_AUART0_RX__DUART_CTS 0x3002
MX28_PAD_AUART0_TX__DUART_RTS 0x3012
MX28_PAD_AUART0_CTS__DUART_RX 0x3022
MX28_PAD_AUART0_RTS__DUART_TX 0x3032
MX28_PAD_AUART1_RX__PWM_0 0x3042
MX28_PAD_AUART1_TX__PWM_1 0x3052
MX28_PAD_AUART1_CTS__TIMROT_ROTARYA 0x3062
MX28_PAD_AUART1_RTS__TIMROT_ROTARYB 0x3072
MX28_PAD_AUART2_RX__SSP3_D4 0x3082
MX28_PAD_AUART2_TX__SSP3_D5 0x3092
MX28_PAD_AUART2_CTS__SAIF1_BITCLK 0x30a2
MX28_PAD_AUART2_RTS__SAIF1_LRCLK 0x30b2
MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT 0x30c2
MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN 0x30d2
MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT 0x30e2
MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN 0x30f2
MX28_PAD_PWM0__DUART_RX 0x3102
MX28_PAD_PWM1__DUART_TX 0x3112
MX28_PAD_PWM2__USB1_OVERCURRENT 0x3122
MX28_PAD_SAIF0_MCLK__AUART4_CTS 0x3142
MX28_PAD_SAIF0_LRCLK__AUART4_RTS 0x3152
MX28_PAD_SAIF0_BITCLK__AUART4_RX 0x3162
MX28_PAD_SAIF0_SDATA0__AUART4_TX 0x3172
MX28_PAD_I2C0_SCL__DUART_RX 0x3182
MX28_PAD_I2C0_SDA__DUART_TX 0x3192
MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1 0x31a2
MX28_PAD_SPDIF__ENET1_RX_ER 0x31b2
MX28_PAD_ENET0_MDC__SAIF0_SDATA1 0x4002
MX28_PAD_ENET0_MDIO__SAIF0_SDATA2 0x4012
MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1 0x4022
MX28_PAD_ENET0_RXD0__SAIF1_SDATA2 0x4032
MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT 0x4052
MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT 0x4092
MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN 0x40a2
MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT 0x40b2
MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN 0x40c2
MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN 0x40d2
MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT 0x40e2
MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN 0x40f2
MX28_PAD_GPMI_D00__GPIO_0_0 0x0003
MX28_PAD_GPMI_D01__GPIO_0_1 0x0013
MX28_PAD_GPMI_D02__GPIO_0_2 0x0023
MX28_PAD_GPMI_D03__GPIO_0_3 0x0033
MX28_PAD_GPMI_D04__GPIO_0_4 0x0043
MX28_PAD_GPMI_D05__GPIO_0_5 0x0053
MX28_PAD_GPMI_D06__GPIO_0_6 0x0063
MX28_PAD_GPMI_D07__GPIO_0_7 0x0073
MX28_PAD_GPMI_CE0N__GPIO_0_16 0x0103
MX28_PAD_GPMI_CE1N__GPIO_0_17 0x0113
MX28_PAD_GPMI_CE2N__GPIO_0_18 0x0123
MX28_PAD_GPMI_CE3N__GPIO_0_19 0x0133
MX28_PAD_GPMI_RDY0__GPIO_0_20 0x0143
MX28_PAD_GPMI_RDY1__GPIO_0_21 0x0153
MX28_PAD_GPMI_RDY2__GPIO_0_22 0x0163
MX28_PAD_GPMI_RDY3__GPIO_0_23 0x0173
MX28_PAD_GPMI_RDN__GPIO_0_24 0x0183
MX28_PAD_GPMI_WRN__GPIO_0_25 0x0193
MX28_PAD_GPMI_ALE__GPIO_0_26 0x01a3
MX28_PAD_GPMI_CLE__GPIO_0_27 0x01b3
MX28_PAD_GPMI_RESETN__GPIO_0_28 0x01c3
MX28_PAD_LCD_D00__GPIO_1_0 0x1003
MX28_PAD_LCD_D01__GPIO_1_1 0x1013
MX28_PAD_LCD_D02__GPIO_1_2 0x1023
MX28_PAD_LCD_D03__GPIO_1_3 0x1033
MX28_PAD_LCD_D04__GPIO_1_4 0x1043
MX28_PAD_LCD_D05__GPIO_1_5 0x1053
MX28_PAD_LCD_D06__GPIO_1_6 0x1063
MX28_PAD_LCD_D07__GPIO_1_7 0x1073
MX28_PAD_LCD_D08__GPIO_1_8 0x1083
MX28_PAD_LCD_D09__GPIO_1_9 0x1093
MX28_PAD_LCD_D10__GPIO_1_10 0x10a3
MX28_PAD_LCD_D11__GPIO_1_11 0x10b3
MX28_PAD_LCD_D12__GPIO_1_12 0x10c3
MX28_PAD_LCD_D13__GPIO_1_13 0x10d3
MX28_PAD_LCD_D14__GPIO_1_14 0x10e3
MX28_PAD_LCD_D15__GPIO_1_15 0x10f3
MX28_PAD_LCD_D16__GPIO_1_16 0x1103
MX28_PAD_LCD_D17__GPIO_1_17 0x1113
MX28_PAD_LCD_D18__GPIO_1_18 0x1123
MX28_PAD_LCD_D19__GPIO_1_19 0x1133
MX28_PAD_LCD_D20__GPIO_1_20 0x1143
MX28_PAD_LCD_D21__GPIO_1_21 0x1153
MX28_PAD_LCD_D22__GPIO_1_22 0x1163
MX28_PAD_LCD_D23__GPIO_1_23 0x1173
MX28_PAD_LCD_RD_E__GPIO_1_24 0x1183
MX28_PAD_LCD_WR_RWN__GPIO_1_25 0x1193
MX28_PAD_LCD_RS__GPIO_1_26 0x11a3
MX28_PAD_LCD_CS__GPIO_1_27 0x11b3
MX28_PAD_LCD_VSYNC__GPIO_1_28 0x11c3
MX28_PAD_LCD_HSYNC__GPIO_1_29 0x11d3
MX28_PAD_LCD_DOTCLK__GPIO_1_30 0x11e3
MX28_PAD_LCD_ENABLE__GPIO_1_31 0x11f3
MX28_PAD_SSP0_DATA0__GPIO_2_0 0x2003
MX28_PAD_SSP0_DATA1__GPIO_2_1 0x2013
MX28_PAD_SSP0_DATA2__GPIO_2_2 0x2023
MX28_PAD_SSP0_DATA3__GPIO_2_3 0x2033
MX28_PAD_SSP0_DATA4__GPIO_2_4 0x2043
MX28_PAD_SSP0_DATA5__GPIO_2_5 0x2053
MX28_PAD_SSP0_DATA6__GPIO_2_6 0x2063
MX28_PAD_SSP0_DATA7__GPIO_2_7 0x2073
MX28_PAD_SSP0_CMD__GPIO_2_8 0x2083
MX28_PAD_SSP0_DETECT__GPIO_2_9 0x2093
MX28_PAD_SSP0_SCK__GPIO_2_10 0x20a3
MX28_PAD_SSP1_SCK__GPIO_2_12 0x20c3
MX28_PAD_SSP1_CMD__GPIO_2_13 0x20d3
MX28_PAD_SSP1_DATA0__GPIO_2_14 0x20e3
MX28_PAD_SSP1_DATA3__GPIO_2_15 0x20f3
MX28_PAD_SSP2_SCK__GPIO_2_16 0x2103
MX28_PAD_SSP2_MOSI__GPIO_2_17 0x2113
MX28_PAD_SSP2_MISO__GPIO_2_18 0x2123
MX28_PAD_SSP2_SS0__GPIO_2_19 0x2133
MX28_PAD_SSP2_SS1__GPIO_2_20 0x2143
MX28_PAD_SSP2_SS2__GPIO_2_21 0x2153
MX28_PAD_SSP3_SCK__GPIO_2_24 0x2183
MX28_PAD_SSP3_MOSI__GPIO_2_25 0x2193
MX28_PAD_SSP3_MISO__GPIO_2_26 0x21a3
MX28_PAD_SSP3_SS0__GPIO_2_27 0x21b3
MX28_PAD_AUART0_RX__GPIO_3_0 0x3003
MX28_PAD_AUART0_TX__GPIO_3_1 0x3013
MX28_PAD_AUART0_CTS__GPIO_3_2 0x3023
MX28_PAD_AUART0_RTS__GPIO_3_3 0x3033
MX28_PAD_AUART1_RX__GPIO_3_4 0x3043
MX28_PAD_AUART1_TX__GPIO_3_5 0x3053
MX28_PAD_AUART1_CTS__GPIO_3_6 0x3063
MX28_PAD_AUART1_RTS__GPIO_3_7 0x3073
MX28_PAD_AUART2_RX__GPIO_3_8 0x3083
MX28_PAD_AUART2_TX__GPIO_3_9 0x3093
MX28_PAD_AUART2_CTS__GPIO_3_10 0x30a3
MX28_PAD_AUART2_RTS__GPIO_3_11 0x30b3
MX28_PAD_AUART3_RX__GPIO_3_12 0x30c3
MX28_PAD_AUART3_TX__GPIO_3_13 0x30d3
MX28_PAD_AUART3_CTS__GPIO_3_14 0x30e3
MX28_PAD_AUART3_RTS__GPIO_3_15 0x30f3
MX28_PAD_PWM0__GPIO_3_16 0x3103
MX28_PAD_PWM1__GPIO_3_17 0x3113
MX28_PAD_PWM2__GPIO_3_18 0x3123
MX28_PAD_SAIF0_MCLK__GPIO_3_20 0x3143
MX28_PAD_SAIF0_LRCLK__GPIO_3_21 0x3153
MX28_PAD_SAIF0_BITCLK__GPIO_3_22 0x3163
MX28_PAD_SAIF0_SDATA0__GPIO_3_23 0x3173
MX28_PAD_I2C0_SCL__GPIO_3_24 0x3183
MX28_PAD_I2C0_SDA__GPIO_3_25 0x3193
MX28_PAD_SAIF1_SDATA0__GPIO_3_26 0x31a3
MX28_PAD_SPDIF__GPIO_3_27 0x31b3
MX28_PAD_PWM3__GPIO_3_28 0x31c3
MX28_PAD_PWM4__GPIO_3_29 0x31d3
MX28_PAD_LCD_RESET__GPIO_3_30 0x31e3
MX28_PAD_ENET0_MDC__GPIO_4_0 0x4003
MX28_PAD_ENET0_MDIO__GPIO_4_1 0x4013
MX28_PAD_ENET0_RX_EN__GPIO_4_2 0x4023
MX28_PAD_ENET0_RXD0__GPIO_4_3 0x4033
MX28_PAD_ENET0_RXD1__GPIO_4_4 0x4043
MX28_PAD_ENET0_TX_CLK__GPIO_4_5 0x4053
MX28_PAD_ENET0_TX_EN__GPIO_4_6 0x4063
MX28_PAD_ENET0_TXD0__GPIO_4_7 0x4073
MX28_PAD_ENET0_TXD1__GPIO_4_8 0x4083
MX28_PAD_ENET0_RXD2__GPIO_4_9 0x4093
MX28_PAD_ENET0_RXD3__GPIO_4_10 0x40a3
MX28_PAD_ENET0_TXD2__GPIO_4_11 0x40b3
MX28_PAD_ENET0_TXD3__GPIO_4_12 0x40c3
MX28_PAD_ENET0_RX_CLK__GPIO_4_13 0x40d3
MX28_PAD_ENET0_COL__GPIO_4_14 0x40e3
MX28_PAD_ENET0_CRS__GPIO_4_15 0x40f3
MX28_PAD_ENET_CLK__GPIO_4_16 0x4103
MX28_PAD_JTAG_RTCK__GPIO_4_20 0x4143
Valid values for i.MX23 pinmux-id:
pinmux id
------ --
MX23_PAD_GPMI_D00__GPMI_D00 0x0000
MX23_PAD_GPMI_D01__GPMI_D01 0x0010
MX23_PAD_GPMI_D02__GPMI_D02 0x0020
MX23_PAD_GPMI_D03__GPMI_D03 0x0030
MX23_PAD_GPMI_D04__GPMI_D04 0x0040
MX23_PAD_GPMI_D05__GPMI_D05 0x0050
MX23_PAD_GPMI_D06__GPMI_D06 0x0060
MX23_PAD_GPMI_D07__GPMI_D07 0x0070
MX23_PAD_GPMI_D08__GPMI_D08 0x0080
MX23_PAD_GPMI_D09__GPMI_D09 0x0090
MX23_PAD_GPMI_D10__GPMI_D10 0x00a0
MX23_PAD_GPMI_D11__GPMI_D11 0x00b0
MX23_PAD_GPMI_D12__GPMI_D12 0x00c0
MX23_PAD_GPMI_D13__GPMI_D13 0x00d0
MX23_PAD_GPMI_D14__GPMI_D14 0x00e0
MX23_PAD_GPMI_D15__GPMI_D15 0x00f0
MX23_PAD_GPMI_CLE__GPMI_CLE 0x0100
MX23_PAD_GPMI_ALE__GPMI_ALE 0x0110
MX23_PAD_GPMI_CE2N__GPMI_CE2N 0x0120
MX23_PAD_GPMI_RDY0__GPMI_RDY0 0x0130
MX23_PAD_GPMI_RDY1__GPMI_RDY1 0x0140
MX23_PAD_GPMI_RDY2__GPMI_RDY2 0x0150
MX23_PAD_GPMI_RDY3__GPMI_RDY3 0x0160
MX23_PAD_GPMI_WPN__GPMI_WPN 0x0170
MX23_PAD_GPMI_WRN__GPMI_WRN 0x0180
MX23_PAD_GPMI_RDN__GPMI_RDN 0x0190
MX23_PAD_AUART1_CTS__AUART1_CTS 0x01a0
MX23_PAD_AUART1_RTS__AUART1_RTS 0x01b0
MX23_PAD_AUART1_RX__AUART1_RX 0x01c0
MX23_PAD_AUART1_TX__AUART1_TX 0x01d0
MX23_PAD_I2C_SCL__I2C_SCL 0x01e0
MX23_PAD_I2C_SDA__I2C_SDA 0x01f0
MX23_PAD_LCD_D00__LCD_D00 0x1000
MX23_PAD_LCD_D01__LCD_D01 0x1010
MX23_PAD_LCD_D02__LCD_D02 0x1020
MX23_PAD_LCD_D03__LCD_D03 0x1030
MX23_PAD_LCD_D04__LCD_D04 0x1040
MX23_PAD_LCD_D05__LCD_D05 0x1050
MX23_PAD_LCD_D06__LCD_D06 0x1060
MX23_PAD_LCD_D07__LCD_D07 0x1070
MX23_PAD_LCD_D08__LCD_D08 0x1080
MX23_PAD_LCD_D09__LCD_D09 0x1090
MX23_PAD_LCD_D10__LCD_D10 0x10a0
MX23_PAD_LCD_D11__LCD_D11 0x10b0
MX23_PAD_LCD_D12__LCD_D12 0x10c0
MX23_PAD_LCD_D13__LCD_D13 0x10d0
MX23_PAD_LCD_D14__LCD_D14 0x10e0
MX23_PAD_LCD_D15__LCD_D15 0x10f0
MX23_PAD_LCD_D16__LCD_D16 0x1100
MX23_PAD_LCD_D17__LCD_D17 0x1110
MX23_PAD_LCD_RESET__LCD_RESET 0x1120
MX23_PAD_LCD_RS__LCD_RS 0x1130
MX23_PAD_LCD_WR__LCD_WR 0x1140
MX23_PAD_LCD_CS__LCD_CS 0x1150
MX23_PAD_LCD_DOTCK__LCD_DOTCK 0x1160
MX23_PAD_LCD_ENABLE__LCD_ENABLE 0x1170
MX23_PAD_LCD_HSYNC__LCD_HSYNC 0x1180
MX23_PAD_LCD_VSYNC__LCD_VSYNC 0x1190
MX23_PAD_PWM0__PWM0 0x11a0
MX23_PAD_PWM1__PWM1 0x11b0
MX23_PAD_PWM2__PWM2 0x11c0
MX23_PAD_PWM3__PWM3 0x11d0
MX23_PAD_PWM4__PWM4 0x11e0
MX23_PAD_SSP1_CMD__SSP1_CMD 0x2000
MX23_PAD_SSP1_DETECT__SSP1_DETECT 0x2010
MX23_PAD_SSP1_DATA0__SSP1_DATA0 0x2020
MX23_PAD_SSP1_DATA1__SSP1_DATA1 0x2030
MX23_PAD_SSP1_DATA2__SSP1_DATA2 0x2040
MX23_PAD_SSP1_DATA3__SSP1_DATA3 0x2050
MX23_PAD_SSP1_SCK__SSP1_SCK 0x2060
MX23_PAD_ROTARYA__ROTARYA 0x2070
MX23_PAD_ROTARYB__ROTARYB 0x2080
MX23_PAD_EMI_A00__EMI_A00 0x2090
MX23_PAD_EMI_A01__EMI_A01 0x20a0
MX23_PAD_EMI_A02__EMI_A02 0x20b0
MX23_PAD_EMI_A03__EMI_A03 0x20c0
MX23_PAD_EMI_A04__EMI_A04 0x20d0
MX23_PAD_EMI_A05__EMI_A05 0x20e0
MX23_PAD_EMI_A06__EMI_A06 0x20f0
MX23_PAD_EMI_A07__EMI_A07 0x2100
MX23_PAD_EMI_A08__EMI_A08 0x2110
MX23_PAD_EMI_A09__EMI_A09 0x2120
MX23_PAD_EMI_A10__EMI_A10 0x2130
MX23_PAD_EMI_A11__EMI_A11 0x2140
MX23_PAD_EMI_A12__EMI_A12 0x2150
MX23_PAD_EMI_BA0__EMI_BA0 0x2160
MX23_PAD_EMI_BA1__EMI_BA1 0x2170
MX23_PAD_EMI_CASN__EMI_CASN 0x2180
MX23_PAD_EMI_CE0N__EMI_CE0N 0x2190
MX23_PAD_EMI_CE1N__EMI_CE1N 0x21a0
MX23_PAD_GPMI_CE1N__GPMI_CE1N 0x21b0
MX23_PAD_GPMI_CE0N__GPMI_CE0N 0x21c0
MX23_PAD_EMI_CKE__EMI_CKE 0x21d0
MX23_PAD_EMI_RASN__EMI_RASN 0x21e0
MX23_PAD_EMI_WEN__EMI_WEN 0x21f0
MX23_PAD_EMI_D00__EMI_D00 0x3000
MX23_PAD_EMI_D01__EMI_D01 0x3010
MX23_PAD_EMI_D02__EMI_D02 0x3020
MX23_PAD_EMI_D03__EMI_D03 0x3030
MX23_PAD_EMI_D04__EMI_D04 0x3040
MX23_PAD_EMI_D05__EMI_D05 0x3050
MX23_PAD_EMI_D06__EMI_D06 0x3060
MX23_PAD_EMI_D07__EMI_D07 0x3070
MX23_PAD_EMI_D08__EMI_D08 0x3080
MX23_PAD_EMI_D09__EMI_D09 0x3090
MX23_PAD_EMI_D10__EMI_D10 0x30a0
MX23_PAD_EMI_D11__EMI_D11 0x30b0
MX23_PAD_EMI_D12__EMI_D12 0x30c0
MX23_PAD_EMI_D13__EMI_D13 0x30d0
MX23_PAD_EMI_D14__EMI_D14 0x30e0
MX23_PAD_EMI_D15__EMI_D15 0x30f0
MX23_PAD_EMI_DQM0__EMI_DQM0 0x3100
MX23_PAD_EMI_DQM1__EMI_DQM1 0x3110
MX23_PAD_EMI_DQS0__EMI_DQS0 0x3120
MX23_PAD_EMI_DQS1__EMI_DQS1 0x3130
MX23_PAD_EMI_CLK__EMI_CLK 0x3140
MX23_PAD_EMI_CLKN__EMI_CLKN 0x3150
MX23_PAD_GPMI_D00__LCD_D8 0x0001
MX23_PAD_GPMI_D01__LCD_D9 0x0011
MX23_PAD_GPMI_D02__LCD_D10 0x0021
MX23_PAD_GPMI_D03__LCD_D11 0x0031
MX23_PAD_GPMI_D04__LCD_D12 0x0041
MX23_PAD_GPMI_D05__LCD_D13 0x0051
MX23_PAD_GPMI_D06__LCD_D14 0x0061
MX23_PAD_GPMI_D07__LCD_D15 0x0071
MX23_PAD_GPMI_D08__LCD_D18 0x0081
MX23_PAD_GPMI_D09__LCD_D19 0x0091
MX23_PAD_GPMI_D10__LCD_D20 0x00a1
MX23_PAD_GPMI_D11__LCD_D21 0x00b1
MX23_PAD_GPMI_D12__LCD_D22 0x00c1
MX23_PAD_GPMI_D13__LCD_D23 0x00d1
MX23_PAD_GPMI_D14__AUART2_RX 0x00e1
MX23_PAD_GPMI_D15__AUART2_TX 0x00f1
MX23_PAD_GPMI_CLE__LCD_D16 0x0101
MX23_PAD_GPMI_ALE__LCD_D17 0x0111
MX23_PAD_GPMI_CE2N__ATA_A2 0x0121
MX23_PAD_AUART1_RTS__IR_CLK 0x01b1
MX23_PAD_AUART1_RX__IR_RX 0x01c1
MX23_PAD_AUART1_TX__IR_TX 0x01d1
MX23_PAD_I2C_SCL__GPMI_RDY2 0x01e1
MX23_PAD_I2C_SDA__GPMI_CE2N 0x01f1
MX23_PAD_LCD_D00__ETM_DA8 0x1001
MX23_PAD_LCD_D01__ETM_DA9 0x1011
MX23_PAD_LCD_D02__ETM_DA10 0x1021
MX23_PAD_LCD_D03__ETM_DA11 0x1031
MX23_PAD_LCD_D04__ETM_DA12 0x1041
MX23_PAD_LCD_D05__ETM_DA13 0x1051
MX23_PAD_LCD_D06__ETM_DA14 0x1061
MX23_PAD_LCD_D07__ETM_DA15 0x1071
MX23_PAD_LCD_D08__ETM_DA0 0x1081
MX23_PAD_LCD_D09__ETM_DA1 0x1091
MX23_PAD_LCD_D10__ETM_DA2 0x10a1
MX23_PAD_LCD_D11__ETM_DA3 0x10b1
MX23_PAD_LCD_D12__ETM_DA4 0x10c1
MX23_PAD_LCD_D13__ETM_DA5 0x10d1
MX23_PAD_LCD_D14__ETM_DA6 0x10e1
MX23_PAD_LCD_D15__ETM_DA7 0x10f1
MX23_PAD_LCD_RESET__ETM_TCTL 0x1121
MX23_PAD_LCD_RS__ETM_TCLK 0x1131
MX23_PAD_LCD_DOTCK__GPMI_RDY3 0x1161
MX23_PAD_LCD_ENABLE__I2C_SCL 0x1171
MX23_PAD_LCD_HSYNC__I2C_SDA 0x1181
MX23_PAD_LCD_VSYNC__LCD_BUSY 0x1191
MX23_PAD_PWM0__ROTARYA 0x11a1
MX23_PAD_PWM1__ROTARYB 0x11b1
MX23_PAD_PWM2__GPMI_RDY3 0x11c1
MX23_PAD_PWM3__ETM_TCTL 0x11d1
MX23_PAD_PWM4__ETM_TCLK 0x11e1
MX23_PAD_SSP1_DETECT__GPMI_CE3N 0x2011
MX23_PAD_SSP1_DATA1__I2C_SCL 0x2031
MX23_PAD_SSP1_DATA2__I2C_SDA 0x2041
MX23_PAD_ROTARYA__AUART2_RTS 0x2071
MX23_PAD_ROTARYB__AUART2_CTS 0x2081
MX23_PAD_GPMI_D00__SSP2_DATA0 0x0002
MX23_PAD_GPMI_D01__SSP2_DATA1 0x0012
MX23_PAD_GPMI_D02__SSP2_DATA2 0x0022
MX23_PAD_GPMI_D03__SSP2_DATA3 0x0032
MX23_PAD_GPMI_D04__SSP2_DATA4 0x0042
MX23_PAD_GPMI_D05__SSP2_DATA5 0x0052
MX23_PAD_GPMI_D06__SSP2_DATA6 0x0062
MX23_PAD_GPMI_D07__SSP2_DATA7 0x0072
MX23_PAD_GPMI_D08__SSP1_DATA4 0x0082
MX23_PAD_GPMI_D09__SSP1_DATA5 0x0092
MX23_PAD_GPMI_D10__SSP1_DATA6 0x00a2
MX23_PAD_GPMI_D11__SSP1_DATA7 0x00b2
MX23_PAD_GPMI_D15__GPMI_CE3N 0x00f2
MX23_PAD_GPMI_RDY0__SSP2_DETECT 0x0132
MX23_PAD_GPMI_RDY1__SSP2_CMD 0x0142
MX23_PAD_GPMI_WRN__SSP2_SCK 0x0182
MX23_PAD_AUART1_CTS__SSP1_DATA4 0x01a2
MX23_PAD_AUART1_RTS__SSP1_DATA5 0x01b2
MX23_PAD_AUART1_RX__SSP1_DATA6 0x01c2
MX23_PAD_AUART1_TX__SSP1_DATA7 0x01d2
MX23_PAD_I2C_SCL__AUART1_TX 0x01e2
MX23_PAD_I2C_SDA__AUART1_RX 0x01f2
MX23_PAD_LCD_D08__SAIF2_SDATA0 0x1082
MX23_PAD_LCD_D09__SAIF1_SDATA0 0x1092
MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK 0x10a2
MX23_PAD_LCD_D11__SAIF_LRCLK 0x10b2
MX23_PAD_LCD_D12__SAIF2_SDATA1 0x10c2
MX23_PAD_LCD_D13__SAIF2_SDATA2 0x10d2
MX23_PAD_LCD_D14__SAIF1_SDATA2 0x10e2
MX23_PAD_LCD_D15__SAIF1_SDATA1 0x10f2
MX23_PAD_LCD_D16__SAIF_ALT_BITCLK 0x1102
MX23_PAD_LCD_RESET__GPMI_CE3N 0x1122
MX23_PAD_PWM0__DUART_RX 0x11a2
MX23_PAD_PWM1__DUART_TX 0x11b2
MX23_PAD_PWM3__AUART1_CTS 0x11d2
MX23_PAD_PWM4__AUART1_RTS 0x11e2
MX23_PAD_SSP1_CMD__JTAG_TDO 0x2002
MX23_PAD_SSP1_DETECT__USB_OTG_ID 0x2012
MX23_PAD_SSP1_DATA0__JTAG_TDI 0x2022
MX23_PAD_SSP1_DATA1__JTAG_TCLK 0x2032
MX23_PAD_SSP1_DATA2__JTAG_RTCK 0x2042
MX23_PAD_SSP1_DATA3__JTAG_TMS 0x2052
MX23_PAD_SSP1_SCK__JTAG_TRST 0x2062
MX23_PAD_ROTARYA__SPDIF 0x2072
MX23_PAD_ROTARYB__GPMI_CE3N 0x2082
MX23_PAD_GPMI_D00__GPIO_0_0 0x0003
MX23_PAD_GPMI_D01__GPIO_0_1 0x0013
MX23_PAD_GPMI_D02__GPIO_0_2 0x0023
MX23_PAD_GPMI_D03__GPIO_0_3 0x0033
MX23_PAD_GPMI_D04__GPIO_0_4 0x0043
MX23_PAD_GPMI_D05__GPIO_0_5 0x0053
MX23_PAD_GPMI_D06__GPIO_0_6 0x0063
MX23_PAD_GPMI_D07__GPIO_0_7 0x0073
MX23_PAD_GPMI_D08__GPIO_0_8 0x0083
MX23_PAD_GPMI_D09__GPIO_0_9 0x0093
MX23_PAD_GPMI_D10__GPIO_0_10 0x00a3
MX23_PAD_GPMI_D11__GPIO_0_11 0x00b3
MX23_PAD_GPMI_D12__GPIO_0_12 0x00c3
MX23_PAD_GPMI_D13__GPIO_0_13 0x00d3
MX23_PAD_GPMI_D14__GPIO_0_14 0x00e3
MX23_PAD_GPMI_D15__GPIO_0_15 0x00f3
MX23_PAD_GPMI_CLE__GPIO_0_16 0x0103
MX23_PAD_GPMI_ALE__GPIO_0_17 0x0113
MX23_PAD_GPMI_CE2N__GPIO_0_18 0x0123
MX23_PAD_GPMI_RDY0__GPIO_0_19 0x0133
MX23_PAD_GPMI_RDY1__GPIO_0_20 0x0143
MX23_PAD_GPMI_RDY2__GPIO_0_21 0x0153
MX23_PAD_GPMI_RDY3__GPIO_0_22 0x0163
MX23_PAD_GPMI_WPN__GPIO_0_23 0x0173
MX23_PAD_GPMI_WRN__GPIO_0_24 0x0183
MX23_PAD_GPMI_RDN__GPIO_0_25 0x0193
MX23_PAD_AUART1_CTS__GPIO_0_26 0x01a3
MX23_PAD_AUART1_RTS__GPIO_0_27 0x01b3
MX23_PAD_AUART1_RX__GPIO_0_28 0x01c3
MX23_PAD_AUART1_TX__GPIO_0_29 0x01d3
MX23_PAD_I2C_SCL__GPIO_0_30 0x01e3
MX23_PAD_I2C_SDA__GPIO_0_31 0x01f3
MX23_PAD_LCD_D00__GPIO_1_0 0x1003
MX23_PAD_LCD_D01__GPIO_1_1 0x1013
MX23_PAD_LCD_D02__GPIO_1_2 0x1023
MX23_PAD_LCD_D03__GPIO_1_3 0x1033
MX23_PAD_LCD_D04__GPIO_1_4 0x1043
MX23_PAD_LCD_D05__GPIO_1_5 0x1053
MX23_PAD_LCD_D06__GPIO_1_6 0x1063
MX23_PAD_LCD_D07__GPIO_1_7 0x1073
MX23_PAD_LCD_D08__GPIO_1_8 0x1083
MX23_PAD_LCD_D09__GPIO_1_9 0x1093
MX23_PAD_LCD_D10__GPIO_1_10 0x10a3
MX23_PAD_LCD_D11__GPIO_1_11 0x10b3
MX23_PAD_LCD_D12__GPIO_1_12 0x10c3
MX23_PAD_LCD_D13__GPIO_1_13 0x10d3
MX23_PAD_LCD_D14__GPIO_1_14 0x10e3
MX23_PAD_LCD_D15__GPIO_1_15 0x10f3
MX23_PAD_LCD_D16__GPIO_1_16 0x1103
MX23_PAD_LCD_D17__GPIO_1_17 0x1113
MX23_PAD_LCD_RESET__GPIO_1_18 0x1123
MX23_PAD_LCD_RS__GPIO_1_19 0x1133
MX23_PAD_LCD_WR__GPIO_1_20 0x1143
MX23_PAD_LCD_CS__GPIO_1_21 0x1153
MX23_PAD_LCD_DOTCK__GPIO_1_22 0x1163
MX23_PAD_LCD_ENABLE__GPIO_1_23 0x1173
MX23_PAD_LCD_HSYNC__GPIO_1_24 0x1183
MX23_PAD_LCD_VSYNC__GPIO_1_25 0x1193
MX23_PAD_PWM0__GPIO_1_26 0x11a3
MX23_PAD_PWM1__GPIO_1_27 0x11b3
MX23_PAD_PWM2__GPIO_1_28 0x11c3
MX23_PAD_PWM3__GPIO_1_29 0x11d3
MX23_PAD_PWM4__GPIO_1_30 0x11e3
MX23_PAD_SSP1_CMD__GPIO_2_0 0x2003
MX23_PAD_SSP1_DETECT__GPIO_2_1 0x2013
MX23_PAD_SSP1_DATA0__GPIO_2_2 0x2023
MX23_PAD_SSP1_DATA1__GPIO_2_3 0x2033
MX23_PAD_SSP1_DATA2__GPIO_2_4 0x2043
MX23_PAD_SSP1_DATA3__GPIO_2_5 0x2053
MX23_PAD_SSP1_SCK__GPIO_2_6 0x2063
MX23_PAD_ROTARYA__GPIO_2_7 0x2073
MX23_PAD_ROTARYB__GPIO_2_8 0x2083
MX23_PAD_EMI_A00__GPIO_2_9 0x2093
MX23_PAD_EMI_A01__GPIO_2_10 0x20a3
MX23_PAD_EMI_A02__GPIO_2_11 0x20b3
MX23_PAD_EMI_A03__GPIO_2_12 0x20c3
MX23_PAD_EMI_A04__GPIO_2_13 0x20d3
MX23_PAD_EMI_A05__GPIO_2_14 0x20e3
MX23_PAD_EMI_A06__GPIO_2_15 0x20f3
MX23_PAD_EMI_A07__GPIO_2_16 0x2103
MX23_PAD_EMI_A08__GPIO_2_17 0x2113
MX23_PAD_EMI_A09__GPIO_2_18 0x2123
MX23_PAD_EMI_A10__GPIO_2_19 0x2133
MX23_PAD_EMI_A11__GPIO_2_20 0x2143
MX23_PAD_EMI_A12__GPIO_2_21 0x2153
MX23_PAD_EMI_BA0__GPIO_2_22 0x2163
MX23_PAD_EMI_BA1__GPIO_2_23 0x2173
MX23_PAD_EMI_CASN__GPIO_2_24 0x2183
MX23_PAD_EMI_CE0N__GPIO_2_25 0x2193
MX23_PAD_EMI_CE1N__GPIO_2_26 0x21a3
MX23_PAD_GPMI_CE1N__GPIO_2_27 0x21b3
MX23_PAD_GPMI_CE0N__GPIO_2_28 0x21c3
MX23_PAD_EMI_CKE__GPIO_2_29 0x21d3
MX23_PAD_EMI_RASN__GPIO_2_30 0x21e3
MX23_PAD_EMI_WEN__GPIO_2_31 0x21f3

View File

@@ -72,6 +72,13 @@ Optional properties:
/* pin base, nr pins & gpio function */ /* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>; pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>;
- interrupt-controller : standard interrupt controller binding if using
interrupts for wake-up events for example. In this case pinctrl-single
is set up as a chained interrupt controller and the wake-up interrupts
can be requested by the drivers using request_irq().
- #interrupt-cells : standard interrupt binding if using interrupts
This driver assumes that there is only one register for each pin (unless the This driver assumes that there is only one register for each pin (unless the
pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
specified in the pinctrl-bindings.txt document in this directory. specified in the pinctrl-bindings.txt document in this directory.
@@ -121,6 +128,8 @@ pmx_core: pinmux@4a100040 {
reg = <0x4a100040 0x0196>; reg = <0x4a100040 0x0196>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
pinctrl-single,register-width = <16>; pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xffff>; pinctrl-single,function-mask = <0xffff>;
}; };
@@ -131,6 +140,8 @@ pmx_wkup: pinmux@4a31e040 {
reg = <0x4a31e040 0x0038>; reg = <0x4a31e040 0x0038>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
pinctrl-single,register-width = <16>; pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xffff>; pinctrl-single,function-mask = <0xffff>;
}; };

View File

@@ -15,7 +15,7 @@ Optional properties:
Example: Example:
usb_per5@a03e0000 { usb_per5@a03e0000 {
compatible = "stericsson,db8500-musb", "mentor,musb"; compatible = "stericsson,db8500-musb";
reg = <0xa03e0000 0x10000>; reg = <0xa03e0000 0x10000>;
interrupts = <0 23 0x4>; interrupts = <0 23 0x4>;
interrupt-names = "mc"; interrupt-names = "mc";

View File

@@ -12,7 +12,19 @@ Required properties:
a) phandle of the gpio controller node. a) phandle of the gpio controller node.
b) pin number within the gpio controller. b) pin number within the gpio controller.
c) optional flags and pull up/down. c) optional flags and pull up/down.
- clocks: list of clock IDs from SoC clock driver.
a) hdmi: Gate of HDMI IP bus clock.
b) sclk_hdmi: Gate of HDMI special clock.
c) sclk_pixel: Pixel special clock, one of the two possible inputs of
HDMI clock mux.
d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
HDMI clock mux.
e) mout_hdmi: It is required by the driver to switch between the 2
parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
after configuration, parent is set to sclk_hdmiphy else
sclk_pixel.
- clock-names: aliases as per driver requirements for above clock IDs:
"hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
Example: Example:
hdmi { hdmi {

View File

@@ -10,6 +10,10 @@ Required properties:
- reg: physical base address of the mixer and length of memory mapped - reg: physical base address of the mixer and length of memory mapped
region. region.
- interrupts: interrupt number to the cpu. - interrupts: interrupt number to the cpu.
- clocks: list of clock IDs from SoC clock driver.
a) mixer: Gate of Mixer IP bus clock.
b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of
mixer mux.
Example: Example:

View File

@@ -933,7 +933,7 @@ M: Javier Martinez Canillas <javier@dowhile0.org>
L: linux-omap@vger.kernel.org L: linux-omap@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
F: arch/arm/mach-omap2/board-igep0020.c F: arch/arm/boot/dts/omap3-igep*
ARM/INCOME PXA270 SUPPORT ARM/INCOME PXA270 SUPPORT
M: Marek Vasut <marek.vasut@gmail.com> M: Marek Vasut <marek.vasut@gmail.com>
@@ -6125,6 +6125,12 @@ L: linux-omap@vger.kernel.org
S: Maintained S: Maintained
F: drivers/gpio/gpio-omap.c F: drivers/gpio/gpio-omap.c
OMAP/NEWFLOW NANOBONE MACHINE SUPPORT
M: Mark Jackson <mpfj@newflow.co.uk>
L: linux-omap@vger.kernel.org
S: Maintained
F: arch/arm/boot/dts/am335x-nano.dts
OMFS FILESYSTEM OMFS FILESYSTEM
M: Bob Copeland <me@bobcopeland.com> M: Bob Copeland <me@bobcopeland.com>
L: linux-karma-devel@lists.sourceforge.net L: linux-karma-devel@lists.sourceforge.net

View File

@@ -40,17 +40,17 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d31ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \ dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
bcm28155-ap.dtb bcm28155-ap.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \ dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb da850-evm.dtb
dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
dove-cubox.dtb \ dove-cubox.dtb \
dove-d2plug.dtb \ dove-d2plug.dtb \
dove-d3plug.dtb \
dove-dove-db.dtb dove-dove-db.dtb
dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \ exynos4210-smdkv310.dtb \
@@ -96,22 +96,25 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
kirkwood-ns2mini.dtb \ kirkwood-ns2mini.dtb \
kirkwood-nsa310.dtb \ kirkwood-nsa310.dtb \
kirkwood-nsa310a.dtb \ kirkwood-nsa310a.dtb \
kirkwood-openblocks_a6.dtb \
kirkwood-openblocks_a7.dtb \
kirkwood-sheevaplug.dtb \ kirkwood-sheevaplug.dtb \
kirkwood-sheevaplug-esata.dtb \ kirkwood-sheevaplug-esata.dtb \
kirkwood-topkick.dtb \ kirkwood-topkick.dtb \
kirkwood-ts219-6281.dtb \ kirkwood-ts219-6281.dtb \
kirkwood-ts219-6282.dtb \ kirkwood-ts219-6282.dtb
kirkwood-openblocks_a6.dtb
dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \ dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb qcom-msm8960-cdp.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-370-mirabox.dtb \ armada-370-mirabox.dtb \
armada-370-netgear-rn102.dtb \ armada-370-netgear-rn102.dtb \
armada-370-netgear-rn104.dtb \
armada-370-rd.dtb \ armada-370-rd.dtb \
armada-xp-axpwifiap.dtb \ armada-xp-axpwifiap.dtb \
armada-xp-db.dtb \ armada-xp-db.dtb \
armada-xp-gp.dtb \ armada-xp-gp.dtb \
armada-xp-matrix.dtb \
armada-xp-openblocks-ax3-4.dtb armada-xp-openblocks-ax3-4.dtb
dtb-$(CONFIG_ARCH_MXC) += \ dtb-$(CONFIG_ARCH_MXC) += \
imx25-karo-tx25.dtb \ imx25-karo-tx25.dtb \
@@ -142,8 +145,10 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-sabrelite.dtb \ imx6q-sabrelite.dtb \
imx6q-sabresd.dtb \ imx6q-sabresd.dtb \
imx6q-sbc6x.dtb \ imx6q-sbc6x.dtb \
imx6q-udoo.dtb \
imx6q-wandboard.dtb \ imx6q-wandboard.dtb \
imx6sl-evk.dtb \ imx6sl-evk.dtb \
vf610-cosmic.dtb \
vf610-twr.dtb vf610-twr.dtb
dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
imx23-olinuxino.dtb \ imx23-olinuxino.dtb \
@@ -159,6 +164,7 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
imx28-cfa10057.dtb \ imx28-cfa10057.dtb \
imx28-cfa10058.dtb \ imx28-cfa10058.dtb \
imx28-evk.dtb \ imx28-evk.dtb \
imx28-m28cu3.dtb \
imx28-m28evk.dtb \ imx28-m28evk.dtb \
imx28-sps1.dtb \ imx28-sps1.dtb \
imx28-tx28.dtb imx28-tx28.dtb
@@ -172,9 +178,15 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3-devkit8000.dtb \ omap3-devkit8000.dtb \
omap3-beagle-xm.dtb \ omap3-beagle-xm.dtb \
omap3-evm.dtb \ omap3-evm.dtb \
omap3-evm-37xx.dtb \
omap3-n900.dtb \
omap3-n9.dtb \
omap3-n950.dtb \
omap3-tobi.dtb \ omap3-tobi.dtb \
omap3-gta04.dtb \
omap3-igep0020.dtb \ omap3-igep0020.dtb \
omap3-igep0030.dtb \ omap3-igep0030.dtb \
omap3-zoom3.dtb \
omap4-panda.dtb \ omap4-panda.dtb \
omap4-panda-a4.dtb \ omap4-panda-a4.dtb \
omap4-panda-es.dtb \ omap4-panda-es.dtb \
@@ -186,17 +198,24 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am335x-evmsk.dtb \ am335x-evmsk.dtb \
am335x-bone.dtb \ am335x-bone.dtb \
am335x-boneblack.dtb \ am335x-boneblack.dtb \
am335x-nano.dtb \
am335x-base0033.dtb \
am3517-evm.dtb \ am3517-evm.dtb \
am3517_mt_ventoux.dtb \ am3517_mt_ventoux.dtb \
am43x-epos-evm.dtb am43x-epos-evm.dtb \
dra7-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
ste-hrefprev60.dtb \ ste-hrefprev60-stuib.dtb \
ste-hrefv60plus.dtb \ ste-hrefprev60-tvk.dtb \
ste-hrefv60plus-stuib.dtb \
ste-hrefv60plus-tvk.dtb \
ste-ccu8540.dtb \ ste-ccu8540.dtb \
ste-ccu9540.dtb ste-ccu9540.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
s3c6410-smdk6410.dtb
dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
r7s72100-genmai.dtb \ r7s72100-genmai.dtb \
r8a7740-armadillo800eva.dtb \ r8a7740-armadillo800eva.dtb \
@@ -214,7 +233,9 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
r8a73a4-ape6evm-reference.dtb \ r8a73a4-ape6evm-reference.dtb \
sh7372-mackerel.dtb sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_sockit.dtb \
socfpga_vt.dtb socfpga_vt.dtb
dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
spear1340-evb.dtb spear1340-evb.dtb
@@ -236,6 +257,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun5i-a13-olinuxino.dtb \ sun5i-a13-olinuxino.dtb \
sun6i-a31-colombus.dtb \ sun6i-a31-colombus.dtb \
sun7i-a20-cubieboard2.dtb \ sun7i-a20-cubieboard2.dtb \
sun7i-a20-cubietruck.dtb \
sun7i-a20-olinuxino-micro.dtb sun7i-a20-olinuxino-micro.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-iris-512.dtb \ tegra20-iris-512.dtb \
@@ -250,7 +272,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra30-beaver.dtb \ tegra30-beaver.dtb \
tegra30-cardhu-a02.dtb \ tegra30-cardhu-a02.dtb \
tegra30-cardhu-a04.dtb \ tegra30-cardhu-a04.dtb \
tegra114-dalmore.dtb tegra114-dalmore.dtb \
tegra124-venice2.dtb
dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
versatile-pb.dtb versatile-pb.dtb
dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb

View File

@@ -0,0 +1,16 @@
/*
* am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION
*
* Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "am335x-igep0033.dtsi"
/ {
model = "IGEP COM AM335x on AQUILA Expansion";
compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
};

View File

@@ -21,145 +21,6 @@
reg = <0x80000000 0x10000000>; /* 256 MB */ reg = <0x80000000 0x10000000>; /* 256 MB */
}; };
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
musb: usb@47400000 {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
};
};
leds { leds {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>; pinctrl-0 = <&user_leds_s0>;
@@ -183,15 +44,182 @@
led@4 { led@4 {
label = "beaglebone:green:usr2"; label = "beaglebone:green:usr2";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off"; default-state = "off";
}; };
led@5 { led@5 {
label = "beaglebone:green:usr3"; label = "beaglebone:green:usr3";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off"; default-state = "off";
}; };
}; };
vmmcsd_fixed: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
>;
};
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&usb {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
}; };
/include/ "tps65217.dtsi" /include/ "tps65217.dtsi"
@@ -260,3 +288,12 @@
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
}; };
&mmc1 {
status = "okay";
bus-width = <0x4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
cd-inverted;
};

View File

@@ -9,3 +9,21 @@
#include "am33xx.dtsi" #include "am33xx.dtsi"
#include "am335x-bone-common.dtsi" #include "am335x-bone-common.dtsi"
&ldo3_reg {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
&mmc1 {
vmmc-supply = <&ldo3_reg>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};

View File

@@ -15,3 +15,64 @@
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-always-on; regulator-always-on;
}; };
&mmc1 {
vmmc-supply = <&vmmcsd_fixed>;
};
&mmc2 {
vmmc-supply = <&vmmcsd_fixed>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
bus-width = <8>;
status = "okay";
ti,vcc-aux-disable-is-sleep;
};
&am33xx_pinmux {
nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
pinctrl-single,pins = <
0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
>;
};
nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
pinctrl-single,pins = <
0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
>;
};
};
&lcdc {
status = "okay";
};
/ {
hdmi {
compatible = "ti,tilcdc,slave";
i2c = <&i2c0>;
pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
status = "okay";
};
};

View File

@@ -24,324 +24,6 @@
reg = <0x80000000 0x10000000>; /* 256 MB */ reg = <0x80000000 0x10000000>; /* 256 MB */
}; };
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
matrix_keypad_s0: matrix_keypad_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
>;
};
volume_keys_s0: volume_keys_s0 {
pinctrl-single,pins = <
0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
nandflash_pins_s0: nandflash_pins_s0 {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
};
musb: usb@47400000 {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
i2c1: i2c@4802a000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <100000>;
lis331dlh: lis331dlh@18 {
compatible = "st,lis331dlh", "st,lis3lv02d";
reg = <0x18>;
Vdd-supply = <&lis3_reg>;
Vdd_IO-supply = <&lis3_reg>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
st,wakeup-y-hi;
st,wakeup-z-lo;
st,wakeup-z-hi;
st,min-limit-x = <120>;
st,min-limit-y = <120>;
st,min-limit-z = <140>;
st,max-limit-x = <550>;
st,max-limit-y = <550>;
st,max-limit-z = <750>;
};
tsl2550: tsl2550@39 {
compatible = "taos,tsl2550";
reg = <0x39>;
};
tmp275: tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
};
elm: elm@48080000 {
status = "okay";
};
epwmss0: epwmss@48300000 {
status = "okay";
ecap0: ecap@48300100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
};
gpmc: gpmc@50000000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
elm_id = <&elm>;
/* MTD partition table */
partition@0 {
label = "SPL1";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "SPL2";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "SPL3";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "SPL4";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "U-boot";
reg = <0x00080000 0x001e0000>;
};
partition@5 {
label = "environment";
reg = <0x00260000 0x00020000>;
};
partition@6 {
label = "Kernel";
reg = <0x00280000 0x00500000>;
};
partition@7 {
label = "File-System";
reg = <0x00780000 0x0F880000>;
};
};
};
};
vbat: fixedregulator@0 { vbat: fixedregulator@0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vbat"; regulator-name = "vbat";
@@ -403,10 +85,447 @@
brightness-levels = <0 51 53 56 62 75 101 152 255>; brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>; default-brightness-level = <8>;
}; };
panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_s0>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <32>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
800x480p62 {
clock-frequency = <30000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <39>;
hback-porch = <39>;
hsync-len = <47>;
vback-porch = <29>;
vfront-porch = <13>;
vsync-len = <2>;
hsync-active = <1>;
vsync-active = <1>;
};
};
};
sound {
compatible = "ti,da830-evm-audio";
ti,model = "AM335x-EVM";
ti,audio-codec = <&tlv320aic3106>;
ti,mcasp-controller = <&mcasp1>;
ti,codec-clock-rate = <12000000>;
ti,audio-routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In",
"LINE1R", "Line In";
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
matrix_keypad_s0: matrix_keypad_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
>;
};
volume_keys_s0: volume_keys_s0 {
pinctrl-single,pins = <
0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
nandflash_pins_s0: nandflash_pins_s0 {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
lcd_pins_s0: lcd_pins_s0 {
pinctrl-single,pins = <
0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */
0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */
0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */
0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */
0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */
0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */
0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
>;
};
am335x_evm_audio_pins: am335x_evm_audio_pins {
pinctrl-single,pins = <
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
};
&usb {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <100000>;
lis331dlh: lis331dlh@18 {
compatible = "st,lis331dlh", "st,lis3lv02d";
reg = <0x18>;
Vdd-supply = <&lis3_reg>;
Vdd_IO-supply = <&lis3_reg>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
st,wakeup-y-hi;
st,wakeup-z-lo;
st,wakeup-z-hi;
st,min-limit-x = <120>;
st,min-limit-y = <120>;
st,min-limit-z = <140>;
st,max-limit-x = <550>;
st,max-limit-y = <550>;
st,max-limit-z = <750>;
};
tsl2550: tsl2550@39 {
compatible = "taos,tsl2550";
reg = <0x39>;
};
tmp275: tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tlv320aic3106: tlv320aic3106@1b {
compatible = "ti,tlv320aic3106";
reg = <0x1b>;
status = "okay";
/* Regulators */
AVDD-supply = <&vaux2_reg>;
IOVDD-supply = <&vaux2_reg>;
DRVDD-supply = <&vaux2_reg>;
DVDD-supply = <&vbat>;
};
};
&lcdc {
status = "okay";
};
&elm {
status = "okay";
};
&epwmss0 {
status = "okay";
ecap0: ecap@48300100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
elm_id = <&elm>;
/* MTD partition table */
partition@0 {
label = "SPL1";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "SPL2";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "SPL3";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "SPL4";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "U-boot";
reg = <0x00080000 0x001e0000>;
};
partition@5 {
label = "environment";
reg = <0x00260000 0x00020000>;
};
partition@6 {
label = "Kernel";
reg = <0x00280000 0x00500000>;
};
partition@7 {
label = "File-System";
reg = <0x00780000 0x0F880000>;
};
};
}; };
#include "tps65910.dtsi" #include "tps65910.dtsi"
&mcasp1 {
pinctrl-names = "default";
pinctrl-0 = <&am335x_evm_audio_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
/* 4 serializers */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0 0 1 2
>;
tx-num-evt = <1>;
rx-num-evt = <1>;
};
&tps { &tps {
vcc1-supply = <&vbat>; vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>; vcc2-supply = <&vbat>;
@@ -477,6 +596,8 @@
}; };
vmmc_reg: regulator@12 { vmmc_reg: regulator@12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on; regulator-always-on;
}; };
}; };
@@ -517,3 +638,17 @@
ti,adc-channels = <4 5 6 7>; ti,adc-channels = <4 5 6 7>;
}; };
}; };
&mmc1 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <4>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};

View File

@@ -31,210 +31,6 @@
reg = <0x80000000 0x10000000>; /* 256 MB */ reg = <0x80000000 0x10000000>; /* 256 MB */
}; };
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
>;
};
gpio_keys_s0: gpio_keys_s0 {
pinctrl-single,pins = <
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
ecap2_pins: backlight_pins {
pinctrl-single,pins = <
0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
/* Slave 2 */
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
/* Slave 2 reset value*/
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
lis331dlh: lis331dlh@18 {
compatible = "st,lis331dlh", "st,lis3lv02d";
reg = <0x18>;
Vdd-supply = <&lis3_reg>;
Vdd_IO-supply = <&lis3_reg>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
st,wakeup-y-hi;
st,wakeup-z-lo;
st,wakeup-z-hi;
st,min-limit-x = <120>;
st,min-limit-y = <120>;
st,min-limit-z = <140>;
st,max-limit-x = <550>;
st,max-limit-y = <550>;
st,max-limit-z = <750>;
};
};
musb: usb@47400000 {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
};
epwmss2: epwmss@48304000 {
status = "okay";
ecap2: ecap@48304100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap2_pins>;
};
};
};
vbat: fixedregulator@0 { vbat: fixedregulator@0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vbat"; regulator-name = "vbat";
@@ -319,6 +115,240 @@
brightness-levels = <0 58 61 66 75 90 125 170 255>; brightness-levels = <0 58 61 66 75 90 125 170 255>;
default-brightness-level = <8>; default-brightness-level = <8>;
}; };
sound {
compatible = "ti,da830-evm-audio";
ti,model = "AM335x-EVMSK";
ti,audio-codec = <&tlv320aic3106>;
ti,mcasp-controller = <&mcasp1>;
ti,codec-clock-rate = <24576000>;
ti,audio-routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT";
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
>;
};
gpio_keys_s0: gpio_keys_s0 {
pinctrl-single,pins = <
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
ecap2_pins: backlight_pins {
pinctrl-single,pins = <
0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
/* Slave 2 */
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
/* Slave 2 reset value*/
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
mcasp1_pins: mcasp1_pins {
pinctrl-single,pins = <
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
lis331dlh: lis331dlh@18 {
compatible = "st,lis331dlh", "st,lis3lv02d";
reg = <0x18>;
Vdd-supply = <&lis3_reg>;
Vdd_IO-supply = <&lis3_reg>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
st,wakeup-y-hi;
st,wakeup-z-lo;
st,wakeup-z-hi;
st,min-limit-x = <120>;
st,min-limit-y = <120>;
st,min-limit-z = <140>;
st,max-limit-x = <550>;
st,max-limit-y = <550>;
st,max-limit-z = <750>;
};
tlv320aic3106: tlv320aic3106@1b {
compatible = "ti,tlv320aic3106";
reg = <0x1b>;
status = "okay";
/* Regulators */
AVDD-supply = <&vaux2_reg>;
IOVDD-supply = <&vaux2_reg>;
DRVDD-supply = <&vaux2_reg>;
DVDD-supply = <&vbat>;
};
};
&usb {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
};
&epwmss2 {
status = "okay";
ecap2: ecap@48304100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap2_pins>;
};
}; };
#include "tps65910.dtsi" #include "tps65910.dtsi"
@@ -393,6 +423,8 @@
}; };
vmmc_reg: regulator@12 { vmmc_reg: regulator@12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on; regulator-always-on;
}; };
}; };
@@ -419,3 +451,37 @@
phy_id = <&davinci_mdio>, <1>; phy_id = <&davinci_mdio>, <1>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
}; };
&mmc1 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <4>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&gpio0 {
ti,no-reset-on-init;
};
&mcasp1 {
pinctrl-names = "default";
pinctrl-0 = <&mcasp1_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
/* 4 serializers */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0 0 1 2
>;
tx-num-evt = <1>;
rx-num-evt = <1>;
};

View File

@@ -0,0 +1,278 @@
/*
* am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
*
* Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
/ {
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&leds_pins>;
compatible = "gpio-leds";
led@0 {
label = "com:green:user";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
vmmc: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&am33xx_pinmux {
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
nandflash_pins: pinmux_nandflash_pins {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
leds_pins: pinmux_leds_pins {
pinctrl-single,pins = <
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
};
&elm {
status = "okay";
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
elm_id = <&elm>;
/* MTD partition table */
partition@0 {
label = "SPL";
reg = <0x00000000 0x000080000>;
};
partition@1 {
label = "U-boot";
reg = <0x00080000 0x001e0000>;
};
partition@2 {
label = "U-Boot Env";
reg = <0x00260000 0x00020000>;
};
partition@3 {
label = "Kernel";
reg = <0x00280000 0x00500000>;
};
partition@4 {
label = "File System";
reg = <0x00780000 0x007880000>;
};
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmc>;
bus-width = <4>;
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};
#include "tps65910.dtsi"
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-always-on;
};
vdd1_reg: regulator@2 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1312500>;
regulator-boot-on;
regulator-always-on;
};
vdd2_reg: regulator@3 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
vdd3_reg: regulator@4 {
regulator-always-on;
};
vdig1_reg: regulator@5 {
regulator-always-on;
};
vdig2_reg: regulator@6 {
regulator-always-on;
};
vpll_reg: regulator@7 {
regulator-always-on;
};
vdac_reg: regulator@8 {
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-always-on;
};
vmmc_reg: regulator@12 {
regulator-always-on;
};
};
};

View File

@@ -0,0 +1,431 @@
/*
* Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
/ {
model = "Newflow AM335x NanoBone";
compatible = "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
leds {
compatible = "gpio-leds";
led@0 {
label = "nanobone:green:usr1";
gpios = <&gpio1 5 0>;
default-state = "off";
};
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&misc_pins>;
misc_pins: misc_pins {
pinctrl-single,pins = <
0x15c (PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */
>;
};
gpmc_pins: gpmc_pins {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */
0x84 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */
0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */
0xa4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */
0xa8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */
0xac (PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */
0xb0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */
0xb4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */
0xb8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */
0xbc (PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */
0xe0 (PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */
0xe4 (PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */
0xe8 (PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */
>;
};
i2c0_pins: i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
uart1_pins: uart1_pins {
pinctrl-single,pins = <
0x178 (PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
0x17c (PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
0x184 (PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
>;
};
uart2_pins: uart2_pins {
pinctrl-single,pins = <
0xc0 (PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */
0xc4 (PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */
0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
>;
};
uart3_pins: uart3_pins {
pinctrl-single,pins = <
0xc8 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */
0xcc (PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */
0x160 (PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */
0x164 (PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
>;
};
uart4_pins: uart4_pins {
pinctrl-single,pins = <
0xd0 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */
0xd4 (PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */
0x168 (PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */
0x16c (PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */
>;
};
uart5_pins: uart5_pins {
pinctrl-single,pins = <
0xd8 (PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */
0x144 (PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */
>;
};
mmc1_pins: mmc1_pins {
pinctrl-single,pins = <
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
rs485-rx-during-tx;
rs485-rts-delay = <1 1>;
linux,rs485-enabled-at-boot-time;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
rs485-rts-delay = <1 1>;
linux,rs485-enabled-at-boot-time;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5_pins>;
status = "okay";
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
gpio@20 {
compatible = "mcp,mcp23017";
reg = <0x20>;
};
tps: tps@24 {
reg = <0x24>;
};
eeprom@53 {
compatible = "mcp,24c02";
reg = <0x53>;
pagesize = <8>;
};
rtc@68 {
compatible = "dallas,ds1307";
reg = <0x68>;
};
};
&elm {
status = "okay";
};
&gpmc {
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
status = "okay";
gpmc,num-waitpins = <2>;
pinctrl-names = "default";
pinctrl-0 = <&gpmc_pins>;
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x08000000 0x08000000>; /* CS0: NOR 128M */
nor@0,0 {
reg = <0 0x00000000 0x08000000>;
compatible = "cfi-flash";
linux,mtd-name = "spansion,s29gl010p11t";
bank-width = <2>;
gpmc,mux-add-data = <2>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <160>;
gpmc,cs-wr-off-ns = <160>;
gpmc,adv-on-ns = <10>;
gpmc,adv-rd-off-ns = <30>;
gpmc,adv-wr-off-ns = <30>;
gpmc,oe-on-ns = <40>;
gpmc,oe-off-ns = <160>;
gpmc,we-on-ns = <40>;
gpmc,we-off-ns = <160>;
gpmc,rd-cycle-ns = <160>;
gpmc,wr-cycle-ns = <160>;
gpmc,access-ns = <150>;
gpmc,page-burst-access-ns = <10>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-delay-ns = <20>;
gpmc,wr-data-mux-bus-ns = <70>;
gpmc,wr-access-ns = <80>;
#address-cells = <1>;
#size-cells = <1>;
/*
MTD partition table
===================
+------------+-->0x00000000-> U-Boot start
| |
| |-->0x000BFFFF-> U-Boot end
| |-->0x000C0000-> ENV1 start
| |
| |-->0x000DFFFF-> ENV1 end
| |-->0x000E0000-> ENV2 start
| |
| |-->0x000FFFFF-> ENV2 end
| |-->0x00100000-> Kernel start
| |
| |-->0x004FFFFF-> Kernel end
| |-->0x00500000-> File system start
| |
| |-->0x014FFFFF-> File system end
| |-->0x01500000-> User data start
| |
| |-->0x03FFFFFF-> User data end
| |-->0x04000000-> Data storage start
| |
+------------+-->0x08000000-> NOR end (Free end)
*/
partition@0 {
label = "boot";
reg = <0x00000000 0x000c0000>; /* 768KB */
};
partition@1 {
label = "env1";
reg = <0x000c0000 0x00020000>; /* 128KB */
};
partition@2 {
label = "env2";
reg = <0x000e0000 0x00020000>; /* 128KB */
};
partition@3 {
label = "kernel";
reg = <0x00100000 0x00400000>; /* 4MB */
};
partition@4 {
label = "rootfs";
reg = <0x00500000 0x01000000>; /* 16MB */
};
partition@5 {
label = "user";
reg = <0x01500000 0x02b00000>; /* 43MB */
};
partition@6 {
label = "data";
reg = <0x04000000 0x04000000>; /* 64MB */
};
};
};
&mac {
dual_emac = <1>;
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
dual_emac_res_vlan = <2>;
};
&mmc1 {
status = "okay";
vmmc-supply = <&ldo4_reg>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
bus-width = <4>;
cd-gpios = <&gpio3 8 0>;
wp-gpios = <&gpio3 18 0>;
};
#include "tps65217.dtsi"
&tps {
regulators {
dcdc1_reg: regulator@0 {
/* +1.5V voltage with ±4% tolerance */
regulator-min-microvolt = <1450000>;
regulator-max-microvolt = <1550000>;
regulator-boot-on;
regulator-always-on;
};
dcdc2_reg: regulator@1 {
/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <915000>;
regulator-max-microvolt = <1140000>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <915000>;
regulator-max-microvolt = <1140000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
/* +1.8V voltage with ±4% tolerance */
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <1870000>;
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: regulator@4 {
/* +3.3V voltage with ±4% tolerance */
regulator-min-microvolt = <3175000>;
regulator-max-microvolt = <3430000>;
regulator-boot-on;
regulator-always-on;
};
ldo3_reg: regulator@5 {
/* +1.8V voltage with ±4% tolerance */
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <1870000>;
regulator-boot-on;
regulator-always-on;
};
ldo4_reg: regulator@6 {
/* +3.3V voltage with ±4% tolerance */
regulator-min-microvolt = <3175000>;
regulator-max-microvolt = <3430000>;
regulator-boot-on;
regulator-always-on;
};
};
};

View File

@@ -18,6 +18,9 @@
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
aliases { aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
serial0 = &uart0; serial0 = &uart0;
serial1 = &uart1; serial1 = &uart1;
serial2 = &uart2; serial2 = &uart2;
@@ -30,6 +33,8 @@
usb1 = &usb1; usb1 = &usb1;
phy0 = &usb0_phy; phy0 = &usb0_phy;
phy1 = &usb1_phy; phy1 = &usb1_phy;
ethernet0 = &cpsw_emac0;
ethernet1 = &cpsw_emac1;
}; };
cpus { cpus {
@@ -57,6 +62,11 @@
}; };
}; };
pmu {
compatible = "arm,cortex-a8-pmu";
interrupts = <3>;
};
/* /*
* The soc node represents the soc top level view. It is uses for IPs * The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself. * that are not memory mapped in the MPU view or for the MPU itself.
@@ -100,13 +110,25 @@
reg = <0x48200000 0x1000>; reg = <0x48200000 0x1000>;
}; };
edma: edma@49000000 {
compatible = "ti,edma3";
ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
reg = <0x49000000 0x10000>,
<0x44e10f90 0x10>;
interrupts = <12 13 14>;
#dma-cells = <1>;
dma-channels = <64>;
ti,edma-regions = <4>;
ti,edma-slots = <256>;
};
gpio0: gpio@44e07000 { gpio0: gpio@44e07000 {
compatible = "ti,omap4-gpio"; compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1"; ti,hwmods = "gpio1";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <2>;
reg = <0x44e07000 0x1000>; reg = <0x44e07000 0x1000>;
interrupts = <96>; interrupts = <96>;
}; };
@@ -117,7 +139,7 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <2>;
reg = <0x4804c000 0x1000>; reg = <0x4804c000 0x1000>;
interrupts = <98>; interrupts = <98>;
}; };
@@ -128,7 +150,7 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <2>;
reg = <0x481ac000 0x1000>; reg = <0x481ac000 0x1000>;
interrupts = <32>; interrupts = <32>;
}; };
@@ -139,7 +161,7 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <2>;
reg = <0x481ae000 0x1000>; reg = <0x481ae000 0x1000>;
interrupts = <62>; interrupts = <62>;
}; };
@@ -228,6 +250,50 @@
status = "disabled"; status = "disabled";
}; };
mmc1: mmc@48060000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
ti,needs-special-hs-handling;
dmas = <&edma 24
&edma 25>;
dma-names = "tx", "rx";
interrupts = <64>;
interrupt-parent = <&intc>;
reg = <0x48060000 0x1000>;
status = "disabled";
};
mmc2: mmc@481d8000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc2";
ti,needs-special-reset;
dmas = <&edma 2
&edma 3>;
dma-names = "tx", "rx";
interrupts = <28>;
interrupt-parent = <&intc>;
reg = <0x481d8000 0x1000>;
status = "disabled";
};
mmc3: mmc@47810000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <29>;
interrupt-parent = <&intc>;
reg = <0x47810000 0x1000>;
status = "disabled";
};
hwspinlock: spinlock@480ca000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x480ca000 0x1000>;
ti,hwmods = "spinlock";
};
wdt2: wdt@44e35000 { wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt"; compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2"; ti,hwmods = "wd_timer2";
@@ -323,6 +389,11 @@
interrupts = <65>; interrupts = <65>;
ti,spi-num-cs = <2>; ti,spi-num-cs = <2>;
ti,hwmods = "spi0"; ti,hwmods = "spi0";
dmas = <&edma 16
&edma 17
&edma 18
&edma 19>;
dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled"; status = "disabled";
}; };
@@ -334,6 +405,11 @@
interrupts = <125>; interrupts = <125>;
ti,spi-num-cs = <2>; ti,spi-num-cs = <2>;
ti,hwmods = "spi1"; ti,hwmods = "spi1";
dmas = <&edma 42
&edma 43
&edma 44
&edma 45>;
dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled"; status = "disabled";
}; };
@@ -346,7 +422,7 @@
ti,hwmods = "usb_otg_hs"; ti,hwmods = "usb_otg_hs";
status = "disabled"; status = "disabled";
ctrl_mod: control@44e10000 { usb_ctrl_mod: control@44e10000 {
compatible = "ti,am335x-usb-ctrl-module"; compatible = "ti,am335x-usb-ctrl-module";
reg = <0x44e10620 0x10 reg = <0x44e10620 0x10
0x44e10648 0x4>; 0x44e10648 0x4>;
@@ -359,7 +435,7 @@
reg = <0x47401300 0x100>; reg = <0x47401300 0x100>;
reg-names = "phy"; reg-names = "phy";
status = "disabled"; status = "disabled";
ti,ctrl_mod = <&ctrl_mod>; ti,ctrl_mod = <&usb_ctrl_mod>;
}; };
usb0: usb@47401000 { usb0: usb@47401000 {
@@ -407,7 +483,7 @@
reg = <0x47401b00 0x100>; reg = <0x47401b00 0x100>;
reg-names = "phy"; reg-names = "phy";
status = "disabled"; status = "disabled";
ti,ctrl_mod = <&ctrl_mod>; ti,ctrl_mod = <&usb_ctrl_mod>;
}; };
usb1: usb@47401800 { usb1: usb@47401800 {
@@ -607,6 +683,7 @@
reg = <0x44d00000 0x4000 /* M3 UMEM */ reg = <0x44d00000 0x4000 /* M3 UMEM */
0x44d80000 0x2000>; /* M3 DMEM */ 0x44d80000 0x2000>; /* M3 DMEM */
ti,hwmods = "wkup_m3"; ti,hwmods = "wkup_m3";
ti,no-reset-on-init;
}; };
elm: elm@48080000 { elm: elm@48080000 {
@@ -617,6 +694,15 @@
status = "disabled"; status = "disabled";
}; };
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
status = "disabled";
};
tscadc: tscadc@44e0d000 { tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc"; compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>; reg = <0x44e0d000 0x1000>;
@@ -637,6 +723,7 @@
gpmc: gpmc@50000000 { gpmc: gpmc@50000000 {
compatible = "ti,am3352-gpmc"; compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc"; ti,hwmods = "gpmc";
ti,no-idle-on-init;
reg = <0x50000000 0x2000>; reg = <0x50000000 0x2000>;
interrupts = <100>; interrupts = <100>;
gpmc,num-cs = <7>; gpmc,num-cs = <7>;
@@ -645,5 +732,59 @@
#size-cells = <1>; #size-cells = <1>;
status = "disabled"; status = "disabled";
}; };
sham: sham@53100000 {
compatible = "ti,omap4-sham";
ti,hwmods = "sham";
reg = <0x53100000 0x200>;
interrupts = <109>;
dmas = <&edma 36>;
dma-names = "rx";
};
aes: aes@53500000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x53500000 0xa0>;
interrupts = <103>;
dmas = <&edma 6>,
<&edma 5>;
dma-names = "tx", "rx";
};
mcasp0: mcasp@48038000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp0";
reg = <0x48038000 0x2000>,
<0x46000000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <80>, <81>;
interrupts-names = "tx", "rx";
status = "disabled";
dmas = <&edma 8>,
<&edma 9>;
dma-names = "tx", "rx";
};
mcasp1: mcasp@4803C000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp1";
reg = <0x4803C000 0x2000>,
<0x46400000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <82>, <83>;
interrupts-names = "tx", "rx";
status = "disabled";
dmas = <&edma 10>,
<&edma 11>;
dma-names = "tx", "rx";
};
rng: rng@48310000 {
compatible = "ti,omap4-rng";
ti,hwmods = "rng";
reg = <0x48310000 0x2000>;
interrupts = <111>;
};
}; };
}; };

View File

@@ -18,12 +18,21 @@
aliases { aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
serial0 = &uart0; serial0 = &uart0;
ethernet0 = &cpsw_emac0;
ethernet1 = &cpsw_emac1;
}; };
cpus { cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 { cpu@0 {
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
}; };
}; };
@@ -35,16 +44,100 @@
<0x48240100 0x0100>; <0x48240100 0x0100>;
}; };
l2-cache-controller@48242000 {
compatible = "arm,pl310-cache";
reg = <0x48242000 0x1000>;
cache-unified;
cache-level = <2>;
};
am43xx_pinmux: pinmux@44e10800 {
compatible = "pinctrl-single";
reg = <0x44e10800 0x31c>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
ocp { ocp {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
ti,hwmods = "l3_main";
edma: edma@49000000 {
compatible = "ti,edma3";
ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
reg = <0x49000000 0x10000>,
<0x44e10f90 0x10>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
dma-channels = <64>;
ti,edma-regions = <4>;
ti,edma-slots = <256>;
};
uart0: serial@44e09000 { uart0: serial@44e09000 {
compatible = "ti,am4372-uart","ti,omap2-uart"; compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x44e09000 0x2000>; reg = <0x44e09000 0x2000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart1";
};
uart1: serial@48022000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x48022000 0x2000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
status = "disabled";
};
uart2: serial@48024000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x48024000 0x2000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
status = "disabled";
};
uart3: serial@481a6000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x481a6000 0x2000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
status = "disabled";
};
uart4: serial@481a8000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x481a8000 0x2000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart5";
status = "disabled";
};
uart5: serial@481aa000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x481aa000 0x2000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart6";
status = "disabled";
};
mailbox: mailbox@480C8000 {
compatible = "ti,omap4-mailbox";
reg = <0x480C8000 0x200>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
ti,mbox-names = "wkup_m3";
ti,mbox-data = <0 0 0 0>;
status = "disabled";
}; };
timer1: timer@44e31000 { timer1: timer@44e31000 {
@@ -52,17 +145,523 @@
reg = <0x44e31000 0x400>; reg = <0x44e31000 0x400>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-alwon; ti,timer-alwon;
ti,hwmods = "timer1";
}; };
timer2: timer@48040000 { timer2: timer@48040000 {
compatible = "ti,am4372-timer","ti,am335x-timer"; compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48040000 0x400>; reg = <0x48040000 0x400>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer2";
};
timer3: timer@48042000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48042000 0x400>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer3";
status = "disabled";
};
timer4: timer@48044000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48044000 0x400>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
ti,hwmods = "timer4";
status = "disabled";
};
timer5: timer@48046000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48046000 0x400>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
ti,hwmods = "timer5";
status = "disabled";
};
timer6: timer@48048000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48048000 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
ti,hwmods = "timer6";
status = "disabled";
};
timer7: timer@4804a000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x4804a000 0x400>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
ti,hwmods = "timer7";
status = "disabled";
};
timer8: timer@481c1000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x481c1000 0x400>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer8";
status = "disabled";
};
timer9: timer@4833d000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x4833d000 0x400>;
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer9";
status = "disabled";
};
timer10: timer@4833f000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x4833f000 0x400>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer10";
status = "disabled";
};
timer11: timer@48341000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48341000 0x400>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer11";
status = "disabled";
}; };
counter32k: counter@44e86000 { counter32k: counter@44e86000 {
compatible = "ti,am4372-counter32k","ti,omap-counter32k"; compatible = "ti,am4372-counter32k","ti,omap-counter32k";
reg = <0x44e86000 0x40>; reg = <0x44e86000 0x40>;
ti,hwmods = "counter_32k";
};
rtc@44e3e000 {
compatible = "ti,am4372-rtc","ti,da830-rtc";
reg = <0x44e3e000 0x1000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "rtc";
status = "disabled";
};
wdt@44e35000 {
compatible = "ti,am4372-wdt","ti,omap3-wdt";
reg = <0x44e35000 0x1000>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "wd_timer2";
};
gpio0: gpio@44e07000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x44e07000 0x1000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio1";
status = "disabled";
};
gpio1: gpio@4804c000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x4804c000 0x1000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio2";
status = "disabled";
};
gpio2: gpio@481ac000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x481ac000 0x1000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio3";
status = "disabled";
};
gpio3: gpio@481ae000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x481ae000 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio4";
status = "disabled";
};
gpio4: gpio@48320000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x48320000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio5";
status = "disabled";
};
gpio5: gpio@48322000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x48322000 0x1000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio6";
status = "disabled";
};
i2c0: i2c@44e0b000 {
compatible = "ti,am4372-i2c","ti,omap4-i2c";
reg = <0x44e0b000 0x1000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "i2c1";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@4802a000 {
compatible = "ti,am4372-i2c","ti,omap4-i2c";
reg = <0x4802a000 0x1000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "i2c2";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@4819c000 {
compatible = "ti,am4372-i2c","ti,omap4-i2c";
reg = <0x4819c000 0x1000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "i2c3";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi0: spi@48030000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x48030000 0x400>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi0";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mmc1: mmc@48060000 {
compatible = "ti,omap4-hsmmc";
reg = <0x48060000 0x1000>;
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
dmas = <&edma 24
&edma 25>;
dma-names = "tx", "rx";
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmc2: mmc@481d8000 {
compatible = "ti,omap4-hsmmc";
reg = <0x481d8000 0x1000>;
ti,hwmods = "mmc2";
ti,needs-special-reset;
dmas = <&edma 2
&edma 3>;
dma-names = "tx", "rx";
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmc3: mmc@47810000 {
compatible = "ti,omap4-hsmmc";
reg = <0x47810000 0x1000>;
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
spi1: spi@481a0000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x481a0000 0x400>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi1";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi2: spi@481a2000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x481a2000 0x400>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi2";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi3: spi@481a4000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x481a4000 0x400>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi3";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi4: spi@48345000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x48345000 0x400>;
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi4";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mac: ethernet@4a100000 {
compatible = "ti,am4372-cpsw","ti,cpsw";
reg = <0x4a100000 0x800
0x4a101200 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <1>;
ti,hwmods = "cpgmac0";
status = "disabled";
cpdma_channels = <8>;
ale_entries = <1024>;
bd_ram_size = <0x2000>;
no_bd_ram = <0>;
rx_descs = <64>;
mac_control = <0x20>;
slaves = <2>;
active_slave = <0>;
cpts_clock_mult = <0x80000000>;
cpts_clock_shift = <29>;
ranges;
davinci_mdio: mdio@4a101000 {
compatible = "ti,am4372-mdio","ti,davinci_mdio";
reg = <0x4a101000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "davinci_mdio";
bus_freq = <1000000>;
status = "disabled";
};
cpsw_emac0: slave@4a100200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
cpsw_emac1: slave@4a100300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
};
epwmss0: epwmss@48300000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48300000 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "epwmss0";
status = "disabled";
ecap0: ecap@48300100 {
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
reg = <0x48300100 0x80>;
ti,hwmods = "ecap0";
status = "disabled";
};
ehrpwm0: ehrpwm@48300200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
reg = <0x48300200 0x80>;
ti,hwmods = "ehrpwm0";
status = "disabled";
};
};
epwmss1: epwmss@48302000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48302000 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "epwmss1";
status = "disabled";
ecap1: ecap@48302100 {
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
reg = <0x48302100 0x80>;
ti,hwmods = "ecap1";
status = "disabled";
};
ehrpwm1: ehrpwm@48302200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
reg = <0x48302200 0x80>;
ti,hwmods = "ehrpwm1";
status = "disabled";
};
};
epwmss2: epwmss@48304000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48304000 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "epwmss2";
status = "disabled";
ecap2: ecap@48304100 {
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
reg = <0x48304100 0x80>;
ti,hwmods = "ecap2";
status = "disabled";
};
ehrpwm2: ehrpwm@48304200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
reg = <0x48304200 0x80>;
ti,hwmods = "ehrpwm2";
status = "disabled";
};
};
epwmss3: epwmss@48306000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48306000 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "epwmss3";
status = "disabled";
ehrpwm3: ehrpwm@48306200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
reg = <0x48306200 0x80>;
ti,hwmods = "ehrpwm3";
status = "disabled";
};
};
epwmss4: epwmss@48308000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48308000 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "epwmss4";
status = "disabled";
ehrpwm4: ehrpwm@48308200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
reg = <0x48308200 0x80>;
ti,hwmods = "ehrpwm4";
status = "disabled";
};
};
epwmss5: epwmss@4830a000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x4830a000 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "epwmss5";
status = "disabled";
ehrpwm5: ehrpwm@4830a200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
reg = <0x4830a200 0x80>;
ti,hwmods = "ehrpwm5";
status = "disabled";
};
};
sham: sham@53100000 {
compatible = "ti,omap5-sham";
ti,hwmods = "sham";
reg = <0x53100000 0x300>;
dmas = <&edma 36>;
dma-names = "rx";
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
};
aes: aes@53501000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x53501000 0xa0>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&edma 6
&edma 5>;
dma-names = "tx", "rx";
};
des: des@53701000 {
compatible = "ti,omap4-des";
ti,hwmods = "des";
reg = <0x53701000 0xa0>;
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&edma 34
&edma 33>;
dma-names = "tx", "rx";
};
mcasp0: mcasp@48038000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp0";
reg = <0x48038000 0x2000>,
<0x46000000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <80>, <81>;
interrupts-names = "tx", "rx";
status = "disabled";
dmas = <&edma 8>,
<&edma 9>;
dma-names = "tx", "rx";
};
mcasp1: mcasp@4803C000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp1";
reg = <0x4803C000 0x2000>,
<0x46400000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <82>, <83>;
interrupts-names = "tx", "rx";
status = "disabled";
dmas = <&edma 10>,
<&edma 11>;
dma-names = "tx", "rx";
}; };
}; };
}; };

View File

@@ -11,8 +11,176 @@
/dts-v1/; /dts-v1/;
#include "am4372.dtsi" #include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/gpio/gpio.h>
/ { / {
model = "TI AM43x EPOS EVM"; model = "TI AM43x EPOS EVM";
compatible = "ti,am43x-epos-evm","ti,am4372","ti,am43"; compatible = "ti,am43x-epos-evm","ti,am4372","ti,am43";
vmmcsd_fixed: fixedregulator-sd {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
};
am43xx_pinmux: pinmux@44e10800 {
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
};
matrix_keypad: matrix_keypad@0 {
compatible = "gpio-matrix-keypad";
debounce-delay-ms = <5>;
col-scan-delay-us = <2>;
row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
&gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
&gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */
&gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */
col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */
&gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */
&gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */
&gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */
linux,keymap = <0x00000201 /* P1 */
0x01000204 /* P4 */
0x02000207 /* P7 */
0x0300020a /* NUMERIC_STAR */
0x00010202 /* P2 */
0x01010205 /* P5 */
0x02010208 /* P8 */
0x03010200 /* P0 */
0x00020203 /* P3 */
0x01020206 /* P6 */
0x02020209 /* P9 */
0x0302020b /* NUMERIC_POUND */
0x00030067 /* UP */
0x0103006a /* RIGHT */
0x0203006c /* DOWN */
0x03030069>; /* LEFT */
};
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <16>;
phy-mode = "rmii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "rmii";
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
at24@50 {
compatible = "at24,24c256";
pagesize = <64>;
reg = <0x50>;
};
pixcir_ts@5c {
compatible = "pixcir,pixcir_ts";
reg = <0x5c>;
interrupt-parent = <&gpio1>;
interrupts = <17 0>;
attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
x-size = <1024>;
y-size = <768>;
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
}; };

View File

@@ -0,0 +1,193 @@
/*
* Device Tree file for NETGEAR ReadyNAS 104
*
* Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
/dts-v1/;
#include "armada-370.dtsi"
/ {
model = "NETGEAR ReadyNAS 104";
compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* Connected to FL1009 USB 3.0 controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to Marvell 88SE9215 SATA controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
};
pinctrl {
poweroff: poweroff {
marvell,pins = "mpp60";
marvell,function = "gpio";
};
backup_key_pin: backup-key-pin {
marvell,pins = "mpp52";
marvell,function = "gpio";
};
power_key_pin: power-key-pin {
marvell,pins = "mpp62";
marvell,function = "gpio";
};
backup_led_pin: backup-led-pin {
marvell,pins = "mpp63";
marvell,function = "gpo";
};
power_led_pin: power-led-pin {
marvell,pins = "mpp64";
marvell,function = "gpio";
};
reset_key_pin: reset-key-pin {
marvell,pins = "mpp65";
marvell,function = "gpio";
};
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
usb@50000 {
status = "okay";
};
i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
clock-frequency = <100000>;
status = "okay";
g762: g762@3e {
compatible = "gmt,g762";
reg = <0x3e>;
clocks = <&g762_clk>; /* input clock */
fan_gear_mode = <0>;
fan_startv = <1>;
pwm_polarity = <0>;
};
};
};
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
g762_clk: fixedclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <8192>;
};
};
gpio_leds {
compatible = "gpio-leds";
pinctrl-0 = <&backup_led_pin &power_led_pin>;
pinctrl-names = "default";
blue_backup_led {
label = "rn104:blue:backup";
gpios = <&gpio1 31 0>; /* GPIO 63 Active High */
default-state = "off";
};
blue_power_led {
label = "rn104:blue:pwr";
gpios = <&gpio2 0 1>; /* GPIO 64 Active Low */
linux,default-trigger = "keep";
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&backup_key_pin
&power_key_pin
&reset_key_pin>;
pinctrl-names = "default";
button@1 {
label = "Backup Button";
linux,code = <133>; /* KEY_COPY */
gpios = <&gpio1 20 1>;
};
button@2 {
label = "Power Button";
linux,code = <116>; /* KEY_POWER */
gpios = <&gpio1 30 0>;
};
button@3 {
label = "Reset Button";
linux,code = <0x198>; /* KEY_RESTART */
gpios = <&gpio2 1 1>;
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
pinctrl-0 = <&poweroff>;
pinctrl-names = "default";
gpios = <&gpio1 28 1>;
};
};

View File

@@ -113,6 +113,7 @@
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
interrupt-controller; interrupt-controller;
msi-controller;
}; };
coherency-fabric@20200 { coherency-fabric@20200 {
@@ -137,6 +138,14 @@
status = "disabled"; status = "disabled";
}; };
coredivclk: corediv-clock@18740 {
compatible = "marvell,armada-370-corediv-clock";
reg = <0x18740 0xc>;
#clock-cells = <1>;
clocks = <&mainpll>;
clock-output-names = "nand";
};
timer@20300 { timer@20300 {
reg = <0x20300 0x30>, <0x21040 0x30>; reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts = <37>, <38>, <39>, <40>, <5>, <6>; interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
@@ -176,7 +185,6 @@
i2c0: i2c@11000 { i2c0: i2c@11000 {
compatible = "marvell,mv64xxx-i2c"; compatible = "marvell,mv64xxx-i2c";
reg = <0x11000 0x20>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <31>; interrupts = <31>;
@@ -187,7 +195,6 @@
i2c1: i2c@11100 { i2c1: i2c@11100 {
compatible = "marvell,mv64xxx-i2c"; compatible = "marvell,mv64xxx-i2c";
reg = <0x11100 0x20>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <32>; interrupts = <32>;
@@ -252,4 +259,13 @@
}; };
}; };
clocks {
/* 2 GHz fixed main PLL */
mainpll: mainpll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2000000000>;
};
};
}; };

View File

@@ -44,6 +44,7 @@
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
msi-parent = <&mpic>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = ranges =
@@ -218,6 +219,14 @@
}; };
}; };
i2c0: i2c@11000 {
reg = <0x11000 0x20>;
};
i2c1: i2c@11100 {
reg = <0x11100 0x20>;
};
usb@50000 { usb@50000 {
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
}; };

View File

@@ -0,0 +1,75 @@
/*
* Device Tree file for Marvell Armada XP Matrix board
*
* Copyright (C) 2013 Marvell
*
* Lior Amsalem <alior@marvell.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/dts-v1/;
#include "armada-xp-mv78460.dtsi"
/ {
model = "Marvell Armada XP Matrix Board";
compatible = "marvell,axp-matrix", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
memory {
device_type = "memory";
reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
internal-regs {
serial@12000 {
clock-frequency = <250000000>;
status = "okay";
};
serial@12100 {
clock-frequency = <250000000>;
status = "okay";
};
serial@12200 {
clock-frequency = <250000000>;
status = "okay";
};
serial@12300 {
clock-frequency = <250000000>;
status = "okay";
};
sata@a0000 {
nr-ports = <2>;
status = "okay";
};
ethernet@30000 {
status = "okay";
phy-mode = "sgmii";
};
pcie-controller {
status = "okay";
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
};
usb@50000 {
status = "okay";
};
};
};
};

View File

@@ -57,6 +57,7 @@
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
msi-parent = <&mpic>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = ranges =

View File

@@ -58,6 +58,7 @@
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
msi-parent = <&mpic>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = ranges =

View File

@@ -74,6 +74,7 @@
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
msi-parent = <&mpic>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = ranges =

View File

@@ -147,6 +147,16 @@
}; };
}; };
i2c0: i2c@11000 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11000 0x100>;
};
i2c1: i2c@11100 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11100 0x100>;
};
usb@50000 { usb@50000 {
clocks = <&gateclk 18>; clocks = <&gateclk 18>;
}; };

View File

@@ -96,7 +96,6 @@
}; };
spi0: spi@fffc8000 { spi0: spi@fffc8000 {
status = "okay";
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@0 { mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash"; compatible = "atmel,at45", "atmel,dataflash";

View File

@@ -437,6 +437,9 @@
compatible = "atmel,at91sam9g45-ssc"; compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0010000 0x4000>; reg = <0xf0010000 0x4000>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
<&dma 0 AT91_DMA_CFG_PER_ID(22)>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled"; status = "disabled";

View File

@@ -38,9 +38,18 @@
status = "okay"; status = "okay";
}; };
ssc0: ssc@f0010000 {
status = "okay";
};
i2c0: i2c@f8010000 { i2c0: i2c@f8010000 {
status = "okay"; status = "okay";
wm8904: codec@1a {
compatible = "wm8904";
reg = <0x1a>;
};
qt1070: keyboard@1b { qt1070: keyboard@1b {
compatible = "qt1070"; compatible = "qt1070";
reg = <0x1b>; reg = <0x1b>;
@@ -82,6 +91,13 @@
<AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; <AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
}; };
}; };
sound {
pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
atmel,pins =
<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
}; };
spi0: spi@f0000000 { spi0: spi@f0000000 {
@@ -142,4 +158,22 @@
gpio-key,wakeup; gpio-key,wakeup;
}; };
}; };
sound {
compatible = "atmel,asoc-wm8904";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;
atmel,model = "wm8904 @ AT91SAM9N12";
atmel,audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN2L", "Line In Jack",
"IN2R", "Line In Jack",
"Mic", "MICBIAS",
"IN1L", "Mic";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8904>;
};
}; };

View File

@@ -65,6 +65,11 @@
compatible = "sirf,prima2-rsc"; compatible = "sirf,prima2-rsc";
reg = <0x88020000 0x1000>; reg = <0x88020000 0x1000>;
}; };
cphifbg@88030000 {
compatible = "sirf,prima2-cphifbg";
reg = <0x88030000 0x1000>;
};
}; };
mem-iobg { mem-iobg {
@@ -75,10 +80,17 @@
memory-controller@90000000 { memory-controller@90000000 {
compatible = "sirf,prima2-memc"; compatible = "sirf,prima2-memc";
reg = <0x90000000 0x10000>; reg = <0x90000000 0x2000>;
interrupts = <27>; interrupts = <27>;
clocks = <&clks 5>; clocks = <&clks 5>;
}; };
memc-monitor {
compatible = "sirf,prima2-memcmon";
reg = <0x90002000 0x200>;
interrupts = <4>;
clocks = <&clks 32>;
};
}; };
disp-iobg { disp-iobg {
@@ -120,6 +132,20 @@
}; };
}; };
graphics2d-iobg {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0xa0000000 0xa0000000 0x8000000>;
ble@a0000000 {
compatible = "sirf,atlas6-ble";
reg = <0xa0000000 0x2000>;
interrupts = <5>;
clocks = <&clks 33>;
};
};
dsp-iobg { dsp-iobg {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
@@ -271,6 +297,11 @@
compatible = "sirf,prima2-spi"; compatible = "sirf,prima2-spi";
reg = <0xb0170000 0x10000>; reg = <0xb0170000 0x10000>;
interrupts = <16>; interrupts = <16>;
sirf,spi-num-chipselects = <1>;
sirf,spi-dma-rx-channel = <12>;
sirf,spi-dma-tx-channel = <13>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clks 20>; clocks = <&clks 20>;
status = "disabled"; status = "disabled";
}; };

View File

@@ -40,6 +40,7 @@
sdio4: sdio@3f1b0000 { sdio4: sdio@3f1b0000 {
max-frequency = <48000000>; max-frequency = <48000000>;
cd-gpios = <&gpio 14 0>;
status = "okay"; status = "okay";
}; };

View File

@@ -49,6 +49,36 @@
reg-io-width = <4>; reg-io-width = <4>;
}; };
uart@3e001000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e001000 0x1000>;
clock-frequency = <13000000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
};
uart@3e002000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e002000 0x1000>;
clock-frequency = <13000000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
};
uart@3e003000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e003000 0x1000>;
clock-frequency = <13000000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
};
L2: l2-cache { L2: l2-cache {
compatible = "brcm,bcm11351-a2-pl310-cache"; compatible = "brcm,bcm11351-a2-pl310-cache";
reg = <0x3ff20000 0x1000>; reg = <0x3ff20000 0x1000>;
@@ -68,31 +98,47 @@
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
gpio: gpio@35003000 {
compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
reg = <0x35003000 0x800>;
interrupts =
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
};
sdio1: sdio@3f180000 { sdio1: sdio@3f180000 {
compatible = "brcm,kona-sdhci"; compatible = "brcm,kona-sdhci";
reg = <0x3f180000 0x10000>; reg = <0x3f180000 0x10000>;
interrupts = <0x0 77 0x4>; interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
}; };
sdio2: sdio@3f190000 { sdio2: sdio@3f190000 {
compatible = "brcm,kona-sdhci"; compatible = "brcm,kona-sdhci";
reg = <0x3f190000 0x10000>; reg = <0x3f190000 0x10000>;
interrupts = <0x0 76 0x4>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
}; };
sdio3: sdio@3f1a0000 { sdio3: sdio@3f1a0000 {
compatible = "brcm,kona-sdhci"; compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x10000>; reg = <0x3f1a0000 0x10000>;
interrupts = <0x0 74 0x4>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
}; };
sdio4: sdio@3f1b0000 { sdio4: sdio@3f1b0000 {
compatible = "brcm,kona-sdhci"; compatible = "brcm,kona-sdhci";
reg = <0x3f1b0000 0x10000>; reg = <0x3f1b0000 0x10000>;
interrupts = <0x0 73 0x4>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
}; };

View File

@@ -40,6 +40,7 @@
sdio4: sdio@3f1b0000 { sdio4: sdio@3f1b0000 {
max-frequency = <48000000>; max-frequency = <48000000>;
cd-gpios = <&gpio 14 0>;
status = "okay"; status = "okay";
}; };
}; };

View File

@@ -1,6 +1,6 @@
/dts-v1/; /dts-v1/;
/include/ "dove.dtsi" #include "dove.dtsi"
/ { / {
model = "Compulab CM-A510"; model = "Compulab CM-A510";

View File

@@ -1,6 +1,6 @@
/dts-v1/; /dts-v1/;
/include/ "dove.dtsi" #include "dove.dtsi"
/ { / {
model = "SolidRun CuBox"; model = "SolidRun CuBox";
@@ -99,19 +99,13 @@
silabs,pll-master; silabs,pll-master;
}; };
clkout1 { clkout2 {
reg = <1>; reg = <2>;
silabs,drive-strength = <8>; silabs,drive-strength = <8>;
silabs,multisynth-source = <1>; silabs,multisynth-source = <1>;
silabs,clock-source = <0>; silabs,clock-source = <0>;
silabs,pll-master; silabs,pll-master;
}; };
clkout2 {
reg = <2>;
silabs,multisynth-source = <1>;
silabs,clock-source = <0>;
};
}; };
}; };
@@ -132,3 +126,11 @@
reg = <0>; reg = <0>;
}; };
}; };
&audio1 {
status = "okay";
clocks = <&gate_clk 13>, <&si5351 2>;
clock-names = "internal", "extclk";
pinctrl-0 = <&pmx_audio1_i2s1_spdifo &pmx_audio1_extclk>;
pinctrl-names = "default";
};

View File

@@ -1,6 +1,6 @@
/dts-v1/; /dts-v1/;
/include/ "dove.dtsi" #include "dove.dtsi"
/ { / {
model = "Globalscale D2Plug"; model = "Globalscale D2Plug";

View File

@@ -0,0 +1,103 @@
/dts-v1/;
#include "dove.dtsi"
/ {
model = "Globalscale D3Plug";
compatible = "globalscale,d3plug", "marvell,dove";
memory {
device_type = "memory";
reg = <0x00000000 0x40000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/mmcblk0p2 rw rootwait";
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>;
pinctrl-names = "default";
wlan-act {
label = "wlan-act";
gpios = <&gpio0 0 1>;
};
wlan-ap {
label = "wlan-ap";
gpios = <&gpio0 1 1>;
};
status {
label = "status";
gpios = <&gpio0 2 1>;
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usb_power: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "USB Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 8 0>;
pinctrl-0 = <&pmx_gpio_8>;
pinctrl-names = "default";
};
};
};
&uart0 { status = "okay"; };
&sata0 { status = "okay"; };
&i2c0 { status = "okay"; };
/* Samsung M8G2F eMMC */
&sdio0 {
status = "okay";
non-removable;
bus-width = <4>;
};
/* Marvell SD8787 WLAN/BT */
&sdio1 {
status = "okay";
non-removable;
};
&spi0 {
status = "okay";
/* spi0.0: 2M Flash Macronix MX25L1605D */
spi-flash@0 {
compatible = "st,m25l1605d";
spi-max-frequency = <86000000>;
reg = <0>;
};
};
&pcie {
status = "okay";
/* Fresco Logic USB3.0 xHCI controller */
pcie-port@0 {
status = "okay";
reset-gpios = <&gpio0 26 1>;
reset-delay-us = <20000>;
pinctrl-0 = <&pmx_camera_gpio>;
pinctrl-names = "default";
};
/* Mini-PCIe slot */
pcie-port@1 {
status = "okay";
reset-gpios = <&gpio0 25 1>;
};
};

View File

@@ -1,6 +1,6 @@
/dts-v1/; /dts-v1/;
/include/ "dove.dtsi" #include "dove.dtsi"
/ { / {
model = "Marvell DB-MV88AP510-BP Development Board"; model = "Marvell DB-MV88AP510-BP Development Board";

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,275 @@
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "dra7.dtsi"
/ {
model = "TI DRA7";
compatible = "ti,dra7-evm", "ti,dra752", "ti,dra7";
memory {
device_type = "memory";
reg = <0x80000000 0x60000000>; /* 1536 MB */
};
mmc2_3v3: fixedregulator-mmc2 {
compatible = "regulator-fixed";
regulator-name = "mmc2_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&dra7_pmx_core {
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
>;
};
i2c3_pins: pinmux_i2c3_pins {
pinctrl-single,pins = <
0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */
0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */
>;
};
mcspi1_pins: pinmux_mcspi1_pins {
pinctrl-single,pins = <
0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */
0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */
0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */
0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */
0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */
0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */
>;
};
mcspi2_pins: pinmux_mcspi2_pins {
pinctrl-single,pins = <
0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */
0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */
0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */
0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
>;
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;
tps659038: tps659038@58 {
compatible = "ti,tps659038";
reg = <0x58>;
tps659038_pmic {
compatible = "ti,tps659038-pmic";
regulators {
smps123_reg: smps123 {
/* VDD_MPU */
regulator-name = "smps123";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps45_reg: smps45 {
/* VDD_DSPEVE */
regulator-name = "smps45";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
};
smps6_reg: smps6 {
/* VDD_GPU - over VDD_SMPS6 */
regulator-name = "smps6";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <12500000>;
regulator-boot-on;
};
smps7_reg: smps7 {
/* CORE_VDD */
regulator-name = "smps7";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1030000>;
regulator-always-on;
regulator-boot-on;
};
smps8_reg: smps8 {
/* VDD_IVAHD */
regulator-name = "smps8";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-boot-on;
};
smps9_reg: smps9 {
/* VDDS1V8 */
regulator-name = "smps9";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo1_reg: ldo1 {
/* LDO1_OUT --> SDIO */
regulator-name = "ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
ldo2_reg: ldo2 {
/* VDD_RTCIO */
/* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */
regulator-name = "ldo2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
ldo3_reg: ldo3 {
/* VDDA_1V8_PHY */
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
ldo9_reg: ldo9 {
/* VDD_RTC */
regulator-name = "ldo9";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-boot-on;
};
ldoln_reg: ldoln {
/* VDDA_1V8_PLL */
regulator-name = "ldoln";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldousb_reg: ldousb {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldousb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};
};
};
};
&i2c2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
clock-frequency = <400000>;
};
&i2c3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
clock-frequency = <3400000>;
};
&mcspi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcspi1_pins>;
};
&mcspi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcspi2_pins>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&mmc1 {
status = "okay";
vmmc-supply = <&ldo1_reg>;
bus-width = <4>;
};
&mmc2 {
status = "okay";
vmmc-supply = <&mmc2_3v3>;
bus-width = <8>;
};
&cpu0 {
cpu0-supply = <&smps123_reg>;
};

586
arch/arm/boot/dts/dra7.dtsi Normal file
View File

@@ -0,0 +1,586 @@
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Based on "omap4.dtsi"
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/dra.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ti,dra7xx";
interrupt-parent = <&gic>;
aliases {
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
i2c3 = &i2c4;
i2c4 = &i2c5;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
operating-points = <
/* kHz uV */
1000000 1060000
1176000 1160000
>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
gic: interrupt-controller@48211000 {
compatible = "arm,cortex-a15-gic";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x48211000 0x1000>,
<0x48212000 0x1000>,
<0x48214000 0x2000>,
<0x48216000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
};
/*
* The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
mpu {
compatible = "ti,omap5-mpu";
ti,hwmods = "mpu";
};
};
/*
* XXX: Use a flat representation of the SOC interconnect.
* The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/
ocp {
compatible = "ti,omap4-l3-noc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "l3_main_1", "l3_main_2";
reg = <0x44000000 0x2000>,
<0x44800000 0x3000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
counter32k: counter@4ae04000 {
compatible = "ti,omap-counter32k";
reg = <0x4ae04000 0x40>;
ti,hwmods = "counter_32k";
};
dra7_pmx_core: pinmux@4a003400 {
compatible = "pinctrl-single";
reg = <0x4a003400 0x0464>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x3fffffff>;
};
sdma: dma-controller@4a056000 {
compatible = "ti,omap4430-sdma";
reg = <0x4a056000 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
#dma-channels = <32>;
#dma-requests = <127>;
};
gpio1: gpio@4ae10000 {
compatible = "ti,omap4-gpio";
reg = <0x4ae10000 0x200>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio2: gpio@48055000 {
compatible = "ti,omap4-gpio";
reg = <0x48055000 0x200>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio3: gpio@48057000 {
compatible = "ti,omap4-gpio";
reg = <0x48057000 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio4: gpio@48059000 {
compatible = "ti,omap4-gpio";
reg = <0x48059000 0x200>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio5: gpio@4805b000 {
compatible = "ti,omap4-gpio";
reg = <0x4805b000 0x200>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio5";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio6: gpio@4805d000 {
compatible = "ti,omap4-gpio";
reg = <0x4805d000 0x200>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio6";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio7: gpio@48051000 {
compatible = "ti,omap4-gpio";
reg = <0x48051000 0x200>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio7";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio8: gpio@48053000 {
compatible = "ti,omap4-gpio";
reg = <0x48053000 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio8";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
reg = <0x4806a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart1";
clock-frequency = <48000000>;
status = "disabled";
};
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
reg = <0x4806c000 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
status = "disabled";
};
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
reg = <0x48020000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
status = "disabled";
};
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
reg = <0x4806e000 0x100>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
status = "disabled";
};
uart5: serial@48066000 {
compatible = "ti,omap4-uart";
reg = <0x48066000 0x100>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart5";
clock-frequency = <48000000>;
status = "disabled";
};
uart6: serial@48068000 {
compatible = "ti,omap4-uart";
reg = <0x48068000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart6";
clock-frequency = <48000000>;
status = "disabled";
};
uart7: serial@48420000 {
compatible = "ti,omap4-uart";
reg = <0x48420000 0x100>;
ti,hwmods = "uart7";
clock-frequency = <48000000>;
status = "disabled";
};
uart8: serial@48422000 {
compatible = "ti,omap4-uart";
reg = <0x48422000 0x100>;
ti,hwmods = "uart8";
clock-frequency = <48000000>;
status = "disabled";
};
uart9: serial@48424000 {
compatible = "ti,omap4-uart";
reg = <0x48424000 0x100>;
ti,hwmods = "uart9";
clock-frequency = <48000000>;
status = "disabled";
};
uart10: serial@4ae2b000 {
compatible = "ti,omap4-uart";
reg = <0x4ae2b000 0x100>;
ti,hwmods = "uart10";
clock-frequency = <48000000>;
status = "disabled";
};
timer1: timer@4ae18000 {
compatible = "ti,omap5430-timer";
reg = <0x4ae18000 0x80>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer1";
ti,timer-alwon;
};
timer2: timer@48032000 {
compatible = "ti,omap5430-timer";
reg = <0x48032000 0x80>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer2";
};
timer3: timer@48034000 {
compatible = "ti,omap5430-timer";
reg = <0x48034000 0x80>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer3";
};
timer4: timer@48036000 {
compatible = "ti,omap5430-timer";
reg = <0x48036000 0x80>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer4";
};
timer5: timer@48820000 {
compatible = "ti,omap5430-timer";
reg = <0x48820000 0x80>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer5";
ti,timer-dsp;
};
timer6: timer@48822000 {
compatible = "ti,omap5430-timer";
reg = <0x48822000 0x80>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer6";
ti,timer-dsp;
ti,timer-pwm;
};
timer7: timer@48824000 {
compatible = "ti,omap5430-timer";
reg = <0x48824000 0x80>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer7";
ti,timer-dsp;
};
timer8: timer@48826000 {
compatible = "ti,omap5430-timer";
reg = <0x48826000 0x80>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer8";
ti,timer-dsp;
ti,timer-pwm;
};
timer9: timer@4803e000 {
compatible = "ti,omap5430-timer";
reg = <0x4803e000 0x80>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer9";
};
timer10: timer@48086000 {
compatible = "ti,omap5430-timer";
reg = <0x48086000 0x80>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer10";
};
timer11: timer@48088000 {
compatible = "ti,omap5430-timer";
reg = <0x48088000 0x80>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer11";
ti,timer-pwm;
};
timer13: timer@48828000 {
compatible = "ti,omap5430-timer";
reg = <0x48828000 0x80>;
ti,hwmods = "timer13";
status = "disabled";
};
timer14: timer@4882a000 {
compatible = "ti,omap5430-timer";
reg = <0x4882a000 0x80>;
ti,hwmods = "timer14";
status = "disabled";
};
timer15: timer@4882c000 {
compatible = "ti,omap5430-timer";
reg = <0x4882c000 0x80>;
ti,hwmods = "timer15";
status = "disabled";
};
timer16: timer@4882e000 {
compatible = "ti,omap5430-timer";
reg = <0x4882e000 0x80>;
ti,hwmods = "timer16";
status = "disabled";
};
wdt2: wdt@4ae14000 {
compatible = "ti,omap4-wdt";
reg = <0x4ae14000 0x80>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "wd_timer2";
};
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
reg = <0x48070000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
status = "disabled";
};
i2c2: i2c@48072000 {
compatible = "ti,omap4-i2c";
reg = <0x48072000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
status = "disabled";
};
i2c3: i2c@48060000 {
compatible = "ti,omap4-i2c";
reg = <0x48060000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
status = "disabled";
};
i2c4: i2c@4807a000 {
compatible = "ti,omap4-i2c";
reg = <0x4807a000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c4";
status = "disabled";
};
i2c5: i2c@4807c000 {
compatible = "ti,omap4-i2c";
reg = <0x4807c000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c5";
status = "disabled";
};
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
dmas = <&sdma 61>, <&sdma 62>;
dma-names = "tx", "rx";
status = "disabled";
};
mmc2: mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480b4000 0x400>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc2";
ti,needs-special-reset;
dmas = <&sdma 47>, <&sdma 48>;
dma-names = "tx", "rx";
status = "disabled";
};
mmc3: mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480ad000 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc3";
ti,needs-special-reset;
dmas = <&sdma 77>, <&sdma 78>;
dma-names = "tx", "rx";
status = "disabled";
};
mmc4: mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480d1000 0x400>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc4";
ti,needs-special-reset;
dmas = <&sdma 57>, <&sdma 58>;
dma-names = "tx", "rx";
status = "disabled";
};
mcspi1: spi@48098000 {
compatible = "ti,omap4-mcspi";
reg = <0x48098000 0x200>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi1";
ti,spi-num-cs = <4>;
dmas = <&sdma 35>,
<&sdma 36>,
<&sdma 37>,
<&sdma 38>,
<&sdma 39>,
<&sdma 40>,
<&sdma 41>,
<&sdma 42>;
dma-names = "tx0", "rx0", "tx1", "rx1",
"tx2", "rx2", "tx3", "rx3";
status = "disabled";
};
mcspi2: spi@4809a000 {
compatible = "ti,omap4-mcspi";
reg = <0x4809a000 0x200>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi2";
ti,spi-num-cs = <2>;
dmas = <&sdma 43>,
<&sdma 44>,
<&sdma 45>,
<&sdma 46>;
dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
mcspi3: spi@480b8000 {
compatible = "ti,omap4-mcspi";
reg = <0x480b8000 0x200>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi3";
ti,spi-num-cs = <2>;
dmas = <&sdma 15>, <&sdma 16>;
dma-names = "tx0", "rx0";
status = "disabled";
};
mcspi4: spi@480ba000 {
compatible = "ti,omap4-mcspi";
reg = <0x480ba000 0x200>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi4";
ti,spi-num-cs = <1>;
dmas = <&sdma 70>, <&sdma 71>;
dma-names = "tx0", "rx0";
status = "disabled";
};
};
};

View File

@@ -49,6 +49,12 @@
reg = <0x10000000 0x100>; reg = <0x10000000 0x100>;
}; };
mipi_phy: video-phy@10020710 {
compatible = "samsung,s5pv210-mipi-video-phy";
reg = <0x10020710 8>;
#phy-cells = <1>;
};
pd_mfc: mfc-power-domain@10023C40 { pd_mfc: mfc-power-domain@10023C40 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>; reg = <0x10023C40 0x20>;
@@ -161,6 +167,8 @@
clock-names = "csis", "sclk_csis"; clock-names = "csis", "sclk_csis";
bus-width = <4>; bus-width = <4>;
samsung,power-domain = <&pd_cam>; samsung,power-domain = <&pd_cam>;
phys = <&mipi_phy 0>;
phy-names = "csis";
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@@ -174,6 +182,8 @@
clock-names = "csis", "sclk_csis"; clock-names = "csis", "sclk_csis";
bus-width = <2>; bus-width = <2>;
samsung,power-domain = <&pd_cam>; samsung,power-domain = <&pd_cam>;
phys = <&mipi_phy 2>;
phy-names = "csis";
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

View File

@@ -32,13 +32,20 @@
bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
}; };
mmc_reg: voltage-regulator { regulators {
compatible = "regulator-fixed"; compatible = "simple-bus";
regulator-name = "VMEM_VDD_2.8V"; #address-cells = <1>;
regulator-min-microvolt = <2800000>; #size-cells = <0>;
regulator-max-microvolt = <2800000>;
gpio = <&gpx1 1 0>; mmc_reg: regulator@0 {
enable-active-high; compatible = "regulator-fixed";
reg = <0>;
regulator-name = "VMEM_VDD_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpx1 1 0>;
enable-active-high;
};
}; };
tmu@100C0000 { tmu@100C0000 {

View File

@@ -32,13 +32,20 @@
reg = <0x0203F000 0x1000>; reg = <0x0203F000 0x1000>;
}; };
mmc_reg: voltage-regulator { regulators {
compatible = "regulator-fixed"; compatible = "simple-bus";
regulator-name = "VMEM_VDD_2.8V"; #address-cells = <1>;
regulator-min-microvolt = <2800000>; #size-cells = <0>;
regulator-max-microvolt = <2800000>;
gpio = <&gpx1 1 0>; mmc_reg: regulator@0 {
enable-active-high; compatible = "regulator-fixed";
reg = <0>;
regulator-name = "VMEM_VDD_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpx1 1 0>;
enable-active-high;
};
}; };
pinctrl@11000000 { pinctrl@11000000 {

View File

@@ -324,7 +324,14 @@
}; };
i2c@12C80000 { i2c@12C80000 {
status = "disabled"; samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
samsung,i2c-slave-addr = <0x50>;
hdmiddc@50 {
compatible = "samsung,exynos4210-hdmiddc";
reg = <0x50>;
};
}; };
i2c@12C90000 { i2c@12C90000 {
@@ -362,6 +369,17 @@
status = "disabled"; status = "disabled";
}; };
i2c@12CE0000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
samsung,i2c-slave-addr = <0x38>;
hdmiphy@38 {
compatible = "samsung,exynos4212-hdmiphy";
reg = <0x38>;
};
};
i2c@121D0000 { i2c@121D0000 {
status = "disabled"; status = "disabled";
}; };
@@ -412,6 +430,10 @@
status = "disabled"; status = "disabled";
}; };
i2s0: i2s@03830000 {
status = "okay";
};
spi_0: spi@12d20000 { spi_0: spi@12d20000 {
status = "disabled"; status = "disabled";
}; };
@@ -482,13 +504,15 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
main_dc_reg: fixedregulator@1 { main_dc_reg: regulator@0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <0>;
regulator-name = "MAIN_DC"; regulator-name = "MAIN_DC";
}; };
mmc_reg: voltage-regulator { mmc_reg: regulator@1 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <1>;
regulator-name = "VDD_33ON_2.8V"; regulator-name = "VDD_33ON_2.8V";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
@@ -496,8 +520,9 @@
enable-active-high; enable-active-high;
}; };
reg_hdmi_en: fixedregulator@0 { reg_hdmi_en: regulator@2 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <2>;
regulator-name = "hdmi-en"; regulator-name = "hdmi-en";
}; };
}; };

View File

@@ -231,14 +231,6 @@
status = "okay"; status = "okay";
}; };
i2s1: i2s@12D60000 {
status = "disabled";
};
i2s2: i2s@12D70000 {
status = "disabled";
};
sound { sound {
compatible = "samsung,smdk-wm8994"; compatible = "samsung,smdk-wm8994";

View File

@@ -422,6 +422,7 @@
i2s0: i2s@03830000 { i2s0: i2s@03830000 {
compatible = "samsung,s5pv210-i2s"; compatible = "samsung,s5pv210-i2s";
status = "disabled";
reg = <0x03830000 0x100>; reg = <0x03830000 0x100>;
dmas = <&pdma0 10 dmas = <&pdma0 10
&pdma0 9 &pdma0 9
@@ -438,6 +439,7 @@
i2s1: i2s@12D60000 { i2s1: i2s@12D60000 {
compatible = "samsung,s3c6410-i2s"; compatible = "samsung,s3c6410-i2s";
status = "disabled";
reg = <0x12D60000 0x100>; reg = <0x12D60000 0x100>;
dmas = <&pdma1 12 dmas = <&pdma1 12
&pdma1 11>; &pdma1 11>;
@@ -450,6 +452,7 @@
i2s2: i2s@12D70000 { i2s2: i2s@12D70000 {
compatible = "samsung,s3c6410-i2s"; compatible = "samsung,s3c6410-i2s";
status = "disabled";
reg = <0x12D70000 0x100>; reg = <0x12D70000 0x100>;
dmas = <&pdma0 12 dmas = <&pdma0 12
&pdma0 11>; &pdma0 11>;
@@ -615,16 +618,18 @@
compatible = "samsung,exynos4212-hdmi"; compatible = "samsung,exynos4212-hdmi";
reg = <0x14530000 0x70000>; reg = <0x14530000 0x70000>;
interrupts = <0 95 0>; interrupts = <0 95 0>;
clocks = <&clock 333>, <&clock 136>, <&clock 137>, clocks = <&clock 344>, <&clock 136>, <&clock 137>,
<&clock 333>, <&clock 333>; <&clock 159>, <&clock 1024>;
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
"sclk_hdmiphy", "hdmiphy"; "sclk_hdmiphy", "mout_hdmi";
}; };
mixer { mixer {
compatible = "samsung,exynos5250-mixer"; compatible = "samsung,exynos5250-mixer";
reg = <0x14450000 0x10000>; reg = <0x14450000 0x10000>;
interrupts = <0 94 0>; interrupts = <0 94 0>;
clocks = <&clock 343>, <&clock 136>;
clock-names = "mixer", "sclk_hdmi";
}; };
dp_phy: video-phy@10040720 { dp_phy: video-phy@10040720 {

View File

@@ -61,4 +61,30 @@
}; };
}; };
pinctrl@13400000 {
hdmi_hpd_irq: hdmi-hpd-irq {
samsung,pins = "gpx3-7";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
hdmi@14530000 {
status = "okay";
hpd-gpio = <&gpx3 7 0>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_hpd_irq>;
};
i2c_2: i2c@12C80000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
status = "okay";
hdmiddc@50 {
compatible = "samsung,exynos4210-hdmiddc";
reg = <0x50>;
};
};
}; };

View File

@@ -27,6 +27,10 @@
pinctrl2 = &pinctrl_2; pinctrl2 = &pinctrl_2;
pinctrl3 = &pinctrl_3; pinctrl3 = &pinctrl_3;
pinctrl4 = &pinctrl_4; pinctrl4 = &pinctrl_4;
i2c0 = &i2c_0;
i2c1 = &i2c_1;
i2c2 = &i2c_2;
i2c3 = &i2c_3;
}; };
cpus { cpus {
@@ -235,4 +239,75 @@
io-channel-ranges; io-channel-ranges;
status = "disabled"; status = "disabled";
}; };
i2c_0: i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <0 56 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 261>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
status = "disabled";
};
i2c_1: i2c@12C70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <0 57 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 262>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
status = "disabled";
};
i2c_2: i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <0 58 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 263>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
status = "disabled";
};
i2c_3: i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <0 59 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 264>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
status = "disabled";
};
hdmi@14530000 {
compatible = "samsung,exynos4212-hdmi";
reg = <0x14530000 0x70000>;
interrupts = <0 95 0>;
clocks = <&clock 413>, <&clock 143>, <&clock 768>,
<&clock 158>, <&clock 640>;
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
"sclk_hdmiphy", "mout_hdmi";
status = "disabled";
};
mixer@14450000 {
compatible = "samsung,exynos5420-mixer";
reg = <0x14450000 0x10000>;
interrupts = <0 94 0>;
clocks = <&clock 431>, <&clock 143>;
clock-names = "mixer", "sclk_hdmi";
};
}; };

View File

@@ -68,9 +68,11 @@
pcie@290000 { pcie@290000 {
reset-gpio = <&pin_ctrl 5 0>; reset-gpio = <&pin_ctrl 5 0>;
status = "okay";
}; };
pcie@2a0000 { pcie@2a0000 {
reset-gpio = <&pin_ctrl 22 0>; reset-gpio = <&pin_ctrl 22 0>;
status = "okay";
}; };
}; };

View File

@@ -276,6 +276,7 @@
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0x0 0 &gic 53>; interrupt-map = <0x0 0 &gic 53>;
num-lanes = <4>; num-lanes = <4>;
status = "disabled";
}; };
pcie@2a0000 { pcie@2a0000 {
@@ -296,5 +297,6 @@
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0x0 0 &gic 56>; interrupt-map = <0x0 0 &gic 56>;
num-lanes = <4>; num-lanes = <4>;
status = "disabled";
}; };
}; };

View File

@@ -10,7 +10,7 @@
*/ */
/dts-v1/; /dts-v1/;
/include/ "imx23.dtsi" #include "imx23.dtsi"
/ { / {
model = "Freescale i.MX23 Evaluation Kit"; model = "Freescale i.MX23 Evaluation Kit";
@@ -45,14 +45,14 @@
hog_pins_a: hog@0 { hog_pins_a: hog@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1123 /* MX23_PAD_LCD_RESET__GPIO_1_18 */ MX23_PAD_LCD_RESET__GPIO_1_18
0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */ MX23_PAD_PWM3__GPIO_1_29
0x11e3 /* MX23_PAD_PWM4__GPIO_1_30 */ MX23_PAD_PWM4__GPIO_1_30
0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ MX23_PAD_SSP1_DETECT__SSP1_DETECT
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -12,7 +12,7 @@
*/ */
/dts-v1/; /dts-v1/;
/include/ "imx23.dtsi" #include "imx23.dtsi"
/ { / {
model = "i.MX23 Olinuxino Low Cost Board"; model = "i.MX23 Olinuxino Low Cost Board";
@@ -40,21 +40,21 @@
hog_pins_a: hog@0 { hog_pins_a: hog@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ MX23_PAD_GPMI_ALE__GPIO_0_17
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
led_pin_gpio2_1: led_gpio2_1@0 { led_pin_gpio2_1: led_gpio2_1@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ MX23_PAD_SSP1_DETECT__GPIO_2_1
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -0,0 +1,333 @@
/*
* Header providing constants for i.MX23 pinctrl bindings.
*
* Copyright (C) 2013 Lothar Waßmann <LW@KARO-electronics.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#ifndef __DT_BINDINGS_MX23_PINCTRL_H__
#define __DT_BINDINGS_MX23_PINCTRL_H__
#include "mxs-pinfunc.h"
#define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
#define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
#define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
#define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
#define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
#define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
#define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
#define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
#define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
#define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
#define MX23_PAD_GPMI_D10__GPMI_D10 0x00a0
#define MX23_PAD_GPMI_D11__GPMI_D11 0x00b0
#define MX23_PAD_GPMI_D12__GPMI_D12 0x00c0
#define MX23_PAD_GPMI_D13__GPMI_D13 0x00d0
#define MX23_PAD_GPMI_D14__GPMI_D14 0x00e0
#define MX23_PAD_GPMI_D15__GPMI_D15 0x00f0
#define MX23_PAD_GPMI_CLE__GPMI_CLE 0x0100
#define MX23_PAD_GPMI_ALE__GPMI_ALE 0x0110
#define MX23_PAD_GPMI_CE2N__GPMI_CE2N 0x0120
#define MX23_PAD_GPMI_RDY0__GPMI_RDY0 0x0130
#define MX23_PAD_GPMI_RDY1__GPMI_RDY1 0x0140
#define MX23_PAD_GPMI_RDY2__GPMI_RDY2 0x0150
#define MX23_PAD_GPMI_RDY3__GPMI_RDY3 0x0160
#define MX23_PAD_GPMI_WPN__GPMI_WPN 0x0170
#define MX23_PAD_GPMI_WRN__GPMI_WRN 0x0180
#define MX23_PAD_GPMI_RDN__GPMI_RDN 0x0190
#define MX23_PAD_AUART1_CTS__AUART1_CTS 0x01a0
#define MX23_PAD_AUART1_RTS__AUART1_RTS 0x01b0
#define MX23_PAD_AUART1_RX__AUART1_RX 0x01c0
#define MX23_PAD_AUART1_TX__AUART1_TX 0x01d0
#define MX23_PAD_I2C_SCL__I2C_SCL 0x01e0
#define MX23_PAD_I2C_SDA__I2C_SDA 0x01f0
#define MX23_PAD_LCD_D00__LCD_D00 0x1000
#define MX23_PAD_LCD_D01__LCD_D01 0x1010
#define MX23_PAD_LCD_D02__LCD_D02 0x1020
#define MX23_PAD_LCD_D03__LCD_D03 0x1030
#define MX23_PAD_LCD_D04__LCD_D04 0x1040
#define MX23_PAD_LCD_D05__LCD_D05 0x1050
#define MX23_PAD_LCD_D06__LCD_D06 0x1060
#define MX23_PAD_LCD_D07__LCD_D07 0x1070
#define MX23_PAD_LCD_D08__LCD_D08 0x1080
#define MX23_PAD_LCD_D09__LCD_D09 0x1090
#define MX23_PAD_LCD_D10__LCD_D10 0x10a0
#define MX23_PAD_LCD_D11__LCD_D11 0x10b0
#define MX23_PAD_LCD_D12__LCD_D12 0x10c0
#define MX23_PAD_LCD_D13__LCD_D13 0x10d0
#define MX23_PAD_LCD_D14__LCD_D14 0x10e0
#define MX23_PAD_LCD_D15__LCD_D15 0x10f0
#define MX23_PAD_LCD_D16__LCD_D16 0x1100
#define MX23_PAD_LCD_D17__LCD_D17 0x1110
#define MX23_PAD_LCD_RESET__LCD_RESET 0x1120
#define MX23_PAD_LCD_RS__LCD_RS 0x1130
#define MX23_PAD_LCD_WR__LCD_WR 0x1140
#define MX23_PAD_LCD_CS__LCD_CS 0x1150
#define MX23_PAD_LCD_DOTCK__LCD_DOTCK 0x1160
#define MX23_PAD_LCD_ENABLE__LCD_ENABLE 0x1170
#define MX23_PAD_LCD_HSYNC__LCD_HSYNC 0x1180
#define MX23_PAD_LCD_VSYNC__LCD_VSYNC 0x1190
#define MX23_PAD_PWM0__PWM0 0x11a0
#define MX23_PAD_PWM1__PWM1 0x11b0
#define MX23_PAD_PWM2__PWM2 0x11c0
#define MX23_PAD_PWM3__PWM3 0x11d0
#define MX23_PAD_PWM4__PWM4 0x11e0
#define MX23_PAD_SSP1_CMD__SSP1_CMD 0x2000
#define MX23_PAD_SSP1_DETECT__SSP1_DETECT 0x2010
#define MX23_PAD_SSP1_DATA0__SSP1_DATA0 0x2020
#define MX23_PAD_SSP1_DATA1__SSP1_DATA1 0x2030
#define MX23_PAD_SSP1_DATA2__SSP1_DATA2 0x2040
#define MX23_PAD_SSP1_DATA3__SSP1_DATA3 0x2050
#define MX23_PAD_SSP1_SCK__SSP1_SCK 0x2060
#define MX23_PAD_ROTARYA__ROTARYA 0x2070
#define MX23_PAD_ROTARYB__ROTARYB 0x2080
#define MX23_PAD_EMI_A00__EMI_A00 0x2090
#define MX23_PAD_EMI_A01__EMI_A01 0x20a0
#define MX23_PAD_EMI_A02__EMI_A02 0x20b0
#define MX23_PAD_EMI_A03__EMI_A03 0x20c0
#define MX23_PAD_EMI_A04__EMI_A04 0x20d0
#define MX23_PAD_EMI_A05__EMI_A05 0x20e0
#define MX23_PAD_EMI_A06__EMI_A06 0x20f0
#define MX23_PAD_EMI_A07__EMI_A07 0x2100
#define MX23_PAD_EMI_A08__EMI_A08 0x2110
#define MX23_PAD_EMI_A09__EMI_A09 0x2120
#define MX23_PAD_EMI_A10__EMI_A10 0x2130
#define MX23_PAD_EMI_A11__EMI_A11 0x2140
#define MX23_PAD_EMI_A12__EMI_A12 0x2150
#define MX23_PAD_EMI_BA0__EMI_BA0 0x2160
#define MX23_PAD_EMI_BA1__EMI_BA1 0x2170
#define MX23_PAD_EMI_CASN__EMI_CASN 0x2180
#define MX23_PAD_EMI_CE0N__EMI_CE0N 0x2190
#define MX23_PAD_EMI_CE1N__EMI_CE1N 0x21a0
#define MX23_PAD_GPMI_CE1N__GPMI_CE1N 0x21b0
#define MX23_PAD_GPMI_CE0N__GPMI_CE0N 0x21c0
#define MX23_PAD_EMI_CKE__EMI_CKE 0x21d0
#define MX23_PAD_EMI_RASN__EMI_RASN 0x21e0
#define MX23_PAD_EMI_WEN__EMI_WEN 0x21f0
#define MX23_PAD_EMI_D00__EMI_D00 0x3000
#define MX23_PAD_EMI_D01__EMI_D01 0x3010
#define MX23_PAD_EMI_D02__EMI_D02 0x3020
#define MX23_PAD_EMI_D03__EMI_D03 0x3030
#define MX23_PAD_EMI_D04__EMI_D04 0x3040
#define MX23_PAD_EMI_D05__EMI_D05 0x3050
#define MX23_PAD_EMI_D06__EMI_D06 0x3060
#define MX23_PAD_EMI_D07__EMI_D07 0x3070
#define MX23_PAD_EMI_D08__EMI_D08 0x3080
#define MX23_PAD_EMI_D09__EMI_D09 0x3090
#define MX23_PAD_EMI_D10__EMI_D10 0x30a0
#define MX23_PAD_EMI_D11__EMI_D11 0x30b0
#define MX23_PAD_EMI_D12__EMI_D12 0x30c0
#define MX23_PAD_EMI_D13__EMI_D13 0x30d0
#define MX23_PAD_EMI_D14__EMI_D14 0x30e0
#define MX23_PAD_EMI_D15__EMI_D15 0x30f0
#define MX23_PAD_EMI_DQM0__EMI_DQM0 0x3100
#define MX23_PAD_EMI_DQM1__EMI_DQM1 0x3110
#define MX23_PAD_EMI_DQS0__EMI_DQS0 0x3120
#define MX23_PAD_EMI_DQS1__EMI_DQS1 0x3130
#define MX23_PAD_EMI_CLK__EMI_CLK 0x3140
#define MX23_PAD_EMI_CLKN__EMI_CLKN 0x3150
#define MX23_PAD_GPMI_D00__LCD_D8 0x0001
#define MX23_PAD_GPMI_D01__LCD_D9 0x0011
#define MX23_PAD_GPMI_D02__LCD_D10 0x0021
#define MX23_PAD_GPMI_D03__LCD_D11 0x0031
#define MX23_PAD_GPMI_D04__LCD_D12 0x0041
#define MX23_PAD_GPMI_D05__LCD_D13 0x0051
#define MX23_PAD_GPMI_D06__LCD_D14 0x0061
#define MX23_PAD_GPMI_D07__LCD_D15 0x0071
#define MX23_PAD_GPMI_D08__LCD_D18 0x0081
#define MX23_PAD_GPMI_D09__LCD_D19 0x0091
#define MX23_PAD_GPMI_D10__LCD_D20 0x00a1
#define MX23_PAD_GPMI_D11__LCD_D21 0x00b1
#define MX23_PAD_GPMI_D12__LCD_D22 0x00c1
#define MX23_PAD_GPMI_D13__LCD_D23 0x00d1
#define MX23_PAD_GPMI_D14__AUART2_RX 0x00e1
#define MX23_PAD_GPMI_D15__AUART2_TX 0x00f1
#define MX23_PAD_GPMI_CLE__LCD_D16 0x0101
#define MX23_PAD_GPMI_ALE__LCD_D17 0x0111
#define MX23_PAD_GPMI_CE2N__ATA_A2 0x0121
#define MX23_PAD_AUART1_RTS__IR_CLK 0x01b1
#define MX23_PAD_AUART1_RX__IR_RX 0x01c1
#define MX23_PAD_AUART1_TX__IR_TX 0x01d1
#define MX23_PAD_I2C_SCL__GPMI_RDY2 0x01e1
#define MX23_PAD_I2C_SDA__GPMI_CE2N 0x01f1
#define MX23_PAD_LCD_D00__ETM_DA8 0x1001
#define MX23_PAD_LCD_D01__ETM_DA9 0x1011
#define MX23_PAD_LCD_D02__ETM_DA10 0x1021
#define MX23_PAD_LCD_D03__ETM_DA11 0x1031
#define MX23_PAD_LCD_D04__ETM_DA12 0x1041
#define MX23_PAD_LCD_D05__ETM_DA13 0x1051
#define MX23_PAD_LCD_D06__ETM_DA14 0x1061
#define MX23_PAD_LCD_D07__ETM_DA15 0x1071
#define MX23_PAD_LCD_D08__ETM_DA0 0x1081
#define MX23_PAD_LCD_D09__ETM_DA1 0x1091
#define MX23_PAD_LCD_D10__ETM_DA2 0x10a1
#define MX23_PAD_LCD_D11__ETM_DA3 0x10b1
#define MX23_PAD_LCD_D12__ETM_DA4 0x10c1
#define MX23_PAD_LCD_D13__ETM_DA5 0x10d1
#define MX23_PAD_LCD_D14__ETM_DA6 0x10e1
#define MX23_PAD_LCD_D15__ETM_DA7 0x10f1
#define MX23_PAD_LCD_RESET__ETM_TCTL 0x1121
#define MX23_PAD_LCD_RS__ETM_TCLK 0x1131
#define MX23_PAD_LCD_DOTCK__GPMI_RDY3 0x1161
#define MX23_PAD_LCD_ENABLE__I2C_SCL 0x1171
#define MX23_PAD_LCD_HSYNC__I2C_SDA 0x1181
#define MX23_PAD_LCD_VSYNC__LCD_BUSY 0x1191
#define MX23_PAD_PWM0__ROTARYA 0x11a1
#define MX23_PAD_PWM1__ROTARYB 0x11b1
#define MX23_PAD_PWM2__GPMI_RDY3 0x11c1
#define MX23_PAD_PWM3__ETM_TCTL 0x11d1
#define MX23_PAD_PWM4__ETM_TCLK 0x11e1
#define MX23_PAD_SSP1_DETECT__GPMI_CE3N 0x2011
#define MX23_PAD_SSP1_DATA1__I2C_SCL 0x2031
#define MX23_PAD_SSP1_DATA2__I2C_SDA 0x2041
#define MX23_PAD_ROTARYA__AUART2_RTS 0x2071
#define MX23_PAD_ROTARYB__AUART2_CTS 0x2081
#define MX23_PAD_GPMI_D00__SSP2_DATA0 0x0002
#define MX23_PAD_GPMI_D01__SSP2_DATA1 0x0012
#define MX23_PAD_GPMI_D02__SSP2_DATA2 0x0022
#define MX23_PAD_GPMI_D03__SSP2_DATA3 0x0032
#define MX23_PAD_GPMI_D04__SSP2_DATA4 0x0042
#define MX23_PAD_GPMI_D05__SSP2_DATA5 0x0052
#define MX23_PAD_GPMI_D06__SSP2_DATA6 0x0062
#define MX23_PAD_GPMI_D07__SSP2_DATA7 0x0072
#define MX23_PAD_GPMI_D08__SSP1_DATA4 0x0082
#define MX23_PAD_GPMI_D09__SSP1_DATA5 0x0092
#define MX23_PAD_GPMI_D10__SSP1_DATA6 0x00a2
#define MX23_PAD_GPMI_D11__SSP1_DATA7 0x00b2
#define MX23_PAD_GPMI_D15__GPMI_CE3N 0x00f2
#define MX23_PAD_GPMI_RDY0__SSP2_DETECT 0x0132
#define MX23_PAD_GPMI_RDY1__SSP2_CMD 0x0142
#define MX23_PAD_GPMI_WRN__SSP2_SCK 0x0182
#define MX23_PAD_AUART1_CTS__SSP1_DATA4 0x01a2
#define MX23_PAD_AUART1_RTS__SSP1_DATA5 0x01b2
#define MX23_PAD_AUART1_RX__SSP1_DATA6 0x01c2
#define MX23_PAD_AUART1_TX__SSP1_DATA7 0x01d2
#define MX23_PAD_I2C_SCL__AUART1_TX 0x01e2
#define MX23_PAD_I2C_SDA__AUART1_RX 0x01f2
#define MX23_PAD_LCD_D08__SAIF2_SDATA0 0x1082
#define MX23_PAD_LCD_D09__SAIF1_SDATA0 0x1092
#define MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK 0x10a2
#define MX23_PAD_LCD_D11__SAIF_LRCLK 0x10b2
#define MX23_PAD_LCD_D12__SAIF2_SDATA1 0x10c2
#define MX23_PAD_LCD_D13__SAIF2_SDATA2 0x10d2
#define MX23_PAD_LCD_D14__SAIF1_SDATA2 0x10e2
#define MX23_PAD_LCD_D15__SAIF1_SDATA1 0x10f2
#define MX23_PAD_LCD_D16__SAIF_ALT_BITCLK 0x1102
#define MX23_PAD_LCD_RESET__GPMI_CE3N 0x1122
#define MX23_PAD_PWM0__DUART_RX 0x11a2
#define MX23_PAD_PWM1__DUART_TX 0x11b2
#define MX23_PAD_PWM3__AUART1_CTS 0x11d2
#define MX23_PAD_PWM4__AUART1_RTS 0x11e2
#define MX23_PAD_SSP1_CMD__JTAG_TDO 0x2002
#define MX23_PAD_SSP1_DETECT__USB_OTG_ID 0x2012
#define MX23_PAD_SSP1_DATA0__JTAG_TDI 0x2022
#define MX23_PAD_SSP1_DATA1__JTAG_TCLK 0x2032
#define MX23_PAD_SSP1_DATA2__JTAG_RTCK 0x2042
#define MX23_PAD_SSP1_DATA3__JTAG_TMS 0x2052
#define MX23_PAD_SSP1_SCK__JTAG_TRST 0x2062
#define MX23_PAD_ROTARYA__SPDIF 0x2072
#define MX23_PAD_ROTARYB__GPMI_CE3N 0x2082
#define MX23_PAD_GPMI_D00__GPIO_0_0 0x0003
#define MX23_PAD_GPMI_D01__GPIO_0_1 0x0013
#define MX23_PAD_GPMI_D02__GPIO_0_2 0x0023
#define MX23_PAD_GPMI_D03__GPIO_0_3 0x0033
#define MX23_PAD_GPMI_D04__GPIO_0_4 0x0043
#define MX23_PAD_GPMI_D05__GPIO_0_5 0x0053
#define MX23_PAD_GPMI_D06__GPIO_0_6 0x0063
#define MX23_PAD_GPMI_D07__GPIO_0_7 0x0073
#define MX23_PAD_GPMI_D08__GPIO_0_8 0x0083
#define MX23_PAD_GPMI_D09__GPIO_0_9 0x0093
#define MX23_PAD_GPMI_D10__GPIO_0_10 0x00a3
#define MX23_PAD_GPMI_D11__GPIO_0_11 0x00b3
#define MX23_PAD_GPMI_D12__GPIO_0_12 0x00c3
#define MX23_PAD_GPMI_D13__GPIO_0_13 0x00d3
#define MX23_PAD_GPMI_D14__GPIO_0_14 0x00e3
#define MX23_PAD_GPMI_D15__GPIO_0_15 0x00f3
#define MX23_PAD_GPMI_CLE__GPIO_0_16 0x0103
#define MX23_PAD_GPMI_ALE__GPIO_0_17 0x0113
#define MX23_PAD_GPMI_CE2N__GPIO_0_18 0x0123
#define MX23_PAD_GPMI_RDY0__GPIO_0_19 0x0133
#define MX23_PAD_GPMI_RDY1__GPIO_0_20 0x0143
#define MX23_PAD_GPMI_RDY2__GPIO_0_21 0x0153
#define MX23_PAD_GPMI_RDY3__GPIO_0_22 0x0163
#define MX23_PAD_GPMI_WPN__GPIO_0_23 0x0173
#define MX23_PAD_GPMI_WRN__GPIO_0_24 0x0183
#define MX23_PAD_GPMI_RDN__GPIO_0_25 0x0193
#define MX23_PAD_AUART1_CTS__GPIO_0_26 0x01a3
#define MX23_PAD_AUART1_RTS__GPIO_0_27 0x01b3
#define MX23_PAD_AUART1_RX__GPIO_0_28 0x01c3
#define MX23_PAD_AUART1_TX__GPIO_0_29 0x01d3
#define MX23_PAD_I2C_SCL__GPIO_0_30 0x01e3
#define MX23_PAD_I2C_SDA__GPIO_0_31 0x01f3
#define MX23_PAD_LCD_D00__GPIO_1_0 0x1003
#define MX23_PAD_LCD_D01__GPIO_1_1 0x1013
#define MX23_PAD_LCD_D02__GPIO_1_2 0x1023
#define MX23_PAD_LCD_D03__GPIO_1_3 0x1033
#define MX23_PAD_LCD_D04__GPIO_1_4 0x1043
#define MX23_PAD_LCD_D05__GPIO_1_5 0x1053
#define MX23_PAD_LCD_D06__GPIO_1_6 0x1063
#define MX23_PAD_LCD_D07__GPIO_1_7 0x1073
#define MX23_PAD_LCD_D08__GPIO_1_8 0x1083
#define MX23_PAD_LCD_D09__GPIO_1_9 0x1093
#define MX23_PAD_LCD_D10__GPIO_1_10 0x10a3
#define MX23_PAD_LCD_D11__GPIO_1_11 0x10b3
#define MX23_PAD_LCD_D12__GPIO_1_12 0x10c3
#define MX23_PAD_LCD_D13__GPIO_1_13 0x10d3
#define MX23_PAD_LCD_D14__GPIO_1_14 0x10e3
#define MX23_PAD_LCD_D15__GPIO_1_15 0x10f3
#define MX23_PAD_LCD_D16__GPIO_1_16 0x1103
#define MX23_PAD_LCD_D17__GPIO_1_17 0x1113
#define MX23_PAD_LCD_RESET__GPIO_1_18 0x1123
#define MX23_PAD_LCD_RS__GPIO_1_19 0x1133
#define MX23_PAD_LCD_WR__GPIO_1_20 0x1143
#define MX23_PAD_LCD_CS__GPIO_1_21 0x1153
#define MX23_PAD_LCD_DOTCK__GPIO_1_22 0x1163
#define MX23_PAD_LCD_ENABLE__GPIO_1_23 0x1173
#define MX23_PAD_LCD_HSYNC__GPIO_1_24 0x1183
#define MX23_PAD_LCD_VSYNC__GPIO_1_25 0x1193
#define MX23_PAD_PWM0__GPIO_1_26 0x11a3
#define MX23_PAD_PWM1__GPIO_1_27 0x11b3
#define MX23_PAD_PWM2__GPIO_1_28 0x11c3
#define MX23_PAD_PWM3__GPIO_1_29 0x11d3
#define MX23_PAD_PWM4__GPIO_1_30 0x11e3
#define MX23_PAD_SSP1_CMD__GPIO_2_0 0x2003
#define MX23_PAD_SSP1_DETECT__GPIO_2_1 0x2013
#define MX23_PAD_SSP1_DATA0__GPIO_2_2 0x2023
#define MX23_PAD_SSP1_DATA1__GPIO_2_3 0x2033
#define MX23_PAD_SSP1_DATA2__GPIO_2_4 0x2043
#define MX23_PAD_SSP1_DATA3__GPIO_2_5 0x2053
#define MX23_PAD_SSP1_SCK__GPIO_2_6 0x2063
#define MX23_PAD_ROTARYA__GPIO_2_7 0x2073
#define MX23_PAD_ROTARYB__GPIO_2_8 0x2083
#define MX23_PAD_EMI_A00__GPIO_2_9 0x2093
#define MX23_PAD_EMI_A01__GPIO_2_10 0x20a3
#define MX23_PAD_EMI_A02__GPIO_2_11 0x20b3
#define MX23_PAD_EMI_A03__GPIO_2_12 0x20c3
#define MX23_PAD_EMI_A04__GPIO_2_13 0x20d3
#define MX23_PAD_EMI_A05__GPIO_2_14 0x20e3
#define MX23_PAD_EMI_A06__GPIO_2_15 0x20f3
#define MX23_PAD_EMI_A07__GPIO_2_16 0x2103
#define MX23_PAD_EMI_A08__GPIO_2_17 0x2113
#define MX23_PAD_EMI_A09__GPIO_2_18 0x2123
#define MX23_PAD_EMI_A10__GPIO_2_19 0x2133
#define MX23_PAD_EMI_A11__GPIO_2_20 0x2143
#define MX23_PAD_EMI_A12__GPIO_2_21 0x2153
#define MX23_PAD_EMI_BA0__GPIO_2_22 0x2163
#define MX23_PAD_EMI_BA1__GPIO_2_23 0x2173
#define MX23_PAD_EMI_CASN__GPIO_2_24 0x2183
#define MX23_PAD_EMI_CE0N__GPIO_2_25 0x2193
#define MX23_PAD_EMI_CE1N__GPIO_2_26 0x21a3
#define MX23_PAD_GPMI_CE1N__GPIO_2_27 0x21b3
#define MX23_PAD_GPMI_CE0N__GPIO_2_28 0x21c3
#define MX23_PAD_EMI_CKE__GPIO_2_29 0x21d3
#define MX23_PAD_EMI_RASN__GPIO_2_30 0x21e3
#define MX23_PAD_EMI_WEN__GPIO_2_31 0x21f3
#endif /* __DT_BINDINGS_MX23_PINCTRL_H__ */

View File

@@ -10,7 +10,7 @@
*/ */
/dts-v1/; /dts-v1/;
/include/ "imx23.dtsi" #include "imx23.dtsi"
/ { / {
model = "Freescale STMP378x Development Board"; model = "Freescale STMP378x Development Board";
@@ -39,12 +39,12 @@
hog_pins_a: hog@0 { hog_pins_a: hog@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */ MX23_PAD_PWM3__GPIO_1_29
0x11e3 /* MX23_PAD_PWM4__GPIO_1_30 */ MX23_PAD_PWM4__GPIO_1_30
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };
}; };

View File

@@ -9,7 +9,8 @@
* http://www.gnu.org/copyleft/gpl.html * http://www.gnu.org/copyleft/gpl.html
*/ */
/include/ "skeleton.dtsi" #include "skeleton.dtsi"
#include "imx23-pinfunc.h"
/ { / {
interrupt-parent = <&icoll>; interrupt-parent = <&icoll>;
@@ -137,174 +138,174 @@
duart_pins_a: duart@0 { duart_pins_a: duart@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x11a2 /* MX23_PAD_PWM0__DUART_RX */ MX23_PAD_PWM0__DUART_RX
0x11b2 /* MX23_PAD_PWM1__DUART_TX */ MX23_PAD_PWM1__DUART_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart0_pins_a: auart0@0 { auart0_pins_a: auart0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */ MX23_PAD_AUART1_RX__AUART1_RX
0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */ MX23_PAD_AUART1_TX__AUART1_TX
0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */ MX23_PAD_AUART1_CTS__AUART1_CTS
0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */ MX23_PAD_AUART1_RTS__AUART1_RTS
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart0_2pins_a: auart0-2pins@0 { auart0_2pins_a: auart0-2pins@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */ MX23_PAD_I2C_SCL__AUART1_TX
0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */ MX23_PAD_I2C_SDA__AUART1_RX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
gpmi_pins_a: gpmi-nand@0 { gpmi_pins_a: gpmi-nand@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */ MX23_PAD_GPMI_D00__GPMI_D00
0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */ MX23_PAD_GPMI_D01__GPMI_D01
0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */ MX23_PAD_GPMI_D02__GPMI_D02
0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */ MX23_PAD_GPMI_D03__GPMI_D03
0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */ MX23_PAD_GPMI_D04__GPMI_D04
0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */ MX23_PAD_GPMI_D05__GPMI_D05
0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */ MX23_PAD_GPMI_D06__GPMI_D06
0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */ MX23_PAD_GPMI_D07__GPMI_D07
0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */ MX23_PAD_GPMI_CLE__GPMI_CLE
0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */ MX23_PAD_GPMI_ALE__GPMI_ALE
0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */ MX23_PAD_GPMI_RDY0__GPMI_RDY0
0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */ MX23_PAD_GPMI_RDY1__GPMI_RDY1
0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ MX23_PAD_GPMI_WPN__GPMI_WPN
0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ MX23_PAD_GPMI_WRN__GPMI_WRN
0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ MX23_PAD_GPMI_RDN__GPMI_RDN
0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */ MX23_PAD_GPMI_CE1N__GPMI_CE1N
0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */ MX23_PAD_GPMI_CE0N__GPMI_CE0N
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
gpmi_pins_fixup: gpmi-pins-fixup { gpmi_pins_fixup: gpmi-pins-fixup {
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ MX23_PAD_GPMI_WPN__GPMI_WPN
0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ MX23_PAD_GPMI_WRN__GPMI_WRN
0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ MX23_PAD_GPMI_RDN__GPMI_RDN
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
}; };
mmc0_4bit_pins_a: mmc0-4bit@0 { mmc0_4bit_pins_a: mmc0-4bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ MX23_PAD_SSP1_DATA0__SSP1_DATA0
0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ MX23_PAD_SSP1_DATA1__SSP1_DATA1
0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ MX23_PAD_SSP1_DATA2__SSP1_DATA2
0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ MX23_PAD_SSP1_DATA3__SSP1_DATA3
0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ MX23_PAD_SSP1_CMD__SSP1_CMD
0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ MX23_PAD_SSP1_SCK__SSP1_SCK
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mmc0_8bit_pins_a: mmc0-8bit@0 { mmc0_8bit_pins_a: mmc0-8bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ MX23_PAD_SSP1_DATA0__SSP1_DATA0
0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ MX23_PAD_SSP1_DATA1__SSP1_DATA1
0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ MX23_PAD_SSP1_DATA2__SSP1_DATA2
0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ MX23_PAD_SSP1_DATA3__SSP1_DATA3
0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */ MX23_PAD_GPMI_D08__SSP1_DATA4
0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */ MX23_PAD_GPMI_D09__SSP1_DATA5
0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */ MX23_PAD_GPMI_D10__SSP1_DATA6
0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */ MX23_PAD_GPMI_D11__SSP1_DATA7
0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ MX23_PAD_SSP1_CMD__SSP1_CMD
0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ MX23_PAD_SSP1_DETECT__SSP1_DETECT
0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ MX23_PAD_SSP1_SCK__SSP1_SCK
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mmc0_pins_fixup: mmc0-pins-fixup { mmc0_pins_fixup: mmc0-pins-fixup {
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ MX23_PAD_SSP1_DETECT__SSP1_DETECT
0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ MX23_PAD_SSP1_SCK__SSP1_SCK
>; >;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
pwm2_pins_a: pwm2@0 { pwm2_pins_a: pwm2@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x11c0 /* MX23_PAD_PWM2__PWM2 */ MX23_PAD_PWM2__PWM2
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_24bit_pins_a: lcdif-24bit@0 { lcdif_24bit_pins_a: lcdif-24bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */ MX23_PAD_LCD_D00__LCD_D00
0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */ MX23_PAD_LCD_D01__LCD_D01
0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */ MX23_PAD_LCD_D02__LCD_D02
0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */ MX23_PAD_LCD_D03__LCD_D03
0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */ MX23_PAD_LCD_D04__LCD_D04
0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */ MX23_PAD_LCD_D05__LCD_D05
0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */ MX23_PAD_LCD_D06__LCD_D06
0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */ MX23_PAD_LCD_D07__LCD_D07
0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */ MX23_PAD_LCD_D08__LCD_D08
0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */ MX23_PAD_LCD_D09__LCD_D09
0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */ MX23_PAD_LCD_D10__LCD_D10
0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */ MX23_PAD_LCD_D11__LCD_D11
0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */ MX23_PAD_LCD_D12__LCD_D12
0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */ MX23_PAD_LCD_D13__LCD_D13
0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */ MX23_PAD_LCD_D14__LCD_D14
0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */ MX23_PAD_LCD_D15__LCD_D15
0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */ MX23_PAD_LCD_D16__LCD_D16
0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */ MX23_PAD_LCD_D17__LCD_D17
0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */ MX23_PAD_GPMI_D08__LCD_D18
0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */ MX23_PAD_GPMI_D09__LCD_D19
0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */ MX23_PAD_GPMI_D10__LCD_D20
0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */ MX23_PAD_GPMI_D11__LCD_D21
0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */ MX23_PAD_GPMI_D12__LCD_D22
0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */ MX23_PAD_GPMI_D13__LCD_D23
0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */ MX23_PAD_LCD_DOTCK__LCD_DOTCK
0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */ MX23_PAD_LCD_ENABLE__LCD_ENABLE
0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */ MX23_PAD_LCD_HSYNC__LCD_HSYNC
0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */ MX23_PAD_LCD_VSYNC__LCD_VSYNC
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
spi2_pins_a: spi2@0 { spi2_pins_a: spi2@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */ MX23_PAD_GPMI_WRN__SSP2_SCK
0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */ MX23_PAD_GPMI_RDY1__SSP2_CMD
0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */ MX23_PAD_GPMI_D00__SSP2_DATA0
0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */ MX23_PAD_GPMI_D03__SSP2_DATA3
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
}; };

View File

@@ -16,6 +16,26 @@
model = "Armadeus Systems APF27Dev docking/development board"; model = "Armadeus Systems APF27Dev docking/development board";
compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27"; compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27";
display: display {
model = "Chimei-LW700AT9003";
native-mode = <&timing0>;
bits-per-pixel = <16>; /* non-standard but required */
fsl,pcr = <0xfae80083>; /* non-standard but required */
display-timings {
timing0: 640x480 {
clock-frequency = <33000033>;
hactive = <800>;
vactive = <640>;
hback-porch = <96>;
hfront-porch = <96>;
vback-porch = <20>;
vfront-porch = <21>;
hsync-len = <64>;
vsync-len = <4>;
};
};
};
gpio-keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
@@ -50,6 +70,12 @@
status = "okay"; status = "okay";
}; };
&fb {
display = <&display>;
fsl,dmacr = <0x00020010>;
status = "okay";
};
&i2c1 { &i2c1 {
clock-frequency = <400000>; clock-frequency = <400000>;
status = "okay"; status = "okay";

View File

@@ -123,6 +123,7 @@
}; };
pwm: pwm@10006000 { pwm: pwm@10006000 {
#pwm-cells = <2>;
compatible = "fsl,imx27-pwm"; compatible = "fsl,imx27-pwm";
reg = <0x10006000 0x1000>; reg = <0x10006000 0x1000>;
interrupts = <23>; interrupts = <23>;

View File

@@ -10,7 +10,7 @@
*/ */
/dts-v1/; /dts-v1/;
/include/ "imx28.dtsi" #include "imx28.dtsi"
/ { / {
model = "Armadeus Systems APF28 module"; model = "Armadeus Systems APF28 module";

View File

@@ -10,7 +10,7 @@
*/ */
/* APF28Dev is a docking board for the APF28 SOM */ /* APF28Dev is a docking board for the APF28 SOM */
/include/ "imx28-apf28.dts" #include "imx28-apf28.dts"
/ { / {
model = "Armadeus Systems APF28Dev docking/development board"; model = "Armadeus Systems APF28Dev docking/development board";
@@ -41,30 +41,30 @@
hog_pins_apf28dev: hog@0 { hog_pins_apf28dev: hog@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1103 /* MX28_PAD_LCD_D16__GPIO_1_16 */ MX28_PAD_LCD_D16__GPIO_1_16
0x1113 /* MX28_PAD_LCD_D17__GPIO_1_17 */ MX28_PAD_LCD_D17__GPIO_1_17
0x1123 /* MX28_PAD_LCD_D18__GPIO_1_18 */ MX28_PAD_LCD_D18__GPIO_1_18
0x1133 /* MX28_PAD_LCD_D19__GPIO_1_19 */ MX28_PAD_LCD_D19__GPIO_1_19
0x1143 /* MX28_PAD_LCD_D20__GPIO_1_20 */ MX28_PAD_LCD_D20__GPIO_1_20
0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */ MX28_PAD_LCD_D21__GPIO_1_21
0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ MX28_PAD_LCD_D22__GPIO_1_22
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_apf28dev: lcdif-apf28dev@0 { lcdif_pins_apf28dev: lcdif-apf28dev@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -1,5 +1,5 @@
/dts-v1/; /dts-v1/;
/include/ "imx28.dtsi" #include "imx28.dtsi"
/ { / {
model = "Bluegiga APX4 Development Kit"; model = "Bluegiga APX4 Development Kit";
@@ -40,53 +40,53 @@
hog_pins_a: hog@0 { hog_pins_a: hog@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */ MX28_PAD_GPMI_CE1N__GPIO_0_17
0x0153 /* MX28_PAD_GPMI_RDY1__GPIO_0_21 */ MX28_PAD_GPMI_RDY1__GPIO_0_21
0x2123 /* MX28_PAD_SSP2_MISO__GPIO_2_18 */ MX28_PAD_SSP2_MISO__GPIO_2_18
0x2131 /* MX28_PAD_SSP2_SS0__GPIO_2_19 */ MX28_PAD_SSP2_SS0__AUART3_TX /* was: 0x2131 - MX28_PAD_SSP2_SS0__GPIO_2_19 */
0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ MX28_PAD_PWM3__GPIO_3_28
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ MX28_PAD_LCD_RESET__GPIO_3_30
0x4143 /* MX28_PAD_JTAG_RTCK__GPIO_4_20 */ MX28_PAD_JTAG_RTCK__GPIO_4_20
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_apx4: lcdif-apx4@0 { lcdif_pins_apx4: lcdif-apx4@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
mmc2_4bit_pins_apx4: mmc2-4bit-apx4@0 { mmc2_4bit_pins_apx4: mmc2-4bit-apx4@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2041 /* MX28_PAD_SSP0_DATA4__SSP2_D0 */ MX28_PAD_SSP0_DATA4__SSP2_D0
0x2051 /* MX28_PAD_SSP0_DATA5__SSP2_D3 */ MX28_PAD_SSP0_DATA5__SSP2_D3
0x2061 /* MX28_PAD_SSP0_DATA6__SSP2_CMD */ MX28_PAD_SSP0_DATA6__SSP2_CMD
0x2071 /* MX28_PAD_SSP0_DATA7__SSP2_SCK */ MX28_PAD_SSP0_DATA7__SSP2_SCK
0x2141 /* MX28_PAD_SSP2_SS1__SSP2_D1 */ MX28_PAD_SSP2_SS1__SSP2_D1
0x2151 /* MX28_PAD_SSP2_SS2__SSP2_D2 */ MX28_PAD_SSP2_SS2__SSP2_D2
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mmc2_sck_cfg_apx4: mmc2-sck-cfg-apx4 { mmc2_sck_cfg_apx4: mmc2-sck-cfg-apx4 {
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2071 /* MX28_PAD_SSP0_DATA7__SSP2_SCK */ MX28_PAD_SSP0_DATA7__SSP2_SCK
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -10,7 +10,7 @@
*/ */
/dts-v1/; /dts-v1/;
/include/ "imx28.dtsi" #include "imx28.dtsi"
/ { / {
model = "Crystalfontz CFA-10036 Board"; model = "Crystalfontz CFA-10036 Board";
@@ -26,31 +26,31 @@
ssd1306_cfa10036: ssd1306-10036@0 { ssd1306_cfa10036: ssd1306-10036@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */ MX28_PAD_SSP0_DATA7__GPIO_2_7
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
led_pins_cfa10036: leds-10036@0 { led_pins_cfa10036: leds-10036@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3043 /* MX28_PAD_AUART1_RX__GPIO_3_4 */ MX28_PAD_AUART1_RX__GPIO_3_4
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
usb0_otg_cfa10036: otg-10036@0 { usb0_otg_cfa10036: otg-10036@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0142 /* MX28_PAD_GPMI_READY0__USB0_ID */ MX28_PAD_GPMI_RDY0__USB0_ID
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -13,7 +13,7 @@
* The CFA-10049 is an expansion board for the CFA-10036 module, thus we * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
* need to include the CFA-10036 DTS. * need to include the CFA-10036 DTS.
*/ */
/include/ "imx28-cfa10036.dts" #include "imx28-cfa10036.dts"
/ { / {
model = "Crystalfontz CFA-10037 Board"; model = "Crystalfontz CFA-10037 Board";
@@ -25,21 +25,21 @@
usb_pins_cfa10037: usb-10037@0 { usb_pins_cfa10037: usb-10037@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ MX28_PAD_GPMI_D07__GPIO_0_7
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
mac0_pins_cfa10037: mac0-10037@0 { mac0_pins_cfa10037: mac0-10037@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ MX28_PAD_SSP2_SS2__GPIO_2_21
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };
}; };

View File

@@ -13,7 +13,7 @@
* The CFA-10049 is an expansion board for the CFA-10036 module, thus we * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
* need to include the CFA-10036 DTS. * need to include the CFA-10036 DTS.
*/ */
/include/ "imx28-cfa10036.dts" #include "imx28-cfa10036.dts"
/ { / {
model = "Crystalfontz CFA-10049 Board"; model = "Crystalfontz CFA-10049 Board";
@@ -25,150 +25,150 @@
usb_pins_cfa10049: usb-10049@0 { usb_pins_cfa10049: usb-10049@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ MX28_PAD_GPMI_D07__GPIO_0_7
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
i2cmux_pins_cfa10049: i2cmux-10049@0 { i2cmux_pins_cfa10049: i2cmux-10049@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ MX28_PAD_LCD_D22__GPIO_1_22
0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */ MX28_PAD_LCD_D23__GPIO_1_23
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
mac0_pins_cfa10049: mac0-10049@0 { mac0_pins_cfa10049: mac0-10049@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ MX28_PAD_SSP2_SS2__GPIO_2_21
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
pca_pins_cfa10049: pca-10049@0 { pca_pins_cfa10049: pca-10049@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */ MX28_PAD_SSP2_SS0__GPIO_2_19
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
rotary_pins_cfa10049: rotary-10049@0 { rotary_pins_cfa10049: rotary-10049@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3183 /* MX28_PAD_I2C0_SCL__GPIO_3_24 */ MX28_PAD_I2C0_SCL__GPIO_3_24
0x3193 /* MX28_PAD_I2C0_SDA__GPIO_3_25 */ MX28_PAD_I2C0_SDA__GPIO_3_25
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
rotary_btn_pins_cfa10049: rotary-btn-10049@0 { rotary_btn_pins_cfa10049: rotary-btn-10049@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */ MX28_PAD_SAIF1_SDATA0__GPIO_3_26
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
spi2_pins_cfa10049: spi2-cfa10049@0 { spi2_pins_cfa10049: spi2-cfa10049@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */ MX28_PAD_SSP2_SCK__GPIO_2_16
0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */ MX28_PAD_SSP2_MOSI__GPIO_2_17
0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */ MX28_PAD_SSP2_MISO__GPIO_2_18
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ MX28_PAD_AUART1_TX__GPIO_3_5
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
spi3_pins_cfa10049: spi3-cfa10049@0 { spi3_pins_cfa10049: spi3-cfa10049@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0183 /* MX28_PAD_GPMI_RDN__GPIO_0_24 */ MX28_PAD_GPMI_RDN__GPIO_0_24
0x01c3 /* MX28_PAD_GPMI_RESETN__GPIO_0_28 */ MX28_PAD_GPMI_RESETN__GPIO_0_28
0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */ MX28_PAD_GPMI_CE1N__GPIO_0_17
0x01a3 /* MX28_PAD_GPMI_ALE__GPIO_0_26 */ MX28_PAD_GPMI_ALE__GPIO_0_26
0x01b3 /* MX28_PAD_GPMI_CLE__GPIO_0_27 */ MX28_PAD_GPMI_CLE__GPIO_0_27
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
lcdif_18bit_pins_cfa10049: lcdif-18bit@0 { lcdif_18bit_pins_cfa10049: lcdif-18bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ MX28_PAD_LCD_D00__LCD_D0
0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ MX28_PAD_LCD_D01__LCD_D1
0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ MX28_PAD_LCD_D02__LCD_D2
0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ MX28_PAD_LCD_D03__LCD_D3
0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ MX28_PAD_LCD_D04__LCD_D4
0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ MX28_PAD_LCD_D05__LCD_D5
0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ MX28_PAD_LCD_D06__LCD_D6
0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ MX28_PAD_LCD_D07__LCD_D7
0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ MX28_PAD_LCD_D08__LCD_D8
0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ MX28_PAD_LCD_D09__LCD_D9
0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ MX28_PAD_LCD_D10__LCD_D10
0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ MX28_PAD_LCD_D11__LCD_D11
0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ MX28_PAD_LCD_D12__LCD_D12
0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ MX28_PAD_LCD_D13__LCD_D13
0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ MX28_PAD_LCD_D14__LCD_D14
0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ MX28_PAD_LCD_D15__LCD_D15
0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ MX28_PAD_LCD_D16__LCD_D16
0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ MX28_PAD_LCD_D17__LCD_D17
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_cfa10049: lcdif-evk@0 { lcdif_pins_cfa10049: lcdif-evk@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_cfa10049_pullup: lcdif-10049-pullup@0 { lcdif_pins_cfa10049_pullup: lcdif-10049-pullup@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ MX28_PAD_LCD_RESET__GPIO_3_30
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
w1_gpio_pins: w1-gpio@0 { w1_gpio_pins: w1-gpio@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */ MX28_PAD_LCD_D21__GPIO_1_21
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; /* 0 will enable the keeper */ fsl,pull-up = <MXS_PULL_DISABLE>; /* 0 will enable the keeper */
}; };
}; };

View File

@@ -14,7 +14,7 @@
* The CFA-10055 is an expansion board for the CFA-10036 module and * The CFA-10055 is an expansion board for the CFA-10036 module and
* CFA-10037, thus we need to include the CFA-10037 DTS. * CFA-10037, thus we need to include the CFA-10037 DTS.
*/ */
/include/ "imx28-cfa10037.dts" #include "imx28-cfa10037.dts"
/ { / {
model = "Crystalfontz CFA-10055 Board"; model = "Crystalfontz CFA-10055 Board";
@@ -26,64 +26,64 @@
spi2_pins_cfa10055: spi2-cfa10055@0 { spi2_pins_cfa10055: spi2-cfa10055@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */ MX28_PAD_SSP2_SCK__GPIO_2_16
0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */ MX28_PAD_SSP2_MOSI__GPIO_2_17
0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */ MX28_PAD_SSP2_MISO__GPIO_2_18
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ MX28_PAD_AUART1_TX__GPIO_3_5
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
lcdif_18bit_pins_cfa10055: lcdif-18bit@0 { lcdif_18bit_pins_cfa10055: lcdif-18bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ MX28_PAD_LCD_D00__LCD_D0
0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ MX28_PAD_LCD_D01__LCD_D1
0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ MX28_PAD_LCD_D02__LCD_D2
0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ MX28_PAD_LCD_D03__LCD_D3
0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ MX28_PAD_LCD_D04__LCD_D4
0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ MX28_PAD_LCD_D05__LCD_D5
0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ MX28_PAD_LCD_D06__LCD_D6
0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ MX28_PAD_LCD_D07__LCD_D7
0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ MX28_PAD_LCD_D08__LCD_D8
0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ MX28_PAD_LCD_D09__LCD_D9
0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ MX28_PAD_LCD_D10__LCD_D10
0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ MX28_PAD_LCD_D11__LCD_D11
0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ MX28_PAD_LCD_D12__LCD_D12
0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ MX28_PAD_LCD_D13__LCD_D13
0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ MX28_PAD_LCD_D14__LCD_D14
0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ MX28_PAD_LCD_D15__LCD_D15
0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ MX28_PAD_LCD_D16__LCD_D16
0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ MX28_PAD_LCD_D17__LCD_D17
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_cfa10055: lcdif-evk@0 { lcdif_pins_cfa10055: lcdif-evk@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_cfa10055_pullup: lcdif-10055-pullup@0 { lcdif_pins_cfa10055_pullup: lcdif-10055-pullup@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ MX28_PAD_LCD_RESET__GPIO_3_30
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
}; };

View File

@@ -13,7 +13,7 @@
* The CFA-10055 is an expansion board for the CFA-10036 module and * The CFA-10055 is an expansion board for the CFA-10036 module and
* CFA-10037, thus we need to include the CFA-10037 DTS. * CFA-10037, thus we need to include the CFA-10037 DTS.
*/ */
/include/ "imx28-cfa10037.dts" #include "imx28-cfa10037.dts"
/ { / {
model = "Crystalfontz CFA-10056 Board"; model = "Crystalfontz CFA-10056 Board";
@@ -25,37 +25,37 @@
spi2_pins_cfa10056: spi2-cfa10056@0 { spi2_pins_cfa10056: spi2-cfa10056@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */ MX28_PAD_SSP2_SCK__GPIO_2_16
0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */ MX28_PAD_SSP2_MOSI__GPIO_2_17
0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */ MX28_PAD_SSP2_MISO__GPIO_2_18
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ MX28_PAD_AUART1_TX__GPIO_3_5
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
lcdif_pins_cfa10056: lcdif-10056@0 { lcdif_pins_cfa10056: lcdif-10056@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 { lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ MX28_PAD_LCD_RESET__GPIO_3_30
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
}; };

View File

@@ -14,7 +14,7 @@
* The CFA-10057 is an expansion board for the CFA-10036 module, thus we * The CFA-10057 is an expansion board for the CFA-10036 module, thus we
* need to include the CFA-10036 DTS. * need to include the CFA-10036 DTS.
*/ */
/include/ "imx28-cfa10036.dts" #include "imx28-cfa10036.dts"
/ { / {
model = "Crystalfontz CFA-10057 Board"; model = "Crystalfontz CFA-10057 Board";
@@ -26,51 +26,51 @@
usb_pins_cfa10057: usb-10057@0 { usb_pins_cfa10057: usb-10057@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ MX28_PAD_GPMI_D07__GPIO_0_7
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_18bit_pins_cfa10057: lcdif-18bit@0 { lcdif_18bit_pins_cfa10057: lcdif-18bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ MX28_PAD_LCD_D00__LCD_D0
0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ MX28_PAD_LCD_D01__LCD_D1
0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ MX28_PAD_LCD_D02__LCD_D2
0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ MX28_PAD_LCD_D03__LCD_D3
0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ MX28_PAD_LCD_D04__LCD_D4
0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ MX28_PAD_LCD_D05__LCD_D5
0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ MX28_PAD_LCD_D06__LCD_D6
0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ MX28_PAD_LCD_D07__LCD_D7
0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ MX28_PAD_LCD_D08__LCD_D8
0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ MX28_PAD_LCD_D09__LCD_D9
0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ MX28_PAD_LCD_D10__LCD_D10
0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ MX28_PAD_LCD_D11__LCD_D11
0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ MX28_PAD_LCD_D12__LCD_D12
0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ MX28_PAD_LCD_D13__LCD_D13
0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ MX28_PAD_LCD_D14__LCD_D14
0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ MX28_PAD_LCD_D15__LCD_D15
0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ MX28_PAD_LCD_D16__LCD_D16
0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ MX28_PAD_LCD_D17__LCD_D17
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_cfa10057: lcdif-evk@0 { lcdif_pins_cfa10057: lcdif-evk@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -14,7 +14,7 @@
* The CFA-10058 is an expansion board for the CFA-10036 module, thus we * The CFA-10058 is an expansion board for the CFA-10036 module, thus we
* need to include the CFA-10036 DTS. * need to include the CFA-10036 DTS.
*/ */
/include/ "imx28-cfa10036.dts" #include "imx28-cfa10036.dts"
/ { / {
model = "Crystalfontz CFA-10058 Board"; model = "Crystalfontz CFA-10058 Board";
@@ -26,24 +26,24 @@
usb_pins_cfa10058: usb-10058@0 { usb_pins_cfa10058: usb-10058@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ MX28_PAD_GPMI_D07__GPIO_0_7
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_cfa10058: lcdif-10058@0 { lcdif_pins_cfa10058: lcdif-10058@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -10,7 +10,7 @@
*/ */
/dts-v1/; /dts-v1/;
/include/ "imx28.dtsi" #include "imx28.dtsi"
/ { / {
model = "Freescale i.MX28 Evaluation Kit"; model = "Freescale i.MX28 Evaluation Kit";
@@ -70,52 +70,52 @@
hog_pins_a: hog@0 { hog_pins_a: hog@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x20d3 /* MX28_PAD_SSP1_CMD__GPIO_2_13 */ MX28_PAD_SSP1_CMD__GPIO_2_13
0x20f3 /* MX28_PAD_SSP1_DATA3__GPIO_2_15 */ MX28_PAD_SSP1_DATA3__GPIO_2_15
0x40d3 /* MX28_PAD_ENET0_RX_CLK__GPIO_4_13 */ MX28_PAD_ENET0_RX_CLK__GPIO_4_13
0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */ MX28_PAD_SSP1_SCK__GPIO_2_12
0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ MX28_PAD_PWM3__GPIO_3_28
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ MX28_PAD_LCD_RESET__GPIO_3_30
0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */ MX28_PAD_AUART2_RX__GPIO_3_8
0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */ MX28_PAD_AUART2_TX__GPIO_3_9
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
led_pin_gpio3_5: led_gpio3_5@0 { led_pin_gpio3_5: led_gpio3_5@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ MX28_PAD_AUART1_TX__GPIO_3_5
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
gpmi_pins_evk: gpmi-nand-evk@0 { gpmi_pins_evk: gpmi-nand-evk@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0110 /* MX28_PAD_GPMI_CE1N__GPMI_CE1N */ MX28_PAD_GPMI_CE1N__GPMI_CE1N
0x0150 /* MX28_PAD_GPMI_RDY1__GPMI_READY1 */ MX28_PAD_GPMI_RDY1__GPMI_READY1
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_evk: lcdif-evk@0 { lcdif_pins_evk: lcdif-evk@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };
@@ -182,6 +182,7 @@
}; };
lradc@80050000 { lradc@80050000 {
fsl,lradc-touchscreen-wires = <4>;
status = "okay"; status = "okay";
fsl,lradc-touchscreen-wires = <4>; fsl,lradc-touchscreen-wires = <4>;
fsl,ave-ctrl = <4>; fsl,ave-ctrl = <4>;
@@ -246,6 +247,8 @@
ahb@80080000 { ahb@80080000 {
usb0: usb@80080000 { usb0: usb@80080000 {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_pins_a>;
vbus-supply = <&reg_usb0_vbus>; vbus-supply = <&reg_usb0_vbus>;
status = "okay"; status = "okay";
}; };

View File

@@ -0,0 +1,266 @@
/*
* Copyright (C) 2013 Marek Vasut <marex@denx.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx28.dtsi"
/ {
model = "MSR M28CU3";
compatible = "msr,m28cu3", "fsl,imx28";
memory {
reg = <0x40000000 0x08000000>;
};
apb@80000000 {
apbh@80000000 {
gpmi-nand@8000c000 {
#address-cells = <1>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
status = "okay";
partition@0 {
label = "gpmi-nfc-0-boot";
reg = <0x00000000 0x01400000>;
read-only;
};
partition@1 {
label = "gpmi-nfc-general-use";
reg = <0x01400000 0x0ec00000>;
};
};
ssp0: ssp@80010000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_4bit_pins_a
&mmc0_cd_cfg
&mmc0_sck_cfg>;
bus-width = <4>;
vmmc-supply = <&reg_vddio_sd0>;
status = "okay";
};
ssp2: ssp@80014000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc2_4bit_pins_a
&mmc2_cd_cfg
&mmc2_sck_cfg>;
bus-width = <4>;
vmmc-supply = <&reg_vddio_sd1>;
status = "okay";
};
pinctrl@80018000 {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_a>;
hog_pins_a: hog@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SSP2_SS0__GPIO_2_19
MX28_PAD_PWM4__GPIO_3_29
MX28_PAD_AUART2_RX__GPIO_3_8
MX28_PAD_ENET0_RX_CLK__GPIO_4_13
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
lcdif_pins_m28: lcdif-m28@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_LCD_VSYNC__LCD_VSYNC
MX28_PAD_LCD_HSYNC__LCD_HSYNC
MX28_PAD_LCD_DOTCLK__LCD_DOTCLK
MX28_PAD_LCD_RESET__LCD_RESET
MX28_PAD_LCD_CS__LCD_ENABLE
MX28_PAD_AUART1_TX__GPIO_3_5
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
led_pins_gpio: leds-m28@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SSP3_MISO__GPIO_2_26
MX28_PAD_SSP3_SCK__GPIO_2_24
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};
ocotp@8002c000 {
status = "okay";
};
lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_m28>;
display = <&display>;
reset-active-high;
status = "okay";
display: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <6410256>;
hactive = <320>;
vactive = <240>;
hback-porch = <38>;
hfront-porch = <20>;
vback-porch = <15>;
vfront-porch = <5>;
hsync-len = <30>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
};
};
apbx@80040000 {
duart: serial@80074000 {
pinctrl-names = "default";
pinctrl-0 = <&duart_pins_b>;
status = "okay";
};
usbphy1: usbphy@8007e000 {
status = "okay";
};
auart0: serial@8006a000 {
pinctrl-names = "default";
pinctrl-0 = <&auart0_2pins_a>;
status = "okay";
};
auart3: serial@80070000 {
pinctrl-names = "default";
pinctrl-0 = <&auart3_2pins_b>;
status = "okay";
};
pwm: pwm@80064000 {
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pins_a>;
status = "okay";
};
};
};
ahb@80080000 {
usb1: usb@80090000 {
vbus-supply = <&reg_usb1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&usbphy1_pins_a>;
disable-over-current;
status = "okay";
};
mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>;
phy-reset-gpios = <&gpio4 13 0>;
phy-reset-duration = <100>;
status = "okay";
};
mac1: ethernet@800f4000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac1_pins_a>;
status = "okay";
};
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm 3 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins_gpio>;
user1 {
label = "sd0-led";
gpios = <&gpio2 26 0>;
linux,default-trigger = "mmc0";
};
user2 {
label = "sd1-led";
gpios = <&gpio2 24 0>;
linux,default-trigger = "mmc2";
};
};
regulators {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vddio_sd0: vddio-sd0 {
compatible = "regulator-fixed";
regulator-name = "vddio-sd0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 29 0>;
};
reg_vddio_sd1: vddio-sd1 {
compatible = "regulator-fixed";
regulator-name = "vddio-sd1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 19 0>;
};
reg_usb1_vbus: usb1_vbus {
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 8 0>;
enable-active-high;
};
};
};

View File

@@ -10,7 +10,7 @@
*/ */
/dts-v1/; /dts-v1/;
/include/ "imx28.dtsi" #include "imx28.dtsi"
/ { / {
model = "DENX M28EVK"; model = "DENX M28EVK";
@@ -92,26 +92,26 @@
hog_pins_a: hog@0 { hog_pins_a: hog@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ MX28_PAD_PWM3__GPIO_3_28
0x30a3 /* MX28_PAD_AUART2_CTS__GPIO_3_10 */ MX28_PAD_AUART2_CTS__GPIO_3_10
0x30b3 /* MX28_PAD_AUART2_RTS__GPIO_3_11 */ MX28_PAD_AUART2_RTS__GPIO_3_11
0x30c3 /* MX28_PAD_AUART3_RX__GPIO_3_12 */ MX28_PAD_AUART3_RX__GPIO_3_12
0x30d3 /* MX28_PAD_AUART3_TX__GPIO_3_13 */ MX28_PAD_AUART3_TX__GPIO_3_13
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_pins_m28: lcdif-m28@0 { lcdif_pins_m28: lcdif-m28@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x11e0 /* MX28_PAD_LCD_DOTCLK__LCD_DOTCLK */ MX28_PAD_LCD_DOTCLK__LCD_DOTCLK
0x11f0 /* MX28_PAD_LCD_ENABLE__LCD_ENABLE */ MX28_PAD_LCD_ENABLE__LCD_ENABLE
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -0,0 +1,506 @@
/*
* Header providing constants for i.MX28 pinctrl bindings.
*
* Copyright (C) 2013 Lothar Waßmann <LW@KARO-electronics.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#ifndef __DT_BINDINGS_MX28_PINCTRL_H__
#define __DT_BINDINGS_MX28_PINCTRL_H__
#include "mxs-pinfunc.h"
#define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
#define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
#define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
#define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
#define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
#define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
#define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
#define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
#define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
#define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
#define MX28_PAD_GPMI_CE2N__GPMI_CE2N 0x0120
#define MX28_PAD_GPMI_CE3N__GPMI_CE3N 0x0130
#define MX28_PAD_GPMI_RDY0__GPMI_READY0 0x0140
#define MX28_PAD_GPMI_RDY1__GPMI_READY1 0x0150
#define MX28_PAD_GPMI_RDY2__GPMI_READY2 0x0160
#define MX28_PAD_GPMI_RDY3__GPMI_READY3 0x0170
#define MX28_PAD_GPMI_RDN__GPMI_RDN 0x0180
#define MX28_PAD_GPMI_WRN__GPMI_WRN 0x0190
#define MX28_PAD_GPMI_ALE__GPMI_ALE 0x01a0
#define MX28_PAD_GPMI_CLE__GPMI_CLE 0x01b0
#define MX28_PAD_GPMI_RESETN__GPMI_RESETN 0x01c0
#define MX28_PAD_LCD_D00__LCD_D0 0x1000
#define MX28_PAD_LCD_D01__LCD_D1 0x1010
#define MX28_PAD_LCD_D02__LCD_D2 0x1020
#define MX28_PAD_LCD_D03__LCD_D3 0x1030
#define MX28_PAD_LCD_D04__LCD_D4 0x1040
#define MX28_PAD_LCD_D05__LCD_D5 0x1050
#define MX28_PAD_LCD_D06__LCD_D6 0x1060
#define MX28_PAD_LCD_D07__LCD_D7 0x1070
#define MX28_PAD_LCD_D08__LCD_D8 0x1080
#define MX28_PAD_LCD_D09__LCD_D9 0x1090
#define MX28_PAD_LCD_D10__LCD_D10 0x10a0
#define MX28_PAD_LCD_D11__LCD_D11 0x10b0
#define MX28_PAD_LCD_D12__LCD_D12 0x10c0
#define MX28_PAD_LCD_D13__LCD_D13 0x10d0
#define MX28_PAD_LCD_D14__LCD_D14 0x10e0
#define MX28_PAD_LCD_D15__LCD_D15 0x10f0
#define MX28_PAD_LCD_D16__LCD_D16 0x1100
#define MX28_PAD_LCD_D17__LCD_D17 0x1110
#define MX28_PAD_LCD_D18__LCD_D18 0x1120
#define MX28_PAD_LCD_D19__LCD_D19 0x1130
#define MX28_PAD_LCD_D20__LCD_D20 0x1140
#define MX28_PAD_LCD_D21__LCD_D21 0x1150
#define MX28_PAD_LCD_D22__LCD_D22 0x1160
#define MX28_PAD_LCD_D23__LCD_D23 0x1170
#define MX28_PAD_LCD_RD_E__LCD_RD_E 0x1180
#define MX28_PAD_LCD_WR_RWN__LCD_WR_RWN 0x1190
#define MX28_PAD_LCD_RS__LCD_RS 0x11a0
#define MX28_PAD_LCD_CS__LCD_CS 0x11b0
#define MX28_PAD_LCD_VSYNC__LCD_VSYNC 0x11c0
#define MX28_PAD_LCD_HSYNC__LCD_HSYNC 0x11d0
#define MX28_PAD_LCD_DOTCLK__LCD_DOTCLK 0x11e0
#define MX28_PAD_LCD_ENABLE__LCD_ENABLE 0x11f0
#define MX28_PAD_SSP0_DATA0__SSP0_D0 0x2000
#define MX28_PAD_SSP0_DATA1__SSP0_D1 0x2010
#define MX28_PAD_SSP0_DATA2__SSP0_D2 0x2020
#define MX28_PAD_SSP0_DATA3__SSP0_D3 0x2030
#define MX28_PAD_SSP0_DATA4__SSP0_D4 0x2040
#define MX28_PAD_SSP0_DATA5__SSP0_D5 0x2050
#define MX28_PAD_SSP0_DATA6__SSP0_D6 0x2060
#define MX28_PAD_SSP0_DATA7__SSP0_D7 0x2070
#define MX28_PAD_SSP0_CMD__SSP0_CMD 0x2080
#define MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT 0x2090
#define MX28_PAD_SSP0_SCK__SSP0_SCK 0x20a0
#define MX28_PAD_SSP1_SCK__SSP1_SCK 0x20c0
#define MX28_PAD_SSP1_CMD__SSP1_CMD 0x20d0
#define MX28_PAD_SSP1_DATA0__SSP1_D0 0x20e0
#define MX28_PAD_SSP1_DATA3__SSP1_D3 0x20f0
#define MX28_PAD_SSP2_SCK__SSP2_SCK 0x2100
#define MX28_PAD_SSP2_MOSI__SSP2_CMD 0x2110
#define MX28_PAD_SSP2_MISO__SSP2_D0 0x2120
#define MX28_PAD_SSP2_SS0__SSP2_D3 0x2130
#define MX28_PAD_SSP2_SS1__SSP2_D4 0x2140
#define MX28_PAD_SSP2_SS2__SSP2_D5 0x2150
#define MX28_PAD_SSP3_SCK__SSP3_SCK 0x2180
#define MX28_PAD_SSP3_MOSI__SSP3_CMD 0x2190
#define MX28_PAD_SSP3_MISO__SSP3_D0 0x21a0
#define MX28_PAD_SSP3_SS0__SSP3_D3 0x21b0
#define MX28_PAD_AUART0_RX__AUART0_RX 0x3000
#define MX28_PAD_AUART0_TX__AUART0_TX 0x3010
#define MX28_PAD_AUART0_CTS__AUART0_CTS 0x3020
#define MX28_PAD_AUART0_RTS__AUART0_RTS 0x3030
#define MX28_PAD_AUART1_RX__AUART1_RX 0x3040
#define MX28_PAD_AUART1_TX__AUART1_TX 0x3050
#define MX28_PAD_AUART1_CTS__AUART1_CTS 0x3060
#define MX28_PAD_AUART1_RTS__AUART1_RTS 0x3070
#define MX28_PAD_AUART2_RX__AUART2_RX 0x3080
#define MX28_PAD_AUART2_TX__AUART2_TX 0x3090
#define MX28_PAD_AUART2_CTS__AUART2_CTS 0x30a0
#define MX28_PAD_AUART2_RTS__AUART2_RTS 0x30b0
#define MX28_PAD_AUART3_RX__AUART3_RX 0x30c0
#define MX28_PAD_AUART3_TX__AUART3_TX 0x30d0
#define MX28_PAD_AUART3_CTS__AUART3_CTS 0x30e0
#define MX28_PAD_AUART3_RTS__AUART3_RTS 0x30f0
#define MX28_PAD_PWM0__PWM_0 0x3100
#define MX28_PAD_PWM1__PWM_1 0x3110
#define MX28_PAD_PWM2__PWM_2 0x3120
#define MX28_PAD_SAIF0_MCLK__SAIF0_MCLK 0x3140
#define MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK 0x3150
#define MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK 0x3160
#define MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 0x3170
#define MX28_PAD_I2C0_SCL__I2C0_SCL 0x3180
#define MX28_PAD_I2C0_SDA__I2C0_SDA 0x3190
#define MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 0x31a0
#define MX28_PAD_SPDIF__SPDIF_TX 0x31b0
#define MX28_PAD_PWM3__PWM_3 0x31c0
#define MX28_PAD_PWM4__PWM_4 0x31d0
#define MX28_PAD_LCD_RESET__LCD_RESET 0x31e0
#define MX28_PAD_ENET0_MDC__ENET0_MDC 0x4000
#define MX28_PAD_ENET0_MDIO__ENET0_MDIO 0x4010
#define MX28_PAD_ENET0_RX_EN__ENET0_RX_EN 0x4020
#define MX28_PAD_ENET0_RXD0__ENET0_RXD0 0x4030
#define MX28_PAD_ENET0_RXD1__ENET0_RXD1 0x4040
#define MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK 0x4050
#define MX28_PAD_ENET0_TX_EN__ENET0_TX_EN 0x4060
#define MX28_PAD_ENET0_TXD0__ENET0_TXD0 0x4070
#define MX28_PAD_ENET0_TXD1__ENET0_TXD1 0x4080
#define MX28_PAD_ENET0_RXD2__ENET0_RXD2 0x4090
#define MX28_PAD_ENET0_RXD3__ENET0_RXD3 0x40a0
#define MX28_PAD_ENET0_TXD2__ENET0_TXD2 0x40b0
#define MX28_PAD_ENET0_TXD3__ENET0_TXD3 0x40c0
#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK 0x40d0
#define MX28_PAD_ENET0_COL__ENET0_COL 0x40e0
#define MX28_PAD_ENET0_CRS__ENET0_CRS 0x40f0
#define MX28_PAD_ENET_CLK__CLKCTRL_ENET 0x4100
#define MX28_PAD_JTAG_RTCK__JTAG_RTCK 0x4140
#define MX28_PAD_EMI_D00__EMI_DATA0 0x5000
#define MX28_PAD_EMI_D01__EMI_DATA1 0x5010
#define MX28_PAD_EMI_D02__EMI_DATA2 0x5020
#define MX28_PAD_EMI_D03__EMI_DATA3 0x5030
#define MX28_PAD_EMI_D04__EMI_DATA4 0x5040
#define MX28_PAD_EMI_D05__EMI_DATA5 0x5050
#define MX28_PAD_EMI_D06__EMI_DATA6 0x5060
#define MX28_PAD_EMI_D07__EMI_DATA7 0x5070
#define MX28_PAD_EMI_D08__EMI_DATA8 0x5080
#define MX28_PAD_EMI_D09__EMI_DATA9 0x5090
#define MX28_PAD_EMI_D10__EMI_DATA10 0x50a0
#define MX28_PAD_EMI_D11__EMI_DATA11 0x50b0
#define MX28_PAD_EMI_D12__EMI_DATA12 0x50c0
#define MX28_PAD_EMI_D13__EMI_DATA13 0x50d0
#define MX28_PAD_EMI_D14__EMI_DATA14 0x50e0
#define MX28_PAD_EMI_D15__EMI_DATA15 0x50f0
#define MX28_PAD_EMI_ODT0__EMI_ODT0 0x5100
#define MX28_PAD_EMI_DQM0__EMI_DQM0 0x5110
#define MX28_PAD_EMI_ODT1__EMI_ODT1 0x5120
#define MX28_PAD_EMI_DQM1__EMI_DQM1 0x5130
#define MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK 0x5140
#define MX28_PAD_EMI_CLK__EMI_CLK 0x5150
#define MX28_PAD_EMI_DQS0__EMI_DQS0 0x5160
#define MX28_PAD_EMI_DQS1__EMI_DQS1 0x5170
#define MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN 0x51a0
#define MX28_PAD_EMI_A00__EMI_ADDR0 0x6000
#define MX28_PAD_EMI_A01__EMI_ADDR1 0x6010
#define MX28_PAD_EMI_A02__EMI_ADDR2 0x6020
#define MX28_PAD_EMI_A03__EMI_ADDR3 0x6030
#define MX28_PAD_EMI_A04__EMI_ADDR4 0x6040
#define MX28_PAD_EMI_A05__EMI_ADDR5 0x6050
#define MX28_PAD_EMI_A06__EMI_ADDR6 0x6060
#define MX28_PAD_EMI_A07__EMI_ADDR7 0x6070
#define MX28_PAD_EMI_A08__EMI_ADDR8 0x6080
#define MX28_PAD_EMI_A09__EMI_ADDR9 0x6090
#define MX28_PAD_EMI_A10__EMI_ADDR10 0x60a0
#define MX28_PAD_EMI_A11__EMI_ADDR11 0x60b0
#define MX28_PAD_EMI_A12__EMI_ADDR12 0x60c0
#define MX28_PAD_EMI_A13__EMI_ADDR13 0x60d0
#define MX28_PAD_EMI_A14__EMI_ADDR14 0x60e0
#define MX28_PAD_EMI_BA0__EMI_BA0 0x6100
#define MX28_PAD_EMI_BA1__EMI_BA1 0x6110
#define MX28_PAD_EMI_BA2__EMI_BA2 0x6120
#define MX28_PAD_EMI_CASN__EMI_CASN 0x6130
#define MX28_PAD_EMI_RASN__EMI_RASN 0x6140
#define MX28_PAD_EMI_WEN__EMI_WEN 0x6150
#define MX28_PAD_EMI_CE0N__EMI_CE0N 0x6160
#define MX28_PAD_EMI_CE1N__EMI_CE1N 0x6170
#define MX28_PAD_EMI_CKE__EMI_CKE 0x6180
#define MX28_PAD_GPMI_D00__SSP1_D0 0x0001
#define MX28_PAD_GPMI_D01__SSP1_D1 0x0011
#define MX28_PAD_GPMI_D02__SSP1_D2 0x0021
#define MX28_PAD_GPMI_D03__SSP1_D3 0x0031
#define MX28_PAD_GPMI_D04__SSP1_D4 0x0041
#define MX28_PAD_GPMI_D05__SSP1_D5 0x0051
#define MX28_PAD_GPMI_D06__SSP1_D6 0x0061
#define MX28_PAD_GPMI_D07__SSP1_D7 0x0071
#define MX28_PAD_GPMI_CE0N__SSP3_D0 0x0101
#define MX28_PAD_GPMI_CE1N__SSP3_D3 0x0111
#define MX28_PAD_GPMI_CE2N__CAN1_TX 0x0121
#define MX28_PAD_GPMI_CE3N__CAN1_RX 0x0131
#define MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT 0x0141
#define MX28_PAD_GPMI_RDY1__SSP1_CMD 0x0151
#define MX28_PAD_GPMI_RDY2__CAN0_TX 0x0161
#define MX28_PAD_GPMI_RDY3__CAN0_RX 0x0171
#define MX28_PAD_GPMI_RDN__SSP3_SCK 0x0181
#define MX28_PAD_GPMI_WRN__SSP1_SCK 0x0191
#define MX28_PAD_GPMI_ALE__SSP3_D1 0x01a1
#define MX28_PAD_GPMI_CLE__SSP3_D2 0x01b1
#define MX28_PAD_GPMI_RESETN__SSP3_CMD 0x01c1
#define MX28_PAD_LCD_D03__ETM_DA8 0x1031
#define MX28_PAD_LCD_D04__ETM_DA9 0x1041
#define MX28_PAD_LCD_D08__ETM_DA3 0x1081
#define MX28_PAD_LCD_D09__ETM_DA4 0x1091
#define MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT 0x1141
#define MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN 0x1151
#define MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT 0x1161
#define MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN 0x1171
#define MX28_PAD_LCD_RD_E__LCD_VSYNC 0x1181
#define MX28_PAD_LCD_WR_RWN__LCD_HSYNC 0x1191
#define MX28_PAD_LCD_RS__LCD_DOTCLK 0x11a1
#define MX28_PAD_LCD_CS__LCD_ENABLE 0x11b1
#define MX28_PAD_LCD_VSYNC__SAIF1_SDATA0 0x11c1
#define MX28_PAD_LCD_HSYNC__SAIF1_SDATA1 0x11d1
#define MX28_PAD_LCD_DOTCLK__SAIF1_MCLK 0x11e1
#define MX28_PAD_SSP0_DATA4__SSP2_D0 0x2041
#define MX28_PAD_SSP0_DATA5__SSP2_D3 0x2051
#define MX28_PAD_SSP0_DATA6__SSP2_CMD 0x2061
#define MX28_PAD_SSP0_DATA7__SSP2_SCK 0x2071
#define MX28_PAD_SSP1_SCK__SSP2_D1 0x20c1
#define MX28_PAD_SSP1_CMD__SSP2_D2 0x20d1
#define MX28_PAD_SSP1_DATA0__SSP2_D6 0x20e1
#define MX28_PAD_SSP1_DATA3__SSP2_D7 0x20f1
#define MX28_PAD_SSP2_SCK__AUART2_RX 0x2101
#define MX28_PAD_SSP2_MOSI__AUART2_TX 0x2111
#define MX28_PAD_SSP2_MISO__AUART3_RX 0x2121
#define MX28_PAD_SSP2_SS0__AUART3_TX 0x2131
#define MX28_PAD_SSP2_SS1__SSP2_D1 0x2141
#define MX28_PAD_SSP2_SS2__SSP2_D2 0x2151
#define MX28_PAD_SSP3_SCK__AUART4_TX 0x2181
#define MX28_PAD_SSP3_MOSI__AUART4_RX 0x2191
#define MX28_PAD_SSP3_MISO__AUART4_RTS 0x21a1
#define MX28_PAD_SSP3_SS0__AUART4_CTS 0x21b1
#define MX28_PAD_AUART0_RX__I2C0_SCL 0x3001
#define MX28_PAD_AUART0_TX__I2C0_SDA 0x3011
#define MX28_PAD_AUART0_CTS__AUART4_RX 0x3021
#define MX28_PAD_AUART0_RTS__AUART4_TX 0x3031
#define MX28_PAD_AUART1_RX__SSP2_CARD_DETECT 0x3041
#define MX28_PAD_AUART1_TX__SSP3_CARD_DETECT 0x3051
#define MX28_PAD_AUART1_CTS__USB0_OVERCURRENT 0x3061
#define MX28_PAD_AUART1_RTS__USB0_ID 0x3071
#define MX28_PAD_AUART2_RX__SSP3_D1 0x3081
#define MX28_PAD_AUART2_TX__SSP3_D2 0x3091
#define MX28_PAD_AUART2_CTS__I2C1_SCL 0x30a1
#define MX28_PAD_AUART2_RTS__I2C1_SDA 0x30b1
#define MX28_PAD_AUART3_RX__CAN0_TX 0x30c1
#define MX28_PAD_AUART3_TX__CAN0_RX 0x30d1
#define MX28_PAD_AUART3_CTS__CAN1_TX 0x30e1
#define MX28_PAD_AUART3_RTS__CAN1_RX 0x30f1
#define MX28_PAD_PWM0__I2C1_SCL 0x3101
#define MX28_PAD_PWM1__I2C1_SDA 0x3111
#define MX28_PAD_PWM2__USB0_ID 0x3121
#define MX28_PAD_SAIF0_MCLK__PWM_3 0x3141
#define MX28_PAD_SAIF0_LRCLK__PWM_4 0x3151
#define MX28_PAD_SAIF0_BITCLK__PWM_5 0x3161
#define MX28_PAD_SAIF0_SDATA0__PWM_6 0x3171
#define MX28_PAD_I2C0_SCL__TIMROT_ROTARYA 0x3181
#define MX28_PAD_I2C0_SDA__TIMROT_ROTARYB 0x3191
#define MX28_PAD_SAIF1_SDATA0__PWM_7 0x31a1
#define MX28_PAD_LCD_RESET__LCD_VSYNC 0x31e1
#define MX28_PAD_ENET0_MDC__GPMI_CE4N 0x4001
#define MX28_PAD_ENET0_MDIO__GPMI_CE5N 0x4011
#define MX28_PAD_ENET0_RX_EN__GPMI_CE6N 0x4021
#define MX28_PAD_ENET0_RXD0__GPMI_CE7N 0x4031
#define MX28_PAD_ENET0_RXD1__GPMI_READY4 0x4041
#define MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER 0x4051
#define MX28_PAD_ENET0_TX_EN__GPMI_READY5 0x4061
#define MX28_PAD_ENET0_TXD0__GPMI_READY6 0x4071
#define MX28_PAD_ENET0_TXD1__GPMI_READY7 0x4081
#define MX28_PAD_ENET0_RXD2__ENET1_RXD0 0x4091
#define MX28_PAD_ENET0_RXD3__ENET1_RXD1 0x40a1
#define MX28_PAD_ENET0_TXD2__ENET1_TXD0 0x40b1
#define MX28_PAD_ENET0_TXD3__ENET1_TXD1 0x40c1
#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER 0x40d1
#define MX28_PAD_ENET0_COL__ENET1_TX_EN 0x40e1
#define MX28_PAD_ENET0_CRS__ENET1_RX_EN 0x40f1
#define MX28_PAD_GPMI_CE2N__ENET0_RX_ER 0x0122
#define MX28_PAD_GPMI_CE3N__SAIF1_MCLK 0x0132
#define MX28_PAD_GPMI_RDY0__USB0_ID 0x0142
#define MX28_PAD_GPMI_RDY2__ENET0_TX_ER 0x0162
#define MX28_PAD_GPMI_RDY3__HSADC_TRIGGER 0x0172
#define MX28_PAD_GPMI_ALE__SSP3_D4 0x01a2
#define MX28_PAD_GPMI_CLE__SSP3_D5 0x01b2
#define MX28_PAD_LCD_D00__ETM_DA0 0x1002
#define MX28_PAD_LCD_D01__ETM_DA1 0x1012
#define MX28_PAD_LCD_D02__ETM_DA2 0x1022
#define MX28_PAD_LCD_D03__ETM_DA3 0x1032
#define MX28_PAD_LCD_D04__ETM_DA4 0x1042
#define MX28_PAD_LCD_D05__ETM_DA5 0x1052
#define MX28_PAD_LCD_D06__ETM_DA6 0x1062
#define MX28_PAD_LCD_D07__ETM_DA7 0x1072
#define MX28_PAD_LCD_D08__ETM_DA8 0x1082
#define MX28_PAD_LCD_D09__ETM_DA9 0x1092
#define MX28_PAD_LCD_D10__ETM_DA10 0x10a2
#define MX28_PAD_LCD_D11__ETM_DA11 0x10b2
#define MX28_PAD_LCD_D12__ETM_DA12 0x10c2
#define MX28_PAD_LCD_D13__ETM_DA13 0x10d2
#define MX28_PAD_LCD_D14__ETM_DA14 0x10e2
#define MX28_PAD_LCD_D15__ETM_DA15 0x10f2
#define MX28_PAD_LCD_D16__ETM_DA7 0x1102
#define MX28_PAD_LCD_D17__ETM_DA6 0x1112
#define MX28_PAD_LCD_D18__ETM_DA5 0x1122
#define MX28_PAD_LCD_D19__ETM_DA4 0x1132
#define MX28_PAD_LCD_D20__ETM_DA3 0x1142
#define MX28_PAD_LCD_D21__ETM_DA2 0x1152
#define MX28_PAD_LCD_D22__ETM_DA1 0x1162
#define MX28_PAD_LCD_D23__ETM_DA0 0x1172
#define MX28_PAD_LCD_RD_E__ETM_TCTL 0x1182
#define MX28_PAD_LCD_WR_RWN__ETM_TCLK 0x1192
#define MX28_PAD_LCD_HSYNC__ETM_TCTL 0x11d2
#define MX28_PAD_LCD_DOTCLK__ETM_TCLK 0x11e2
#define MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT 0x20c2
#define MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN 0x20d2
#define MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT 0x20e2
#define MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN 0x20f2
#define MX28_PAD_SSP2_SCK__SAIF0_SDATA1 0x2102
#define MX28_PAD_SSP2_MOSI__SAIF0_SDATA2 0x2112
#define MX28_PAD_SSP2_MISO__SAIF1_SDATA1 0x2122
#define MX28_PAD_SSP2_SS0__SAIF1_SDATA2 0x2132
#define MX28_PAD_SSP2_SS1__USB1_OVERCURRENT 0x2142
#define MX28_PAD_SSP2_SS2__USB0_OVERCURRENT 0x2152
#define MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT 0x2182
#define MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN 0x2192
#define MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT 0x21a2
#define MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN 0x21b2
#define MX28_PAD_AUART0_RX__DUART_CTS 0x3002
#define MX28_PAD_AUART0_TX__DUART_RTS 0x3012
#define MX28_PAD_AUART0_CTS__DUART_RX 0x3022
#define MX28_PAD_AUART0_RTS__DUART_TX 0x3032
#define MX28_PAD_AUART1_RX__PWM_0 0x3042
#define MX28_PAD_AUART1_TX__PWM_1 0x3052
#define MX28_PAD_AUART1_CTS__TIMROT_ROTARYA 0x3062
#define MX28_PAD_AUART1_RTS__TIMROT_ROTARYB 0x3072
#define MX28_PAD_AUART2_RX__SSP3_D4 0x3082
#define MX28_PAD_AUART2_TX__SSP3_D5 0x3092
#define MX28_PAD_AUART2_CTS__SAIF1_BITCLK 0x30a2
#define MX28_PAD_AUART2_RTS__SAIF1_LRCLK 0x30b2
#define MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT 0x30c2
#define MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN 0x30d2
#define MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT 0x30e2
#define MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN 0x30f2
#define MX28_PAD_PWM0__DUART_RX 0x3102
#define MX28_PAD_PWM1__DUART_TX 0x3112
#define MX28_PAD_PWM2__USB1_OVERCURRENT 0x3122
#define MX28_PAD_SAIF0_MCLK__AUART4_CTS 0x3142
#define MX28_PAD_SAIF0_LRCLK__AUART4_RTS 0x3152
#define MX28_PAD_SAIF0_BITCLK__AUART4_RX 0x3162
#define MX28_PAD_SAIF0_SDATA0__AUART4_TX 0x3172
#define MX28_PAD_I2C0_SCL__DUART_RX 0x3182
#define MX28_PAD_I2C0_SDA__DUART_TX 0x3192
#define MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1 0x31a2
#define MX28_PAD_SPDIF__ENET1_RX_ER 0x31b2
#define MX28_PAD_ENET0_MDC__SAIF0_SDATA1 0x4002
#define MX28_PAD_ENET0_MDIO__SAIF0_SDATA2 0x4012
#define MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1 0x4022
#define MX28_PAD_ENET0_RXD0__SAIF1_SDATA2 0x4032
#define MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT 0x4052
#define MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT 0x4092
#define MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN 0x40a2
#define MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT 0x40b2
#define MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN 0x40c2
#define MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN 0x40d2
#define MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT 0x40e2
#define MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN 0x40f2
#define MX28_PAD_GPMI_D00__GPIO_0_0 0x0003
#define MX28_PAD_GPMI_D01__GPIO_0_1 0x0013
#define MX28_PAD_GPMI_D02__GPIO_0_2 0x0023
#define MX28_PAD_GPMI_D03__GPIO_0_3 0x0033
#define MX28_PAD_GPMI_D04__GPIO_0_4 0x0043
#define MX28_PAD_GPMI_D05__GPIO_0_5 0x0053
#define MX28_PAD_GPMI_D06__GPIO_0_6 0x0063
#define MX28_PAD_GPMI_D07__GPIO_0_7 0x0073
#define MX28_PAD_GPMI_CE0N__GPIO_0_16 0x0103
#define MX28_PAD_GPMI_CE1N__GPIO_0_17 0x0113
#define MX28_PAD_GPMI_CE2N__GPIO_0_18 0x0123
#define MX28_PAD_GPMI_CE3N__GPIO_0_19 0x0133
#define MX28_PAD_GPMI_RDY0__GPIO_0_20 0x0143
#define MX28_PAD_GPMI_RDY1__GPIO_0_21 0x0153
#define MX28_PAD_GPMI_RDY2__GPIO_0_22 0x0163
#define MX28_PAD_GPMI_RDY3__GPIO_0_23 0x0173
#define MX28_PAD_GPMI_RDN__GPIO_0_24 0x0183
#define MX28_PAD_GPMI_WRN__GPIO_0_25 0x0193
#define MX28_PAD_GPMI_ALE__GPIO_0_26 0x01a3
#define MX28_PAD_GPMI_CLE__GPIO_0_27 0x01b3
#define MX28_PAD_GPMI_RESETN__GPIO_0_28 0x01c3
#define MX28_PAD_LCD_D00__GPIO_1_0 0x1003
#define MX28_PAD_LCD_D01__GPIO_1_1 0x1013
#define MX28_PAD_LCD_D02__GPIO_1_2 0x1023
#define MX28_PAD_LCD_D03__GPIO_1_3 0x1033
#define MX28_PAD_LCD_D04__GPIO_1_4 0x1043
#define MX28_PAD_LCD_D05__GPIO_1_5 0x1053
#define MX28_PAD_LCD_D06__GPIO_1_6 0x1063
#define MX28_PAD_LCD_D07__GPIO_1_7 0x1073
#define MX28_PAD_LCD_D08__GPIO_1_8 0x1083
#define MX28_PAD_LCD_D09__GPIO_1_9 0x1093
#define MX28_PAD_LCD_D10__GPIO_1_10 0x10a3
#define MX28_PAD_LCD_D11__GPIO_1_11 0x10b3
#define MX28_PAD_LCD_D12__GPIO_1_12 0x10c3
#define MX28_PAD_LCD_D13__GPIO_1_13 0x10d3
#define MX28_PAD_LCD_D14__GPIO_1_14 0x10e3
#define MX28_PAD_LCD_D15__GPIO_1_15 0x10f3
#define MX28_PAD_LCD_D16__GPIO_1_16 0x1103
#define MX28_PAD_LCD_D17__GPIO_1_17 0x1113
#define MX28_PAD_LCD_D18__GPIO_1_18 0x1123
#define MX28_PAD_LCD_D19__GPIO_1_19 0x1133
#define MX28_PAD_LCD_D20__GPIO_1_20 0x1143
#define MX28_PAD_LCD_D21__GPIO_1_21 0x1153
#define MX28_PAD_LCD_D22__GPIO_1_22 0x1163
#define MX28_PAD_LCD_D23__GPIO_1_23 0x1173
#define MX28_PAD_LCD_RD_E__GPIO_1_24 0x1183
#define MX28_PAD_LCD_WR_RWN__GPIO_1_25 0x1193
#define MX28_PAD_LCD_RS__GPIO_1_26 0x11a3
#define MX28_PAD_LCD_CS__GPIO_1_27 0x11b3
#define MX28_PAD_LCD_VSYNC__GPIO_1_28 0x11c3
#define MX28_PAD_LCD_HSYNC__GPIO_1_29 0x11d3
#define MX28_PAD_LCD_DOTCLK__GPIO_1_30 0x11e3
#define MX28_PAD_LCD_ENABLE__GPIO_1_31 0x11f3
#define MX28_PAD_SSP0_DATA0__GPIO_2_0 0x2003
#define MX28_PAD_SSP0_DATA1__GPIO_2_1 0x2013
#define MX28_PAD_SSP0_DATA2__GPIO_2_2 0x2023
#define MX28_PAD_SSP0_DATA3__GPIO_2_3 0x2033
#define MX28_PAD_SSP0_DATA4__GPIO_2_4 0x2043
#define MX28_PAD_SSP0_DATA5__GPIO_2_5 0x2053
#define MX28_PAD_SSP0_DATA6__GPIO_2_6 0x2063
#define MX28_PAD_SSP0_DATA7__GPIO_2_7 0x2073
#define MX28_PAD_SSP0_CMD__GPIO_2_8 0x2083
#define MX28_PAD_SSP0_DETECT__GPIO_2_9 0x2093
#define MX28_PAD_SSP0_SCK__GPIO_2_10 0x20a3
#define MX28_PAD_SSP1_SCK__GPIO_2_12 0x20c3
#define MX28_PAD_SSP1_CMD__GPIO_2_13 0x20d3
#define MX28_PAD_SSP1_DATA0__GPIO_2_14 0x20e3
#define MX28_PAD_SSP1_DATA3__GPIO_2_15 0x20f3
#define MX28_PAD_SSP2_SCK__GPIO_2_16 0x2103
#define MX28_PAD_SSP2_MOSI__GPIO_2_17 0x2113
#define MX28_PAD_SSP2_MISO__GPIO_2_18 0x2123
#define MX28_PAD_SSP2_SS0__GPIO_2_19 0x2133
#define MX28_PAD_SSP2_SS1__GPIO_2_20 0x2143
#define MX28_PAD_SSP2_SS2__GPIO_2_21 0x2153
#define MX28_PAD_SSP3_SCK__GPIO_2_24 0x2183
#define MX28_PAD_SSP3_MOSI__GPIO_2_25 0x2193
#define MX28_PAD_SSP3_MISO__GPIO_2_26 0x21a3
#define MX28_PAD_SSP3_SS0__GPIO_2_27 0x21b3
#define MX28_PAD_AUART0_RX__GPIO_3_0 0x3003
#define MX28_PAD_AUART0_TX__GPIO_3_1 0x3013
#define MX28_PAD_AUART0_CTS__GPIO_3_2 0x3023
#define MX28_PAD_AUART0_RTS__GPIO_3_3 0x3033
#define MX28_PAD_AUART1_RX__GPIO_3_4 0x3043
#define MX28_PAD_AUART1_TX__GPIO_3_5 0x3053
#define MX28_PAD_AUART1_CTS__GPIO_3_6 0x3063
#define MX28_PAD_AUART1_RTS__GPIO_3_7 0x3073
#define MX28_PAD_AUART2_RX__GPIO_3_8 0x3083
#define MX28_PAD_AUART2_TX__GPIO_3_9 0x3093
#define MX28_PAD_AUART2_CTS__GPIO_3_10 0x30a3
#define MX28_PAD_AUART2_RTS__GPIO_3_11 0x30b3
#define MX28_PAD_AUART3_RX__GPIO_3_12 0x30c3
#define MX28_PAD_AUART3_TX__GPIO_3_13 0x30d3
#define MX28_PAD_AUART3_CTS__GPIO_3_14 0x30e3
#define MX28_PAD_AUART3_RTS__GPIO_3_15 0x30f3
#define MX28_PAD_PWM0__GPIO_3_16 0x3103
#define MX28_PAD_PWM1__GPIO_3_17 0x3113
#define MX28_PAD_PWM2__GPIO_3_18 0x3123
#define MX28_PAD_SAIF0_MCLK__GPIO_3_20 0x3143
#define MX28_PAD_SAIF0_LRCLK__GPIO_3_21 0x3153
#define MX28_PAD_SAIF0_BITCLK__GPIO_3_22 0x3163
#define MX28_PAD_SAIF0_SDATA0__GPIO_3_23 0x3173
#define MX28_PAD_I2C0_SCL__GPIO_3_24 0x3183
#define MX28_PAD_I2C0_SDA__GPIO_3_25 0x3193
#define MX28_PAD_SAIF1_SDATA0__GPIO_3_26 0x31a3
#define MX28_PAD_SPDIF__GPIO_3_27 0x31b3
#define MX28_PAD_PWM3__GPIO_3_28 0x31c3
#define MX28_PAD_PWM4__GPIO_3_29 0x31d3
#define MX28_PAD_LCD_RESET__GPIO_3_30 0x31e3
#define MX28_PAD_ENET0_MDC__GPIO_4_0 0x4003
#define MX28_PAD_ENET0_MDIO__GPIO_4_1 0x4013
#define MX28_PAD_ENET0_RX_EN__GPIO_4_2 0x4023
#define MX28_PAD_ENET0_RXD0__GPIO_4_3 0x4033
#define MX28_PAD_ENET0_RXD1__GPIO_4_4 0x4043
#define MX28_PAD_ENET0_TX_CLK__GPIO_4_5 0x4053
#define MX28_PAD_ENET0_TX_EN__GPIO_4_6 0x4063
#define MX28_PAD_ENET0_TXD0__GPIO_4_7 0x4073
#define MX28_PAD_ENET0_TXD1__GPIO_4_8 0x4083
#define MX28_PAD_ENET0_RXD2__GPIO_4_9 0x4093
#define MX28_PAD_ENET0_RXD3__GPIO_4_10 0x40a3
#define MX28_PAD_ENET0_TXD2__GPIO_4_11 0x40b3
#define MX28_PAD_ENET0_TXD3__GPIO_4_12 0x40c3
#define MX28_PAD_ENET0_RX_CLK__GPIO_4_13 0x40d3
#define MX28_PAD_ENET0_COL__GPIO_4_14 0x40e3
#define MX28_PAD_ENET0_CRS__GPIO_4_15 0x40f3
#define MX28_PAD_ENET_CLK__GPIO_4_16 0x4103
#define MX28_PAD_JTAG_RTCK__GPIO_4_20 0x4143
#endif /* __DT_BINDINGS_MX28_PINCTRL_H__ */

View File

@@ -10,7 +10,7 @@
*/ */
/dts-v1/; /dts-v1/;
/include/ "imx28.dtsi" #include "imx28.dtsi"
/ { / {
model = "SchulerControl GmbH, SC SPS 1"; model = "SchulerControl GmbH, SC SPS 1";
@@ -29,13 +29,13 @@
hog_pins_a: hog-gpios@0 { hog_pins_a: hog-gpios@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0003 /* MX28_PAD_GPMI_D00__GPIO_0_0 */ MX28_PAD_GPMI_D00__GPIO_0_0
0x0033 /* MX28_PAD_GPMI_D03__GPIO_0_3 */ MX28_PAD_GPMI_D03__GPIO_0_3
0x0063 /* MX28_PAD_GPMI_D06__GPIO_0_6 */ MX28_PAD_GPMI_D06__GPIO_0_6
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
}; };

View File

@@ -1,106 +1,139 @@
/*
* Copyright 2012 Shawn Guo <shawn.guo@linaro.org>
* Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/; /dts-v1/;
/include/ "imx28.dtsi" #include "imx28.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ { / {
model = "Ka-Ro electronics TX28 module"; model = "Ka-Ro electronics TX28 module";
compatible = "karo,tx28", "fsl,imx28"; compatible = "karo,tx28", "fsl,imx28";
aliases {
can0 = &can0;
can1 = &can1;
display = &display;
ds1339 = &ds1339;
gpio5 = &gpio5;
lcdif = &lcdif;
lcdif_23bit_pins = &tx28_lcdif_23bit_pins;
lcdif_24bit_pins = &lcdif_24bit_pins_a;
stk5led = &user_led;
usbotg = &usb0;
};
memory { memory {
reg = <0x40000000 0x08000000>; reg = <0 0>; /* will be filled in by U-Boot */
}; };
apb@80000000 { onewire {
apbh@80000000 { compatible = "w1-gpio";
ssp0: ssp@80010000 { gpios = <&gpio2 7 0>;
compatible = "fsl,imx28-mmc"; status = "disabled";
pinctrl-names = "default"; };
pinctrl-0 = <&mmc0_4bit_pins_a
&mmc0_cd_cfg
&mmc0_sck_cfg>;
bus-width = <4>;
status = "okay";
};
pinctrl@80018000 { regulators {
pinctrl-names = "default"; compatible = "simple-bus";
pinctrl-0 = <&hog_pins_a>;
hog_pins_a: hog@0 { reg_usb0_vbus: usb0_vbus {
reg = <0>; compatible = "regulator-fixed";
fsl,pinmux-ids = < regulator-name = "usb0_vbus";
0x40a3 /* MX28_PAD_ENET0_RXD3__GPIO_4_10 */ regulator-min-microvolt = <5000000>;
>; regulator-max-microvolt = <5000000>;
fsl,drive-strength = <0>; gpio = <&gpio0 18 0>;
fsl,voltage = <1>; enable-active-high;
fsl,pull-up = <0>;
};
mac0_pins_gpio: mac0-gpio-mode@0 {
reg = <0>;
fsl,pinmux-ids = <
0x4003 /* MX28_PAD_ENET0_MDC__GPIO_4_0 */
0x4013 /* MX28_PAD_ENET0_MDIO__GPIO_4_1 */
0x4023 /* MX28_PAD_ENET0_RX_EN__GPIO_4_2 */
0x4033 /* MX28_PAD_ENET0_RXD0__GPIO_4_3 */
0x4043 /* MX28_PAD_ENET0_RXD1__GPIO_4_4 */
0x4063 /* MX28_PAD_ENET0_TX_EN__GPIO_4_6 */
0x4073 /* MX28_PAD_ENET0_TXD0__GPIO_4_7 */
0x4083 /* MX28_PAD_ENET0_TXD1__GPIO_4_8 */
0x4103 /* MX28_PAD_ENET_CLK__GPIO_4_16 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
};
}; };
apbx@80040000 { reg_usb1_vbus: usb1_vbus {
i2c0: i2c@80058000 { compatible = "regulator-fixed";
pinctrl-names = "default"; regulator-name = "usb1_vbus";
pinctrl-0 = <&i2c0_pins_a>; regulator-min-microvolt = <5000000>;
status = "okay"; regulator-max-microvolt = <5000000>;
gpio = <&gpio3 27 0>;
enable-active-high;
};
ds1339: rtc@68 { reg_2p5v: 2p5v {
compatible = "mxim,ds1339"; compatible = "regulator-fixed";
reg = <0x68>; regulator-name = "2P5V";
}; regulator-min-microvolt = <2500000>;
}; regulator-max-microvolt = <2500000>;
regulator-always-on;
};
pwm: pwm@80064000 { reg_3p3v: 3p3v {
pinctrl-names = "default"; compatible = "regulator-fixed";
pinctrl-0 = <&pwm0_pins_a>; regulator-name = "3P3V";
status = "okay"; regulator-min-microvolt = <3300000>;
}; regulator-max-microvolt = <3300000>;
regulator-always-on;
};
duart: serial@80074000 { reg_can_xcvr: can-xcvr {
pinctrl-names = "default"; compatible = "regulator-fixed";
pinctrl-0 = <&duart_4pins_a>; regulator-name = "CAN XCVR";
status = "okay"; regulator-min-microvolt = <3300000>;
}; regulator-max-microvolt = <3300000>;
gpio = <&gpio1 0 0>;
enable-active-low;
pinctrl-names = "default";
pinctrl-0 = <&tx28_flexcan_xcvr_pins>;
};
auart1: serial@8006c000 { reg_lcd: lcd-power {
pinctrl-names = "default"; compatible = "regulator-fixed";
pinctrl-0 = <&auart1_pins_a>; regulator-name = "LCD POWER";
status = "okay"; regulator-min-microvolt = <3300000>;
}; regulator-max-microvolt = <3300000>;
gpio = <&gpio1 31 0>;
enable-active-high;
};
reg_lcd_reset: lcd-reset {
compatible = "regulator-fixed";
regulator-name = "LCD RESET";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 30 0>;
startup-delay-us = <300000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
}; };
}; };
ahb@80080000 { clocks {
mac0: ethernet@800f0000 { #address-cells = <1>;
phy-mode = "rmii"; #size-cells = <0>;
pinctrl-names = "default", "gpio_mode"; mclk: clock@0 {
pinctrl-0 = <&mac0_pins_a>; compatible = "fixed-clock";
pinctrl-1 = <&mac0_pins_gpio>; reg = <0>;
status = "okay"; #clock-cells = <0>;
clock-frequency = <27000000>;
}; };
}; };
sound {
compatible = "fsl,imx28-tx28-sgtl5000",
"fsl,mxs-audio-sgtl5000";
model = "imx28-tx28-sgtl5000";
saif-controllers = <&saif0 &saif1>;
audio-codec = <&sgtl5000>;
};
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
user { user_led: user {
label = "Heartbeat"; label = "Heartbeat";
gpios = <&gpio4 10 0>; gpios = <&gpio4 10 0>;
linux,default-trigger = "heartbeat"; linux,default-trigger = "heartbeat";
@@ -109,8 +142,512 @@
backlight { backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm 0 5000000>; pwms = <&pwm 0 500000>;
brightness-levels = <0 4 8 16 32 64 128 255>; /*
default-brightness-level = <6>; * a silly way to create a 1:1 relationship between the
* PWM value and the actual duty cycle
*/
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <50>;
};
matrix_keypad: matrix-keypad@0 {
compatible = "gpio-matrix-keypad";
col-gpios = <
&gpio5 0 0
&gpio5 1 0
&gpio5 2 0
&gpio5 3 0
>;
row-gpios = <
&gpio5 4 0
&gpio5 5 0
&gpio5 6 0
&gpio5 7 0
>;
/* sample keymap */
linux,keymap = <
0x00000074 /* row 0, col 0, KEY_POWER */
0x00010052 /* row 0, col 1, KEY_KP0 */
0x0002004f /* row 0, col 2, KEY_KP1 */
0x00030050 /* row 0, col 3, KEY_KP2 */
0x01000051 /* row 1, col 0, KEY_KP3 */
0x0101004b /* row 1, col 1, KEY_KP4 */
0x0102004c /* row 1, col 2, KEY_KP5 */
0x0103004d /* row 1, col 3, KEY_KP6 */
0x02000047 /* row 2, col 0, KEY_KP7 */
0x02010048 /* row 2, col 1, KEY_KP8 */
0x02020049 /* row 2, col 2, KEY_KP9 */
>;
gpio-activelow;
linux,wakeup;
debounce-delay-ms = <100>;
col-scan-delay-us = <5000>;
linux,no-autorepeat;
}; };
}; };
/* 2nd TX-Std UART - (A)UART1 */
&auart1 {
pinctrl-names = "default";
pinctrl-0 = <&auart1_pins_a>;
status = "okay";
};
/* 3rd TX-Std UART - (A)UART3 */
&auart3 {
pinctrl-names = "default";
pinctrl-0 = <&auart3_pins_a>;
status = "okay";
};
&can0 {
pinctrl-names = "default";
pinctrl-0 = <&can0_pins_a>;
xceiver-supply = <&reg_can_xcvr>;
status = "okay";
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&can1_pins_a>;
xceiver-supply = <&reg_can_xcvr>;
status = "okay";
};
&digctl {
status = "okay";
};
/* 1st TX-Std UART - (D)UART */
&duart {
pinctrl-names = "default";
pinctrl-0 = <&duart_4pins_a>;
status = "okay";
};
&gpmi {
pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
nand-on-flash-bbt;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
clock-frequency = <400000>;
status = "okay";
sgtl5000: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
clocks = <&mclk>;
};
gpio5: pca953x@20 {
compatible = "nxp,pca9554";
reg = <0x20>;
pinctrl-names = "default";
pinctrl-0 = <&tx28_pca9554_pins>;
interrupt-parent = <&gpio3>;
interrupts = <28 0>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
polytouch: edt-ft5x06@38 {
compatible = "edt,edt-ft5x06";
reg = <0x38>;
pinctrl-names = "default";
pinctrl-0 = <&tx28_edt_ft5x06_pins>;
interrupt-parent = <&gpio2>;
interrupts = <5 0>;
reset-gpios = <&gpio2 6 1>;
wake-gpios = <&gpio4 9 0>;
};
touchscreen: tsc2007@48 {
compatible = "ti,tsc2007";
reg = <0x48>;
pinctrl-names = "default";
pinctrl-0 = <&tx28_tsc2007_pins>;
interrupt-parent = <&gpio3>;
interrupts = <20 0>;
pendown-gpio = <&gpio3 20 1>;
ti,x-plate-ohms = /bits/ 16 <660>;
};
ds1339: rtc@68 {
compatible = "mxim,ds1339";
reg = <0x68>;
};
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_sync_pins_a &tx28_lcdif_ctrl_pins>;
lcd-supply = <&reg_lcd>;
display = <&display>;
status = "okay";
display: display@0 {
bits-per-pixel = <32>;
bus-width = <24>;
display-timings {
native-mode = <&timing5>;
timing0: timing0 {
panel-name = "VGA";
clock-frequency = <25175000>;
hactive = <640>;
vactive = <480>;
hback-porch = <48>;
hsync-len = <96>;
hfront-porch = <16>;
vback-porch = <33>;
vsync-len = <2>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
timing1: timing1 {
panel-name = "ETV570";
clock-frequency = <25175000>;
hactive = <640>;
vactive = <480>;
hback-porch = <114>;
hsync-len = <30>;
hfront-porch = <16>;
vback-porch = <32>;
vsync-len = <3>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
timing2: timing2 {
panel-name = "ET0350";
clock-frequency = <6500000>;
hactive = <320>;
vactive = <240>;
hback-porch = <34>;
hsync-len = <34>;
hfront-porch = <20>;
vback-porch = <15>;
vsync-len = <3>;
vfront-porch = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
timing3: timing3 {
panel-name = "ET0430";
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hback-porch = <2>;
hsync-len = <41>;
hfront-porch = <2>;
vback-porch = <2>;
vsync-len = <10>;
vfront-porch = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
timing4: timing4 {
panel-name = "ET0500", "ET0700";
clock-frequency = <33260000>;
hactive = <800>;
vactive = <480>;
hback-porch = <88>;
hsync-len = <128>;
hfront-porch = <40>;
vback-porch = <33>;
vsync-len = <2>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
timing5: timing5 {
panel-name = "ETQ570";
clock-frequency = <6400000>;
hactive = <320>;
vactive = <240>;
hback-porch = <38>;
hsync-len = <30>;
hfront-porch = <30>;
vback-porch = <16>;
vsync-len = <3>;
vfront-porch = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
};
&lradc {
fsl,lradc-touchscreen-wires = <4>;
status = "okay";
};
&mac0 {
phy-mode = "rmii";
pinctrl-names = "default", "gpio_mode";
pinctrl-0 = <&mac0_pins_a>;
pinctrl-1 = <&tx28_mac0_pins_gpio>;
status = "okay";
};
&mac1 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac1_pins_a>;
/* not enabled by default */
};
&mxs_rtc {
status = "okay";
};
&ocotp {
status = "okay";
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins_a>;
status = "okay";
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_a>;
hog_pins_a: hog@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_ENET0_RXD3__GPIO_4_10 /* module LED */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_edt_ft5x06_pins: tx28-edt-ft5x06-pins {
fsl,pinmux-ids = <
MX28_PAD_SSP0_DATA6__GPIO_2_6 /* RESET */
MX28_PAD_SSP0_DATA5__GPIO_2_5 /* IRQ */
MX28_PAD_ENET0_RXD2__GPIO_4_9 /* WAKE */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_flexcan_xcvr_pins: tx28-flexcan-xcvr-pins {
fsl,pinmux-ids = <
MX28_PAD_LCD_D00__GPIO_1_0
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_lcdif_23bit_pins: tx28-lcdif-23bit {
fsl,pinmux-ids = <
/* LCD_D00 may be used as Flexcan Transceiver Enable on STK5-V5 */
MX28_PAD_LCD_D01__LCD_D1
MX28_PAD_LCD_D02__LCD_D2
MX28_PAD_LCD_D03__LCD_D3
MX28_PAD_LCD_D04__LCD_D4
MX28_PAD_LCD_D05__LCD_D5
MX28_PAD_LCD_D06__LCD_D6
MX28_PAD_LCD_D07__LCD_D7
MX28_PAD_LCD_D08__LCD_D8
MX28_PAD_LCD_D09__LCD_D9
MX28_PAD_LCD_D10__LCD_D10
MX28_PAD_LCD_D11__LCD_D11
MX28_PAD_LCD_D12__LCD_D12
MX28_PAD_LCD_D13__LCD_D13
MX28_PAD_LCD_D14__LCD_D14
MX28_PAD_LCD_D15__LCD_D15
MX28_PAD_LCD_D16__LCD_D16
MX28_PAD_LCD_D17__LCD_D17
MX28_PAD_LCD_D18__LCD_D18
MX28_PAD_LCD_D19__LCD_D19
MX28_PAD_LCD_D20__LCD_D20
MX28_PAD_LCD_D21__LCD_D21
MX28_PAD_LCD_D22__LCD_D22
MX28_PAD_LCD_D23__LCD_D23
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_lcdif_ctrl_pins: tx28-lcdif-ctrl {
fsl,pinmux-ids = <
MX28_PAD_LCD_ENABLE__GPIO_1_31 /* Enable */
MX28_PAD_LCD_RESET__GPIO_3_30 /* Reset */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_mac0_pins_gpio: tx28-mac0-gpio-pins {
fsl,pinmux-ids = <
MX28_PAD_ENET0_MDC__GPIO_4_0
MX28_PAD_ENET0_MDIO__GPIO_4_1
MX28_PAD_ENET0_RX_EN__GPIO_4_2
MX28_PAD_ENET0_RXD0__GPIO_4_3
MX28_PAD_ENET0_RXD1__GPIO_4_4
MX28_PAD_ENET0_TX_EN__GPIO_4_6
MX28_PAD_ENET0_TXD0__GPIO_4_7
MX28_PAD_ENET0_TXD1__GPIO_4_8
MX28_PAD_ENET_CLK__GPIO_4_16
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_pca9554_pins: tx28-pca9554-pins {
fsl,pinmux-ids = <
MX28_PAD_PWM3__GPIO_3_28
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_tsc2007_pins: tx28-tsc2007-pins {
fsl,pinmux-ids = <
MX28_PAD_SAIF0_MCLK__GPIO_3_20 /* TSC2007 IRQ */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_usbphy0_pins: tx28-usbphy0-pins {
fsl,pinmux-ids = <
MX28_PAD_GPMI_CE2N__GPIO_0_18 /* USBOTG_VBUSEN */
MX28_PAD_GPMI_CE3N__GPIO_0_19 /* USBOTH_OC */
>;
fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_usbphy1_pins: tx28-usbphy1-pins {
fsl,pinmux-ids = <
MX28_PAD_SPDIF__GPIO_3_27 /* USBH_VBUSEN */
MX28_PAD_JTAG_RTCK__GPIO_4_20 /* USBH_OC */
>;
fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};
&saif0 {
pinctrl-names = "default";
pinctrl-0 = <&saif0_pins_b>;
fsl,saif-master;
status = "okay";
};
&saif1 {
pinctrl-names = "default";
pinctrl-0 = <&saif1_pins_a>;
status = "okay";
};
&ssp0 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default", "special";
pinctrl-0 = <&mmc0_4bit_pins_a
&mmc0_cd_cfg
&mmc0_sck_cfg>;
bus-width = <4>;
status = "okay";
};
&ssp3 {
compatible = "fsl,imx28-spi";
pinctrl-names = "default";
pinctrl-0 = <&spi3_pins_a>;
clock-frequency = <57600000>;
status = "okay";
spidev0: spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <57600000>;
};
spidev1: spi@1 {
compatible = "spidev";
reg = <1>;
spi-max-frequency = <57600000>;
};
};
&usb0 {
vbus-supply = <&reg_usb0_vbus>;
disable-over-current;
dr_mode = "peripheral";
status = "okay";
};
&usb1 {
vbus-supply = <&reg_usb1_vbus>;
disable-over-current;
dr_mode = "host";
status = "okay";
};
&usbphy0 {
pinctrl-names = "default";
pinctrl-0 = <&tx28_usbphy0_pins>;
phy_type = "utmi";
status = "okay";
};
&usbphy1 {
pinctrl-names = "default";
pinctrl-0 = <&tx28_usbphy1_pins>;
phy_type = "utmi";
status = "okay";
};

View File

@@ -9,7 +9,8 @@
* http://www.gnu.org/copyleft/gpl.html * http://www.gnu.org/copyleft/gpl.html
*/ */
/include/ "skeleton.dtsi" #include "skeleton.dtsi"
#include "imx28-pinfunc.h"
/ { / {
interrupt-parent = <&icoll>; interrupt-parent = <&icoll>;
@@ -207,538 +208,579 @@
duart_pins_a: duart@0 { duart_pins_a: duart@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3102 /* MX28_PAD_PWM0__DUART_RX */ MX28_PAD_PWM0__DUART_RX
0x3112 /* MX28_PAD_PWM1__DUART_TX */ MX28_PAD_PWM1__DUART_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
duart_pins_b: duart@1 { duart_pins_b: duart@1 {
reg = <1>; reg = <1>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */ MX28_PAD_AUART0_CTS__DUART_RX
0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */ MX28_PAD_AUART0_RTS__DUART_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
duart_4pins_a: duart-4pins@0 { duart_4pins_a: duart-4pins@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */ MX28_PAD_AUART0_CTS__DUART_RX
0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */ MX28_PAD_AUART0_RTS__DUART_TX
0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */ MX28_PAD_AUART0_RX__DUART_CTS
0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */ MX28_PAD_AUART0_TX__DUART_RTS
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
gpmi_pins_a: gpmi-nand@0 { gpmi_pins_a: gpmi-nand@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */ MX28_PAD_GPMI_D00__GPMI_D0
0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */ MX28_PAD_GPMI_D01__GPMI_D1
0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */ MX28_PAD_GPMI_D02__GPMI_D2
0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */ MX28_PAD_GPMI_D03__GPMI_D3
0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */ MX28_PAD_GPMI_D04__GPMI_D4
0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */ MX28_PAD_GPMI_D05__GPMI_D5
0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */ MX28_PAD_GPMI_D06__GPMI_D6
0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */ MX28_PAD_GPMI_D07__GPMI_D7
0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */ MX28_PAD_GPMI_CE0N__GPMI_CE0N
0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */ MX28_PAD_GPMI_RDY0__GPMI_READY0
0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */ MX28_PAD_GPMI_RDN__GPMI_RDN
0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */ MX28_PAD_GPMI_WRN__GPMI_WRN
0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */ MX28_PAD_GPMI_ALE__GPMI_ALE
0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */ MX28_PAD_GPMI_CLE__GPMI_CLE
0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */ MX28_PAD_GPMI_RESETN__GPMI_RESETN
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
gpmi_status_cfg: gpmi-status-cfg { gpmi_status_cfg: gpmi-status-cfg {
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */ MX28_PAD_GPMI_RDN__GPMI_RDN
0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */ MX28_PAD_GPMI_WRN__GPMI_WRN
0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */ MX28_PAD_GPMI_RESETN__GPMI_RESETN
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
}; };
auart0_pins_a: auart0@0 { auart0_pins_a: auart0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */ MX28_PAD_AUART0_RX__AUART0_RX
0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */ MX28_PAD_AUART0_TX__AUART0_TX
0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */ MX28_PAD_AUART0_CTS__AUART0_CTS
0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */ MX28_PAD_AUART0_RTS__AUART0_RTS
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart0_2pins_a: auart0-2pins@0 { auart0_2pins_a: auart0-2pins@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */ MX28_PAD_AUART0_RX__AUART0_RX
0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */ MX28_PAD_AUART0_TX__AUART0_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart1_pins_a: auart1@0 { auart1_pins_a: auart1@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */ MX28_PAD_AUART1_RX__AUART1_RX
0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */ MX28_PAD_AUART1_TX__AUART1_TX
0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */ MX28_PAD_AUART1_CTS__AUART1_CTS
0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */ MX28_PAD_AUART1_RTS__AUART1_RTS
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart1_2pins_a: auart1-2pins@0 { auart1_2pins_a: auart1-2pins@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */ MX28_PAD_AUART1_RX__AUART1_RX
0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */ MX28_PAD_AUART1_TX__AUART1_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart2_2pins_a: auart2-2pins@0 { auart2_2pins_a: auart2-2pins@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */ MX28_PAD_SSP2_SCK__AUART2_RX
0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */ MX28_PAD_SSP2_MOSI__AUART2_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart2_2pins_b: auart2-2pins@1 { auart2_2pins_b: auart2-2pins@1 {
reg = <1>; reg = <1>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3080 /* MX28_PAD_AUART2_RX__AUART2_RX */ MX28_PAD_AUART2_RX__AUART2_RX
0x3090 /* MX28_PAD_AUART2_TX__AUART2_TX */ MX28_PAD_AUART2_TX__AUART2_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart3_pins_a: auart3@0 { auart3_pins_a: auart3@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */ MX28_PAD_AUART3_RX__AUART3_RX
0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */ MX28_PAD_AUART3_TX__AUART3_TX
0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */ MX28_PAD_AUART3_CTS__AUART3_CTS
0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */ MX28_PAD_AUART3_RTS__AUART3_RTS
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart3_2pins_a: auart3-2pins@0 { auart3_2pins_a: auart3-2pins@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */ MX28_PAD_SSP2_MISO__AUART3_RX
0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */ MX28_PAD_SSP2_SS0__AUART3_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart3_2pins_b: auart3-2pins@1 { auart3_2pins_b: auart3-2pins@1 {
reg = <1>; reg = <1>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */ MX28_PAD_AUART3_RX__AUART3_RX
0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */ MX28_PAD_AUART3_TX__AUART3_TX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
auart4_2pins_a: auart4@0 { auart4_2pins_a: auart4@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2181 /* MX28_PAD_SSP3_SCK__AUART4_TX */ MX28_PAD_SSP3_SCK__AUART4_TX
0x2191 /* MX28_PAD_SSP3_MOSI__AUART4_RX */ MX28_PAD_SSP3_MOSI__AUART4_RX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
mac0_pins_a: mac0@0 { mac0_pins_a: mac0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */ MX28_PAD_ENET0_MDC__ENET0_MDC
0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */ MX28_PAD_ENET0_MDIO__ENET0_MDIO
0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */ MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */ MX28_PAD_ENET0_RXD0__ENET0_RXD0
0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */ MX28_PAD_ENET0_RXD1__ENET0_RXD1
0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */ MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */ MX28_PAD_ENET0_TXD0__ENET0_TXD0
0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */ MX28_PAD_ENET0_TXD1__ENET0_TXD1
0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */ MX28_PAD_ENET_CLK__CLKCTRL_ENET
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mac1_pins_a: mac1@0 { mac1_pins_a: mac1@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */ MX28_PAD_ENET0_CRS__ENET1_RX_EN
0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */ MX28_PAD_ENET0_RXD2__ENET1_RXD0
0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */ MX28_PAD_ENET0_RXD3__ENET1_RXD1
0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */ MX28_PAD_ENET0_COL__ENET1_TX_EN
0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */ MX28_PAD_ENET0_TXD2__ENET1_TXD0
0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */ MX28_PAD_ENET0_TXD3__ENET1_TXD1
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mmc0_8bit_pins_a: mmc0-8bit@0 { mmc0_8bit_pins_a: mmc0-8bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ MX28_PAD_SSP0_DATA0__SSP0_D0
0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ MX28_PAD_SSP0_DATA1__SSP0_D1
0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ MX28_PAD_SSP0_DATA2__SSP0_D2
0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ MX28_PAD_SSP0_DATA3__SSP0_D3
0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */ MX28_PAD_SSP0_DATA4__SSP0_D4
0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */ MX28_PAD_SSP0_DATA5__SSP0_D5
0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */ MX28_PAD_SSP0_DATA6__SSP0_D6
0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */ MX28_PAD_SSP0_DATA7__SSP0_D7
0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ MX28_PAD_SSP0_CMD__SSP0_CMD
0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ MX28_PAD_SSP0_SCK__SSP0_SCK
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mmc0_4bit_pins_a: mmc0-4bit@0 { mmc0_4bit_pins_a: mmc0-4bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ MX28_PAD_SSP0_DATA0__SSP0_D0
0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ MX28_PAD_SSP0_DATA1__SSP0_D1
0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ MX28_PAD_SSP0_DATA2__SSP0_D2
0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ MX28_PAD_SSP0_DATA3__SSP0_D3
0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ MX28_PAD_SSP0_CMD__SSP0_CMD
0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ MX28_PAD_SSP0_SCK__SSP0_SCK
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mmc0_cd_cfg: mmc0-cd-cfg { mmc0_cd_cfg: mmc0-cd-cfg {
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
>; >;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
mmc0_sck_cfg: mmc0-sck-cfg { mmc0_sck_cfg: mmc0-sck-cfg {
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ MX28_PAD_SSP0_SCK__SSP0_SCK
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
};
mmc2_4bit_pins_a: mmc2-4bit@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SSP0_DATA4__SSP2_D0
MX28_PAD_SSP1_SCK__SSP2_D1
MX28_PAD_SSP1_CMD__SSP2_D2
MX28_PAD_SSP0_DATA5__SSP2_D3
MX28_PAD_SSP0_DATA6__SSP2_CMD
MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
MX28_PAD_SSP0_DATA7__SSP2_SCK
>;
fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_ENABLE>;
};
mmc2_cd_cfg: mmc2-cd-cfg {
fsl,pinmux-ids = <
MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mmc2_sck_cfg: mmc2-sck-cfg {
fsl,pinmux-ids = <
MX28_PAD_SSP0_DATA7__SSP2_SCK
>;
fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
i2c0_pins_a: i2c0@0 { i2c0_pins_a: i2c0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */ MX28_PAD_I2C0_SCL__I2C0_SCL
0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */ MX28_PAD_I2C0_SDA__I2C0_SDA
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
i2c0_pins_b: i2c0@1 { i2c0_pins_b: i2c0@1 {
reg = <1>; reg = <1>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3001 /* MX28_PAD_AUART0_RX__I2C0_SCL */ MX28_PAD_AUART0_RX__I2C0_SCL
0x3011 /* MX28_PAD_AUART0_TX__I2C0_SDA */ MX28_PAD_AUART0_TX__I2C0_SDA
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
i2c1_pins_a: i2c1@0 { i2c1_pins_a: i2c1@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3101 /* MX28_PAD_PWM0__I2C1_SCL */ MX28_PAD_PWM0__I2C1_SCL
0x3111 /* MX28_PAD_PWM1__I2C1_SDA */ MX28_PAD_PWM1__I2C1_SDA
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
saif0_pins_a: saif0@0 { saif0_pins_a: saif0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */ MX28_PAD_SAIF0_MCLK__SAIF0_MCLK
0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */ MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */ MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */ MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
saif0_pins_b: saif0@1 { saif0_pins_b: saif0@1 {
reg = <1>; reg = <1>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */ MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */ MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */ MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
saif1_pins_a: saif1@0 { saif1_pins_a: saif1@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */ MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
pwm0_pins_a: pwm0@0 { pwm0_pins_a: pwm0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3100 /* MX28_PAD_PWM0__PWM_0 */ MX28_PAD_PWM0__PWM_0
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
pwm2_pins_a: pwm2@0 { pwm2_pins_a: pwm2@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3120 /* MX28_PAD_PWM2__PWM_2 */ MX28_PAD_PWM2__PWM_2
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
pwm3_pins_a: pwm3@0 { pwm3_pins_a: pwm3@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x31c0 /* MX28_PAD_PWM3__PWM_3 */ MX28_PAD_PWM3__PWM_3
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
pwm3_pins_b: pwm3@1 { pwm3_pins_b: pwm3@1 {
reg = <1>; reg = <1>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3141 /* MX28_PAD_SAIF0_MCLK__PWM3 */ MX28_PAD_SAIF0_MCLK__PWM_3
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
pwm4_pins_a: pwm4@0 { pwm4_pins_a: pwm4@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x31d0 /* MX28_PAD_PWM4__PWM_4 */ MX28_PAD_PWM4__PWM_4
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_24bit_pins_a: lcdif-24bit@0 { lcdif_24bit_pins_a: lcdif-24bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ MX28_PAD_LCD_D00__LCD_D0
0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ MX28_PAD_LCD_D01__LCD_D1
0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ MX28_PAD_LCD_D02__LCD_D2
0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ MX28_PAD_LCD_D03__LCD_D3
0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ MX28_PAD_LCD_D04__LCD_D4
0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ MX28_PAD_LCD_D05__LCD_D5
0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ MX28_PAD_LCD_D06__LCD_D6
0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ MX28_PAD_LCD_D07__LCD_D7
0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ MX28_PAD_LCD_D08__LCD_D8
0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ MX28_PAD_LCD_D09__LCD_D9
0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ MX28_PAD_LCD_D10__LCD_D10
0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ MX28_PAD_LCD_D11__LCD_D11
0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ MX28_PAD_LCD_D12__LCD_D12
0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ MX28_PAD_LCD_D13__LCD_D13
0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ MX28_PAD_LCD_D14__LCD_D14
0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ MX28_PAD_LCD_D15__LCD_D15
0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ MX28_PAD_LCD_D16__LCD_D16
0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ MX28_PAD_LCD_D17__LCD_D17
0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */ MX28_PAD_LCD_D18__LCD_D18
0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */ MX28_PAD_LCD_D19__LCD_D19
0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */ MX28_PAD_LCD_D20__LCD_D20
0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */ MX28_PAD_LCD_D21__LCD_D21
0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */ MX28_PAD_LCD_D22__LCD_D22
0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */ MX28_PAD_LCD_D23__LCD_D23
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_16bit_pins_a: lcdif-16bit@0 { lcdif_16bit_pins_a: lcdif-16bit@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ MX28_PAD_LCD_D00__LCD_D0
0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ MX28_PAD_LCD_D01__LCD_D1
0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ MX28_PAD_LCD_D02__LCD_D2
0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ MX28_PAD_LCD_D03__LCD_D3
0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ MX28_PAD_LCD_D04__LCD_D4
0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ MX28_PAD_LCD_D05__LCD_D5
0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ MX28_PAD_LCD_D06__LCD_D6
0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ MX28_PAD_LCD_D07__LCD_D7
0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ MX28_PAD_LCD_D08__LCD_D8
0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ MX28_PAD_LCD_D09__LCD_D9
0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ MX28_PAD_LCD_D10__LCD_D10
0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ MX28_PAD_LCD_D11__LCD_D11
0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ MX28_PAD_LCD_D12__LCD_D12
0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ MX28_PAD_LCD_D13__LCD_D13
0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ MX28_PAD_LCD_D14__LCD_D14
0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ MX28_PAD_LCD_D15__LCD_D15
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
lcdif_sync_pins_a: lcdif-sync@0 { lcdif_sync_pins_a: lcdif-sync@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ MX28_PAD_LCD_RS__LCD_DOTCLK
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ MX28_PAD_LCD_CS__LCD_ENABLE
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ MX28_PAD_LCD_RD_E__LCD_VSYNC
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ MX28_PAD_LCD_WR_RWN__LCD_HSYNC
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
can0_pins_a: can0@0 { can0_pins_a: can0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */ MX28_PAD_GPMI_RDY2__CAN0_TX
0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */ MX28_PAD_GPMI_RDY3__CAN0_RX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
can1_pins_a: can1@0 { can1_pins_a: can1@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */ MX28_PAD_GPMI_CE2N__CAN1_TX
0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */ MX28_PAD_GPMI_CE3N__CAN1_RX
>; >;
fsl,drive-strength = <0>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
spi2_pins_a: spi2@0 { spi2_pins_a: spi2@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2100 /* MX28_PAD_SSP2_SCK__SSP2_SCK */ MX28_PAD_SSP2_SCK__SSP2_SCK
0x2110 /* MX28_PAD_SSP2_MOSI__SSP2_CMD */ MX28_PAD_SSP2_MOSI__SSP2_CMD
0x2120 /* MX28_PAD_SSP2_MISO__SSP2_D0 */ MX28_PAD_SSP2_MISO__SSP2_D0
0x2130 /* MX28_PAD_SSP2_SS0__SSP2_D3 */ MX28_PAD_SSP2_SS0__SSP2_D3
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <1>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
spi3_pins_a: spi3@0 { spi3_pins_a: spi3@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3082 /* MX28_PAD_AUART2_RX__SSP3_D4 */ MX28_PAD_AUART2_RX__SSP3_D4
0x3092 /* MX28_PAD_AUART2_TX__SSP3_D5 */ MX28_PAD_AUART2_TX__SSP3_D5
0x2180 /* MX28_PAD_SSP3_SCK__SSP3_SCK */ MX28_PAD_SSP3_SCK__SSP3_SCK
0x2190 /* MX28_PAD_SSP3_MOSI__SSP3_CMD */ MX28_PAD_SSP3_MOSI__SSP3_CMD
0x21A0 /* MX28_PAD_SSP3_MISO__SSP3_D0 */ MX28_PAD_SSP3_MISO__SSP3_D0
0x21B0 /* MX28_PAD_SSP3_SS0__SSP3_D3 */ MX28_PAD_SSP3_SS0__SSP3_D3
>; >;
fsl,drive-strength = <1>; fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
usbphy0_pins_a: usbphy0@0 { usbphy0_pins_a: usbphy0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2152 /* MX28_PAD_SSP2_SS2__USB0_OVERCURRENT */ MX28_PAD_SSP2_SS2__USB0_OVERCURRENT
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
usbphy0_pins_b: usbphy0@1 { usbphy0_pins_b: usbphy0@1 {
reg = <1>; reg = <1>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x3061 /* MX28_PAD_AUART1_CTS__USB0_OVERCURRENT */ MX28_PAD_AUART1_CTS__USB0_OVERCURRENT
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
usbphy1_pins_a: usbphy1@0 { usbphy1_pins_a: usbphy1@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
0x2142 /* MX28_PAD_SSP2_SS1__USB1_OVERCURRENT */ MX28_PAD_SSP2_SS1__USB1_OVERCURRENT
>; >;
fsl,drive-strength = <2>; fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <1>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <0>; fsl,pull-up = <MXS_PULL_DISABLE>;
};
usb0_id_pins_a: usb0id@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_AUART1_RTS__USB0_ID
>;
fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
}; };

View File

@@ -16,6 +16,33 @@
model = "Armadeus Systems APF51Dev docking/development board"; model = "Armadeus Systems APF51Dev docking/development board";
compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51"; compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
display@di1 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 0>;
interface-pix-fmt = "bgr666";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1_1>;
display-timings {
lw700 {
native-mode;
clock-frequency = <33000033>;
hactive = <800>;
vactive = <480>;
hback-porch = <96>;
hfront-porch = <96>;
vback-porch = <20>;
vfront-porch = <21>;
hsync-len = <64>;
vsync-len = <4>;
hsync-active = <1>;
vsync-active = <1>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
gpio-keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";

View File

@@ -27,6 +27,20 @@
interface-pix-fmt = "rgb24"; interface-pix-fmt = "rgb24";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1_1>; pinctrl-0 = <&pinctrl_ipu_disp1_1>;
display-timings {
native-mode = <&timing0>;
timing0: dvi {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
}; };
display@di1 { display@di1 {
@@ -35,6 +49,25 @@
interface-pix-fmt = "rgb565"; interface-pix-fmt = "rgb565";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp2_1>; pinctrl-0 = <&pinctrl_ipu_disp2_1>;
status = "disabled";
display-timings {
native-mode = <&timing1>;
timing1: claawvga {
clock-frequency = <27000000>;
hactive = <800>;
vactive = <480>;
hback-porch = <40>;
hfront-porch = <60>;
vback-porch = <10>;
vfront-porch = <10>;
hsync-len = <20>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
}; };
gpio-keys { gpio-keys {
@@ -95,7 +128,7 @@
&uart3 { &uart3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_1>; pinctrl-0 = <&pinctrl_uart3_1 &pinctrl_uart3_rtscts_1>;
fsl,uart-has-rtscts; fsl,uart-has-rtscts;
status = "okay"; status = "okay";
}; };
@@ -252,7 +285,7 @@
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>; pinctrl-0 = <&pinctrl_uart1_1 &pinctrl_uart1_rtscts_1>;
fsl,uart-has-rtscts; fsl,uart-has-rtscts;
status = "okay"; status = "okay";
}; };

View File

@@ -86,6 +86,11 @@
interrupt-parent = <&tzic>; interrupt-parent = <&tzic>;
ranges; ranges;
iram: iram@1ffe0000 {
compatible = "mmio-sram";
reg = <0x1ffe0000 0x20000>;
};
ipu: ipu@40000000 { ipu: ipu@40000000 {
#crtc-cells = <1>; #crtc-cells = <1>;
compatible = "fsl,imx51-ipu"; compatible = "fsl,imx51-ipu";
@@ -374,6 +379,14 @@
clocks = <&clks 107>; clocks = <&clks 107>;
}; };
owire: owire@83fa4000 {
compatible = "fsl,imx51-owire", "fsl,imx21-owire";
reg = <0x83fa4000 0x4000>;
interrupts = <88>;
clocks = <&clks 159>;
status = "disabled";
};
ecspi2: ecspi@83fac000 { ecspi2: ecspi@83fac000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@@ -747,6 +760,11 @@
fsl,pins = < fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
>;
};
pinctrl_uart1_rtscts_1: uart1rtscts-1 {
fsl,pins = <
MX51_PAD_UART1_RTS__UART1_RTS 0x1c5 MX51_PAD_UART1_RTS__UART1_RTS 0x1c5
MX51_PAD_UART1_CTS__UART1_CTS 0x1c5 MX51_PAD_UART1_CTS__UART1_CTS 0x1c5
>; >;
@@ -767,6 +785,11 @@
fsl,pins = < fsl,pins = <
MX51_PAD_EIM_D25__UART3_RXD 0x1c5 MX51_PAD_EIM_D25__UART3_RXD 0x1c5
MX51_PAD_EIM_D26__UART3_TXD 0x1c5 MX51_PAD_EIM_D26__UART3_TXD 0x1c5
>;
};
pinctrl_uart3_rtscts_1: uart3rtscts-1 {
fsl,pins = <
MX51_PAD_EIM_D27__UART3_RTS 0x1c5 MX51_PAD_EIM_D27__UART3_RTS 0x1c5
MX51_PAD_EIM_D24__UART3_CTS 0x1c5 MX51_PAD_EIM_D24__UART3_CTS 0x1c5
>; >;

View File

@@ -55,19 +55,20 @@
label = "Power Button"; label = "Power Button";
gpios = <&gpio1 8 0>; gpios = <&gpio1 8 0>;
linux,code = <116>; /* KEY_POWER */ linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
}; };
volume-up { volume-up {
label = "Volume Up"; label = "Volume Up";
gpios = <&gpio2 14 0>; gpios = <&gpio2 14 0>;
linux,code = <115>; /* KEY_VOLUMEUP */ linux,code = <115>; /* KEY_VOLUMEUP */
gpio-key,wakeup;
}; };
volume-down { volume-down {
label = "Volume Down"; label = "Volume Down";
gpios = <&gpio2 15 0>; gpios = <&gpio2 15 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */ linux,code = <114>; /* KEY_VOLUMEDOWN */
gpio-key,wakeup;
}; };
}; };
@@ -122,7 +123,6 @@
&esdhc1 { &esdhc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>; pinctrl-0 = <&pinctrl_esdhc1_1>;
cd-gpios = <&gpio3 13 0>;
status = "okay"; status = "okay";
}; };
@@ -136,6 +136,7 @@
pinctrl-0 = <&pinctrl_esdhc3_1>; pinctrl-0 = <&pinctrl_esdhc3_1>;
cd-gpios = <&gpio3 11 0>; cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>; wp-gpios = <&gpio3 12 0>;
bus-width = <8>;
status = "okay"; status = "okay";
}; };
@@ -152,7 +153,6 @@
MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
MX53_PAD_EIM_DA11__GPIO3_11 0x80000000 MX53_PAD_EIM_DA11__GPIO3_11 0x80000000
MX53_PAD_EIM_DA12__GPIO3_12 0x80000000 MX53_PAD_EIM_DA12__GPIO3_12 0x80000000
MX53_PAD_EIM_DA13__GPIO3_13 0x80000000
MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000
MX53_PAD_GPIO_16__GPIO7_11 0x80000000 MX53_PAD_GPIO_16__GPIO7_11 0x80000000
@@ -318,5 +318,6 @@
}; };
&usbotg { &usbotg {
status = "okay"; dr_mode = "peripheral";
status = "okay";
}; };

View File

@@ -536,7 +536,7 @@
#define MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS 0x1d4 0x4e8 0x85c 0x2 0x0 #define MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS 0x1d4 0x4e8 0x85c 0x2 0x0
#define MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1d4 0x4e8 0x000 0x5 0x0 #define MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1d4 0x4e8 0x000 0x5 0x0
#define MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK 0x1d4 0x4e8 0x000 0x6 0x0 #define MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK 0x1d4 0x4e8 0x000 0x6 0x0
#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1d8 0x4ec 0x000 0x0 0x0 #define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1d8 0x4ec 0x004 0x0 0xff0d0100
#define MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1d8 0x4ec 0x000 0x1 0x0 #define MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1d8 0x4ec 0x000 0x1 0x0
#define MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK 0x1d8 0x4ec 0x864 0x2 0x0 #define MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK 0x1d8 0x4ec 0x864 0x2 0x0
#define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1d8 0x4ec 0x914 0x3 0x1 #define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1d8 0x4ec 0x914 0x3 0x1
@@ -654,7 +654,7 @@
#define MX6QDL_PAD_GPIO_1__ESAI_RX_CLK 0x224 0x5f4 0x86c 0x0 0x1 #define MX6QDL_PAD_GPIO_1__ESAI_RX_CLK 0x224 0x5f4 0x86c 0x0 0x1
#define MX6QDL_PAD_GPIO_1__WDOG2_B 0x224 0x5f4 0x000 0x1 0x0 #define MX6QDL_PAD_GPIO_1__WDOG2_B 0x224 0x5f4 0x000 0x1 0x0
#define MX6QDL_PAD_GPIO_1__KEY_ROW5 0x224 0x5f4 0x8f4 0x2 0x0 #define MX6QDL_PAD_GPIO_1__KEY_ROW5 0x224 0x5f4 0x8f4 0x2 0x0
#define MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x224 0x5f4 0x000 0x3 0x0 #define MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x224 0x5f4 0x004 0x3 0xff0d0101
#define MX6QDL_PAD_GPIO_1__PWM2_OUT 0x224 0x5f4 0x000 0x4 0x0 #define MX6QDL_PAD_GPIO_1__PWM2_OUT 0x224 0x5f4 0x000 0x4 0x0
#define MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x224 0x5f4 0x000 0x5 0x0 #define MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x224 0x5f4 0x000 0x5 0x0
#define MX6QDL_PAD_GPIO_1__SD1_CD_B 0x224 0x5f4 0x000 0x6 0x0 #define MX6QDL_PAD_GPIO_1__SD1_CD_B 0x224 0x5f4 0x000 0x6 0x0

View File

@@ -65,8 +65,10 @@
}; };
}; };
&sata { &audmux {
status = "okay"; status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_1>;
}; };
&ecspi1 { &ecspi1 {
@@ -83,11 +85,29 @@
}; };
}; };
&ssi1 { &fec {
fsl,mode = "i2s-slave"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_1>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
status = "okay"; status = "okay";
}; };
&i2c1 {
status = "okay";
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_1>;
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks 201>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
};
};
&iomuxc { &iomuxc {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>; pinctrl-0 = <&pinctrl_hog>;
@@ -103,11 +123,56 @@
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
>; >;
}; };
}; };
}; };
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&sata {
status = "okay";
};
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_1>;
};
&usbh1 {
status = "okay";
};
&usbotg { &usbotg {
vbus-supply = <&reg_usb_otg_vbus>; vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default"; pinctrl-names = "default";
@@ -116,18 +181,6 @@
status = "okay"; status = "okay";
}; };
&usbh1 {
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_1>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
status = "okay";
};
&usdhc3 { &usdhc3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3_2>; pinctrl-0 = <&pinctrl_usdhc3_2>;
@@ -145,30 +198,3 @@
vmmc-supply = <&reg_3p3v>; vmmc-supply = <&reg_3p3v>;
status = "okay"; status = "okay";
}; };
&audmux {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_1>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_1>;
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_1>;
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks 201>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
};
};

View File

@@ -0,0 +1,39 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6q.dtsi"
/ {
model = "Udoo i.MX6 Quad Board";
compatible = "udoo,imx6q-udoo", "fsl,imx6q";
memory {
reg = <0x10000000 0x40000000>;
};
};
&sata {
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_1>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3_2>;
non-removable;
status = "okay";
};

View File

@@ -54,6 +54,7 @@
fsl,pins = < fsl,pins = <
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000
MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059
>; >;
}; };
}; };
@@ -74,8 +75,10 @@
}; };
&usdhc3 { &usdhc3 {
pinctrl-names = "default"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3_1>; pinctrl-0 = <&pinctrl_usdhc3_1>;
pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
cd-gpios = <&gpio6 15 0>; cd-gpios = <&gpio6 15 0>;
wp-gpios = <&gpio1 13 0>; wp-gpios = <&gpio1 13 0>;
status = "okay"; status = "okay";

View File

@@ -80,6 +80,14 @@
mux-int-port = <2>; mux-int-port = <2>;
mux-ext-port = <3>; mux-ext-port = <3>;
}; };
backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
status = "okay";
};
}; };
&audmux { &audmux {
@@ -108,6 +116,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_1>; pinctrl-0 = <&pinctrl_enet_1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 25 0>;
status = "okay"; status = "okay";
}; };
@@ -172,6 +181,7 @@
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
>; >;
}; };
}; };
@@ -202,6 +212,12 @@
}; };
}; };
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_1>;
status = "okay";
};
&ssi2 { &ssi2 {
fsl,mode = "i2s-slave"; fsl,mode = "i2s-slave";
status = "okay"; status = "okay";
@@ -229,6 +245,7 @@
&usdhc2 { &usdhc2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2_1>; pinctrl-0 = <&pinctrl_usdhc2_1>;
bus-width = <8>;
cd-gpios = <&gpio2 2 0>; cd-gpios = <&gpio2 2 0>;
wp-gpios = <&gpio2 3 0>; wp-gpios = <&gpio2 3 0>;
status = "okay"; status = "okay";
@@ -237,6 +254,7 @@
&usdhc3 { &usdhc3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3_1>; pinctrl-0 = <&pinctrl_usdhc3_1>;
bus-width = <8>;
cd-gpios = <&gpio2 0 0>; cd-gpios = <&gpio2 0 0>;
wp-gpios = <&gpio2 1 0>; wp-gpios = <&gpio2 1 0>;
status = "okay"; status = "okay";

View File

@@ -43,6 +43,13 @@
mux-int-port = <1>; mux-int-port = <1>;
mux-ext-port = <3>; mux-ext-port = <3>;
}; };
sound-spdif {
compatible = "fsl,imx-audio-spdif";
model = "imx-spdif";
spdif-controller = <&spdif>;
spdif-out;
};
}; };
&audmux { &audmux {
@@ -81,6 +88,7 @@
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
>; >;
}; };
}; };
@@ -90,6 +98,13 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_1>; pinctrl-0 = <&pinctrl_enet_1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 29 0>;
status = "okay";
};
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spdif_3>;
status = "okay"; status = "okay";
}; };
@@ -115,6 +130,14 @@
status = "okay"; status = "okay";
}; };
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg_1>;
disable-over-current;
dr_mode = "peripheral";
status = "okay";
};
&usdhc1 { &usdhc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1_2>; pinctrl-0 = <&pinctrl_usdhc1_2>;

View File

@@ -116,6 +116,22 @@
arm,data-latency = <4 2 3>; arm,data-latency = <4 2 3>;
}; };
pcie: pcie@0x01000000 {
compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
reg = <0x01ffc000 0x4000>; /* DBI */
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>;
interrupts = <0 123 0x04>;
clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
status = "disabled";
};
pmu { pmu {
compatible = "arm,cortex-a9-pmu"; compatible = "arm,cortex-a9-pmu";
interrupts = <0 94 0x04>; interrupts = <0 94 0x04>;
@@ -136,8 +152,23 @@
ranges; ranges;
spdif: spdif@02004000 { spdif: spdif@02004000 {
compatible = "fsl,imx35-spdif";
reg = <0x02004000 0x4000>; reg = <0x02004000 0x4000>;
interrupts = <0 52 0x04>; interrupts = <0 52 0x04>;
dmas = <&sdma 14 18 0>,
<&sdma 15 18 0>;
dma-names = "rx", "tx";
clocks = <&clks 197>, <&clks 3>,
<&clks 197>, <&clks 107>,
<&clks 0>, <&clks 118>,
<&clks 62>, <&clks 139>,
<&clks 0>;
clock-names = "core", "rxtx0",
"rxtx1", "rxtx2",
"rxtx3", "rxtx4",
"rxtx5", "rxtx6",
"rxtx7";
status = "disabled";
}; };
ecspi1: ecspi@02008000 { ecspi1: ecspi@02008000 {
@@ -1010,6 +1041,12 @@
MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
>; >;
}; };
pinctrl_spdif_3: spdifgrp-3 {
fsl,pins = <
MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
>;
};
}; };
uart1 { uart1 {
@@ -1184,6 +1221,36 @@
>; >;
}; };
pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz { /* 100Mhz */
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
>;
};
pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz { /* 200Mhz */
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
>;
};
pinctrl_usdhc3_2: usdhc3grp-2 { pinctrl_usdhc3_2: usdhc3grp-2 {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059

View File

@@ -17,6 +17,44 @@
memory { memory {
reg = <0x80000000 0x40000000>; reg = <0x80000000 0x40000000>;
}; };
regulators {
compatible = "simple-bus";
reg_usb_otg1_vbus: usb_otg1_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 0 0>;
enable-active-high;
};
reg_usb_otg2_vbus: usb_otg2_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 2 0>;
enable-active-high;
};
};
};
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 11 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
status = "okay";
flash: m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32";
spi-max-frequency = <20000000>;
reg = <0>;
};
}; };
&fec { &fec {
@@ -38,6 +76,8 @@
MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
>; >;
}; };
}; };
@@ -49,9 +89,26 @@
status = "okay"; status = "okay";
}; };
&usdhc1 { &usbotg1 {
vbus-supply = <&reg_usb_otg1_vbus>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1_1>;
disable-over-current;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usb_otg2_vbus>;
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1_1>; pinctrl-0 = <&pinctrl_usdhc1_1>;
pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
bus-width = <8>; bus-width = <8>;
cd-gpios = <&gpio4 7 0>; cd-gpios = <&gpio4 7 0>;
wp-gpios = <&gpio4 6 0>; wp-gpios = <&gpio4 6 0>;
@@ -59,16 +116,20 @@
}; };
&usdhc2 { &usdhc2 {
pinctrl-names = "default"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2_1>; pinctrl-0 = <&pinctrl_usdhc2_1>;
pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
cd-gpios = <&gpio5 0 0>; cd-gpios = <&gpio5 0 0>;
wp-gpios = <&gpio4 29 0>; wp-gpios = <&gpio4 29 0>;
status = "okay"; status = "okay";
}; };
&usdhc3 { &usdhc3 {
pinctrl-names = "default"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3_1>; pinctrl-0 = <&pinctrl_usdhc3_1>;
pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
cd-gpios = <&gpio3 22 0>; cd-gpios = <&gpio3 22 0>;
status = "okay"; status = "okay";
}; };

View File

@@ -13,16 +13,20 @@
/ { / {
aliases { aliases {
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
gpio0 = &gpio1; gpio0 = &gpio1;
gpio1 = &gpio2; gpio1 = &gpio2;
gpio2 = &gpio3; gpio2 = &gpio3;
gpio3 = &gpio4; gpio3 = &gpio4;
gpio4 = &gpio5; gpio4 = &gpio5;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
spi0 = &ecspi1;
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
}; };
cpus { cpus {
@@ -530,10 +534,26 @@
interrupts = <0 89 0x04>; interrupts = <0 89 0x04>;
}; };
gpr: iomuxc-gpr@020e0000 {
compatible = "fsl,imx6sl-iomuxc-gpr",
"fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x020e0000 0x38>;
};
iomuxc: iomuxc@020e0000 { iomuxc: iomuxc@020e0000 {
compatible = "fsl,imx6sl-iomuxc"; compatible = "fsl,imx6sl-iomuxc";
reg = <0x020e0000 0x4000>; reg = <0x020e0000 0x4000>;
ecspi1 {
pinctrl_ecspi1_1: ecspi1grp-1 {
fsl,pins = <
MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
>;
};
};
fec { fec {
pinctrl_fec_1: fecgrp-1 { pinctrl_fec_1: fecgrp-1 {
fsl,pins = < fsl,pins = <
@@ -559,6 +579,64 @@
}; };
}; };
usbotg1 {
pinctrl_usbotg1_1: usbotg1grp-1 {
fsl,pins = <
MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
>;
};
pinctrl_usbotg1_2: usbotg1grp-2 {
fsl,pins = <
MX6SL_PAD_FEC_RXD0__USB_OTG1_ID 0x17059
>;
};
pinctrl_usbotg1_3: usbotg1grp-3 {
fsl,pins = <
MX6SL_PAD_LCD_DAT1__USB_OTG1_ID 0x17059
>;
};
pinctrl_usbotg1_4: usbotg1grp-4 {
fsl,pins = <
MX6SL_PAD_REF_CLK_32K__USB_OTG1_ID 0x17059
>;
};
pinctrl_usbotg1_5: usbotg1grp-5 {
fsl,pins = <
MX6SL_PAD_SD3_DAT0__USB_OTG1_ID 0x17059
>;
};
};
usbotg2 {
pinctrl_usbotg2_1: usbotg2grp-1 {
fsl,pins = <
MX6SL_PAD_ECSPI1_SCLK__USB_OTG2_OC 0x17059
>;
};
pinctrl_usbotg2_2: usbotg2grp-2 {
fsl,pins = <
MX6SL_PAD_ECSPI2_SCLK__USB_OTG2_OC 0x17059
>;
};
pinctrl_usbotg2_3: usbotg2grp-3 {
fsl,pins = <
MX6SL_PAD_KEY_ROW5__USB_OTG2_OC 0x17059
>;
};
pinctrl_usbotg2_4: usbotg2grp-4 {
fsl,pins = <
MX6SL_PAD_SD3_DAT2__USB_OTG2_OC 0x17059
>;
};
};
usdhc1 { usdhc1 {
pinctrl_usdhc1_1: usdhc1grp-1 { pinctrl_usdhc1_1: usdhc1grp-1 {
fsl,pins = < fsl,pins = <
@@ -574,6 +652,38 @@
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
>; >;
}; };
pinctrl_usdhc1_1_100mhz: usdhc1grp-1-100mhz {
fsl,pins = <
MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
>;
};
pinctrl_usdhc1_1_200mhz: usdhc1grp-1-200mhz {
fsl,pins = <
MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
>;
};
}; };
usdhc2 { usdhc2 {
@@ -587,6 +697,29 @@
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>; >;
}; };
pinctrl_usdhc2_1_100mhz: usdhc2grp-1-100mhz {
fsl,pins = <
MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
>;
};
pinctrl_usdhc2_1_200mhz: usdhc2grp-1-200mhz {
fsl,pins = <
MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
>;
};
}; };
usdhc3 { usdhc3 {
@@ -600,6 +733,28 @@
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>; >;
}; };
pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz {
fsl,pins = <
MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
>;
};
pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz {
fsl,pins = <
MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
>;
};
}; };
}; };
@@ -621,7 +776,8 @@
<&clks IMX6SL_CLK_SDMA>; <&clks IMX6SL_CLK_SDMA>;
clock-names = "ipg", "ahb"; clock-names = "ipg", "ahb";
#dma-cells = <3>; #dma-cells = <3>;
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6sl.bin"; /* imx6sl reuses imx6q sdma firmware */
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
}; };
pxp: pxp@020f0000 { pxp: pxp@020f0000 {
@@ -665,7 +821,7 @@
usbotg2: usb@02184200 { usbotg2: usb@02184200 {
compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
reg = <0x02184200 0x200>; reg = <0x02184200 0x200>;
interrupts = <0 40 0x04>; interrupts = <0 42 0x04>;
clocks = <&clks IMX6SL_CLK_USBOH3>; clocks = <&clks IMX6SL_CLK_USBOH3>;
fsl,usbphy = <&usbphy2>; fsl,usbphy = <&usbphy2>;
fsl,usbmisc = <&usbmisc 1>; fsl,usbmisc = <&usbmisc 1>;
@@ -675,7 +831,7 @@
usbh: usb@02184400 { usbh: usb@02184400 {
compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
reg = <0x02184400 0x200>; reg = <0x02184400 0x200>;
interrupts = <0 42 0x04>; interrupts = <0 40 0x04>;
clocks = <&clks IMX6SL_CLK_USBOH3>; clocks = <&clks IMX6SL_CLK_USBOH3>;
fsl,usbmisc = <&usbmisc 2>; fsl,usbmisc = <&usbmisc 2>;
status = "disabled"; status = "disabled";

View File

@@ -19,7 +19,6 @@
compatible = "marvell,db-88f6281-bp", "marvell,kirkwood-88f6281", "marvell,kirkwood"; compatible = "marvell,db-88f6281-bp", "marvell,kirkwood-88f6281", "marvell,kirkwood";
mbus { mbus {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";

View File

@@ -19,7 +19,6 @@
compatible = "marvell,db-88f6282-bp", "marvell,kirkwood-88f6282", "marvell,kirkwood"; compatible = "marvell,db-88f6282-bp", "marvell,kirkwood-88f6282", "marvell,kirkwood";
mbus { mbus {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";

View File

@@ -39,28 +39,6 @@
status = "ok"; status = "ok";
}; };
nand@3000000 {
pinctrl-0 = <&pmx_nand>;
pinctrl-names = "default";
chip-delay = <25>;
status = "okay";
partition@0 {
label = "uboot";
reg = <0x0 0x100000>;
};
partition@100000 {
label = "uImage";
reg = <0x100000 0x400000>;
};
partition@500000 {
label = "root";
reg = <0x500000 0x1fb00000>;
};
};
sata@80000 { sata@80000 {
nr-ports = <2>; nr-ports = <2>;
status = "okay"; status = "okay";
@@ -80,6 +58,28 @@
}; };
}; };
&nand {
pinctrl-0 = <&pmx_nand>;
pinctrl-names = "default";
chip-delay = <25>;
status = "okay";
partition@0 {
label = "uboot";
reg = <0x0 0x100000>;
};
partition@100000 {
label = "uImage";
reg = <0x100000 0x400000>;
};
partition@500000 {
label = "root";
reg = <0x500000 0x1fb00000>;
};
};
&mdio { &mdio {
status = "okay"; status = "okay";

View File

@@ -148,44 +148,6 @@
status = "okay"; status = "okay";
nr-ports = <2>; nr-ports = <2>;
}; };
nand@3000000 {
pinctrl-0 = <&pmx_nand>;
pinctrl-names = "default";
status = "okay";
chip-delay = <35>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x100000>;
read-only;
};
partition@100000 {
label = "uImage";
reg = <0x0100000 0x500000>;
};
partition@600000 {
label = "ramdisk";
reg = <0x0600000 0x500000>;
};
partition@b00000 {
label = "image";
reg = <0x0b00000 0x6600000>;
};
partition@7100000 {
label = "mini firmware";
reg = <0x7100000 0xa00000>;
};
partition@7b00000 {
label = "config";
reg = <0x7b00000 0x500000>;
};
};
}; };
regulators { regulators {
@@ -220,6 +182,44 @@
}; };
}; };
&nand {
pinctrl-0 = <&pmx_nand>;
pinctrl-names = "default";
status = "okay";
chip-delay = <35>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x100000>;
read-only;
};
partition@100000 {
label = "uImage";
reg = <0x0100000 0x500000>;
};
partition@600000 {
label = "ramdisk";
reg = <0x0600000 0x500000>;
};
partition@b00000 {
label = "image";
reg = <0x0b00000 0x6600000>;
};
partition@7100000 {
label = "mini firmware";
reg = <0x7100000 0xa00000>;
};
partition@7b00000 {
label = "config";
reg = <0x7b00000 0x500000>;
};
};
&mdio { &mdio {
status = "okay"; status = "okay";

View File

@@ -34,26 +34,6 @@
serial@12000 { serial@12000 {
status = "ok"; status = "ok";
}; };
nand@3000000 {
status = "okay";
partition@0 {
label = "u-boot";
reg = <0x0000000 0x100000>;
read-only;
};
partition@100000 {
label = "uImage";
reg = <0x0100000 0x400000>;
};
partition@500000 {
label = "data";
reg = <0x0500000 0xfb00000>;
};
};
}; };
gpio-leds { gpio-leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
@@ -91,6 +71,26 @@
}; };
}; };
&nand {
status = "okay";
partition@0 {
label = "u-boot";
reg = <0x0000000 0x100000>;
read-only;
};
partition@100000 {
label = "uImage";
reg = <0x0100000 0x400000>;
};
partition@500000 {
label = "data";
reg = <0x0500000 0xfb00000>;
};
};
&mdio { &mdio {
status = "okay"; status = "okay";

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