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[MIPS] Use the proper technical term for naming some of the cache macros.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle
2006-07-06 13:04:01 +01:00
parent 879ba8c88a
commit fc5d2d279f
12 changed files with 18 additions and 18 deletions
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include/asm-mips/cpu.h
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@ -242,7 +242,7 @@
#define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */
#define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */
#define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */
#define MIPS_CPU_SUBSET_CACHES 0x00040000 /* P-cache subset enforced */
#define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */
#define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */
#define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */
#define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */