ath9k_hw: remove ar9287 v1.3+ specific hardcoded register hacks
Now that the clock rate is initialized properly and SIFS, EIFS, USEC, slot time and ACK timeout are properly calculated by the generic code, the 'async FIFO' register hacks are no longer necessary. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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committed by
John W. Linville
parent
b6ba41bb27
commit
fe2b6afbce
@@ -1631,9 +1631,13 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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ath9k_hw_init_global_settings(ah);
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if (!AR_SREV_9300_20_OR_LATER(ah)) {
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ar9002_hw_update_async_fifo(ah);
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ar9002_hw_enable_wep_aggregation(ah);
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if (AR_SREV_9287(ah) && AR_SREV_9287_13_OR_LATER(ah)) {
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REG_SET_BIT(ah, AR_MAC_PCU_LOGIC_ANALYZER,
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AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768);
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REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN,
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AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL);
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REG_SET_BIT(ah, AR_PCU_MISC_MODE2,
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AR_PCU_MISC_MODE2_ENABLE_AGGWEP);
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}
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REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
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