Fixed buglet with previous patch that broke non au1x builds.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
@@ -57,7 +57,7 @@ unsigned long missed_heart_beats = 0;
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static unsigned long r4k_offset; /* Amount to increment compare reg each time */
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static unsigned long r4k_offset; /* Amount to increment compare reg each time */
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static unsigned long r4k_cur; /* What counter should be at next timer irq */
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static unsigned long r4k_cur; /* What counter should be at next timer irq */
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int no_au1xxx_32khz;
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int no_au1xxx_32khz;
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int allow_au1k_wait = 0; /* default off for CP0 Counter */
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extern int allow_au1k_wait; /* default off for CP0 Counter */
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/* Cycle counter value at the previous timer interrupt.. */
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/* Cycle counter value at the previous timer interrupt.. */
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static unsigned int timerhi = 0, timerlo = 0;
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static unsigned int timerhi = 0, timerlo = 0;
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@@ -53,9 +53,10 @@ static void r4k_wait(void)
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/* The Au1xxx wait is available only if using 32khz counter or
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/* The Au1xxx wait is available only if using 32khz counter or
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* external timer source, but specifically not CP0 Counter. */
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* external timer source, but specifically not CP0 Counter. */
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int allow_au1k_wait;
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static void au1k_wait(void)
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static void au1k_wait(void)
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{
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{
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unsigned long addr;
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unsigned long addr = 0;
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/* using the wait instruction makes CP0 counter unusable */
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/* using the wait instruction makes CP0 counter unusable */
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__asm__("la %0,au1k_wait\n\t"
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__asm__("la %0,au1k_wait\n\t"
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".set mips3\n\t"
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".set mips3\n\t"
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@@ -113,14 +114,11 @@ static inline void check_wait(void)
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case CPU_AU1500:
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case CPU_AU1500:
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case CPU_AU1550:
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case CPU_AU1550:
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case CPU_AU1200:
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case CPU_AU1200:
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{
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if (allow_au1k_wait) {
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extern int allow_au1k_wait; /* au1000/common/time.c */
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cpu_wait = au1k_wait;
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if (allow_au1k_wait) {
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printk(" available.\n");
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cpu_wait = au1k_wait;
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} else
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printk(" available.\n");
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printk(" unavailable.\n");
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} else
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printk(" unavailable.\n");
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}
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break;
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break;
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default:
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default:
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printk(" unavailable.\n");
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printk(" unavailable.\n");
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