Commit Graph

15 Commits

Author SHA1 Message Date
Timothy Clacy
866bd43581 [ARM] pxa: enable GPIO receivers after configuring pins
'mach-pxa' platforms currently rely on a bootloader to setup GPIO pins
and clear RDH (to enable inputs).

A kernel loaded by a 'minimal' bootloader, that doesn't touch any pins,
will not function correctly; inputs will remain disabled, even after the
pins are configured. The following change fixes the issue and has been
verified on Gumstix Verdex XL6P and a custom PXA270 platform.

Signed-off-by: Timothy Clacy <tcl@phaseone.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-05-18 21:52:09 +08:00
Daniel Ribeiro
818bc81444 [ARM] pxa: save/restore PGSR on suspend/resume.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-05-18 21:52:08 +08:00
Eric Miao
0807da5938 [ARM] pxa: access GPIO registers by chip so to make it further generic
Let's handle GPIOs by banks, each bank covers up to 32 GPIOs with one set
of registers, and each set of registers start from different offsets.

           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
 BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
 BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
 BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050

 BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
 BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
 BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150

 NOTE:
   BANK 3 is only available on PXA27x and later processors.
   BANK 4 and 5 are only available on PXA935

1. introduce GPIO_BANK(n) for the offset base of each bank

2. 'struct pxa_gpio_chip' is expanded to include IRQ edge and mask
   setings, and saved register values as well, and is dynamically
   allocated due to possible bank number ranging from 3 to 6

3. all accesses to GPIO registers are made through 'regbase' within
   'pxa_gpio_chip', and register offset

4. introduce several inline functions to simplify the code a bit

5. change IRQ demux handler to base on gpio chips

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-03-09 21:22:38 +08:00
Eric Miao
da065a0b36 [ARM] pxa: move GPIO register definitions into <mach/gpio.h>
This makes gpio.c fully independent of pxa-regs.h (except for the
virtual address of the registers).

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-03-09 21:22:37 +08:00
Eric Miao
067455aa53 [ARM] pxa: add support for additional GPIOs on PXA26x
Original patch from Marek Vasut, the problems with PXA26x are:

1. there are additional 4 GPIOs 86,87,88,89 have their direction bits
   inverted in GPDR2, as well as their alternate function bits being
   '1' for their GPIO functionality in GAFRx

2. there is no easy way to decide if the processor is a pxa26x or a
   pxa250/pxa255 at run-time, so the assumption here is the pxa26x
   will be treated as one of the pxa25x variants, and board code
   should have a better knowledge of the processor it is featured

Introduce pxa26x_init_irq() for the second purpose, and treat the
additional GPIOs > 85 on PXA25x specially.

Kconfig option CONFIG_CPU_PXA26x is introduced to optimize the code
a bit when PXA26x support isn't needed. Board config options have
to select this to enable the support for PXA26x.

__gpio_is_inverted() will be optimized way when CONFIG_CPU_PXA26x
isn't selected.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2008-12-02 14:42:37 +08:00
Eric Miao
ddd244dd81 [ARM] pxa: use 'pxa_last_gpio' instead of 'gpio_nr' in mfp-pxa2xx.c
The 'gpio_nr' can really be inferred by 'pxa_last_gpio', and since we
already have that variable, remove the unnecessary 'gpio_nr' now.

Also, fix the incorrect GPIO number passed in pxa27x_init_irq().

Note: pxa_last_gpio should be initialized earlier, and this is true
since it's been assigned in machine_desc->init_irq().

Signed-off-by: Eric Miao <eric.miao@marvell.com>
2008-12-02 14:42:36 +08:00
Robert Jarzmik
9968711468 [ARM] pxa: add muxed gpio wakeup sources on pxa2xx architectures
PXA SoC have several GPIOs muxed on only one wakeup source.
Add support for these wakeup sources which were missing
in mfp core support.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2008-12-02 14:42:36 +08:00
Eric Miao
e7f3c60037 [ARM] pxa: fix incorrect initialization of mfp sysdev when not pxa2xx
The initialization of mfp sysdev in pxa2xx_mfp_init() shall really be
avoided when !cpu_is_pxa2xx().

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-07 19:12:55 +01:00
Eric Miao
5a3d965190 [ARM] pxa: better MFP low power state support for pxa25x/pxa27x
When configured as a specific low power state: MFP_LPM_DRIVE_LOW,
MFP_LPM_DRIVE_HIGH, the corresponding GPDR register bit during
low power mode shall be re-configured as output (if they are not
configured so), thus the PGSRx bits can output.

Create an additional low power values GPDR registers, and properly
save/restore the GAFR + GPDR registers when doing suspend/resume.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-26 23:43:20 +01:00
Russell King
a09e64fbc0 [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:55:48 +01:00
Eric Miao
566b450c33 [ARM] pxa: add pxa2xx_mfp_set_lpm() to facilitate low power state change
Some boards want to change low power state of pins on-the-fly, this
function helps to facilitate that operation instead of switching
back-n-forth between two configurations with pxa2xx_mfp_config().

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:38:32 +01:00
Eric Miao
0fedb0cad6 [ARM] pxa: introduce dedicated __mfp_validate() to check PXA2xx MFP
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:38:32 +01:00
Russell King
0b0a9df603 [ARM] pxa: separate out power manager and clock registers
The power manager and core clock registers aren't present in PXA3
CPUs.  Move them out of pxa-regs.h into pxa2xx-regs.h, and include
pxa2xx-regs.h where necessary.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 19:33:27 +01:00
eric miao
c0a596d6a1 [ARM] pxa: allow dynamic enable/disable of GPIO wakeup for pxa{25x,27x}
Changes include:

1. rename MFP_LPM_WAKEUP_ENABLE into MFP_LPM_CAN_WAKEUP to indicate
   the board capability of this pin to wakeup the system

2. add gpio_set_wake() and keypad_set_wake() to allow dynamically
   enable/disable wakeup from GPIOs and keypad GPIO

   * these functions are currently kept in mfp-pxa2xx.c due to their
     dependency to the MFP configuration

3. pxa2xx_mfp_config() only gives early warning if MFP_LPM_CAN_WAKEUP
   is set on incorrect pins

So that the GPIO's wakeup capability is now decided by the following:

   a) processor's capability: (only those GPIOs which have dedicated
      bits within PWER/PRER/PFER can wakeup the system), this is
      initialized by pxa{25x,27x}_init_mfp()

   b) board design decides:
      - whether the pin is designed to wakeup the system (some of
        the GPIOs are configured as other functions, which is not
        intended to be a wakeup source), by OR'ing the pin config
        with MFP_LPM_CAN_WAKEUP

      - which edge the pin is designed to wakeup the system, this
        may depends on external peripherals/connections, which is
        totally board specific; this is indicated by MFP_LPM_EDGE_*

   c) the corresponding device's (most likely the gpio_keys.c) wakeup
      attribute:

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:05 +01:00
eric miao
7facc2f937 [ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs.  A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.

A pin configuration on pxa{25x,27x} is composed of:

    - alternate function selection (or pin mux as commonly called)
    - low power state or sleep state
    - wakeup enabling from low power mode

The following MFP_xxx bit definitions in mfp.h are re-used:

    - MFP_PIN(x)
    - MFP_AFx
    - MFP_LPM_DRIVE_{LOW, HIGH}
    - MFP_LPM_EDGE_*

Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:

    - MFP_CFG_IN  : for input alternate functions
    - MFP_CFG_OUT : for output alternate functions

Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT().  As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.

Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output.  The actual
direction of the GPIO is configured by gpio_direction_{input, output}

Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.

E.g.  invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:

    enable_irq_wake( gpio_to_irq(35) );

To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).

Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:

    - MFP_LPM_WAKEUP_ENABLE

The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:

    - WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
    - WAKEUP_ON_LEVEL_HIGH

The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.

These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.

The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:04 +01:00