make the ECHI depends on ARCH_AT91
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
Use a string to specific the wakeup mode to make it more readable.
Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.
Drop ioremap_registers() for sam9x5 too.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This is need for multiple SoC in the same kernel image and DT.
As we will chose the restart function via binding.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Specified the main Oscillator via clock binding.
This will allow to do not hardcode it anymore in the DT board at 12MHz.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This will allow to have static Device mapping and DT probe mapping for the
System Controller.
Temporary keep the call to ioremap_registers() until we have the binding
for the SDRAM/DDR Controller.
Temporary keep the main clock hardcoded to 12MHz until we have the binding
for the PMC.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Use a local copy of board informatin and fill with DT data.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
So we can now choose for the board the ecc mode (ecc soft, soft bch, no ecc
and hardware).
Set ecc mode in the boards to soft as currently in the driver.
Move platform data to a common header
include/linux/platform_data/atmel_nand.h
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: David Woodhouse <dwmw2@infradead.org>
* 'at91-3.4-cleanup2+DT' of git://github.com/at91linux/linux-at91: (22 commits)
ARM: at91: at91sam9x5cm/dt: add leds support
ARM: at91: usb_a9g20/dt: add gpio-keys support
ARM: at91: at91sam9m10g45ek/dt: add gpio-keys support
ARM: at91: at91sam9m10g45ek/dt: add leds support
ARM: at91: usb_a9g20/dt: add leds support
ARM: at91/pio: add new PIO3 features
ARM: at91: add sam9_smc.o to at91sam9x5 build
ARM: at91/tc/clocksource: Add 32 bit variant to Timer Counter
ARM: at91/tc: add device tree support to atmel_tclib
ARM: at91/tclib: take iomem size from resource
ARM: at91/pit: add traces in case of error
ARM: at91: pit add DT support
ARM: at91: AIC and GPIO IRQ device tree initialization
ARM: at91/board-dt: remove AIC irq domain from board file
ARM: at91/gpio: remove the static specification of gpio_chip.base
ARM: at91/gpio: add .to_irq gpio_chip handler
ARM: at91/gpio: non-DT builds do not have gpio_chip.of_node field
ARM: at91/gpio: add irqdomain and DT support
ARM: at91/gpio: change comments and one variable name
ARM/USB: at91/ohci-at91: remove the use of irq_to_gpio
...
These two branches are a dependency for the at91 device tree changes,
so we pull them in here. at91/base2+cleanup will get merged through
the arm-soc cleanup2 branch, while the irqdomain tree will be sent
by Grant before this one gets integrated.
Conflicts:
drivers/rtc/rtc-at91sam9.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds the support for new PIO controller found on some
at91sam SOCs.
- more peripheral multiplexing
- more features to configure on a PIO (pull-down, Schmitt trigger, debouncer)
- support for several IRQ triggering features (type and polarity)
Support for those new features are retrieved from the device tree
compatibility string.
Debugfs at91_gpio file is updated to monitor configuration.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Device tree support added to atmel_tclib: the generic Timer Counter
library. This is used by the clocksource/clockevent driver tcb_clksrc.
The current DT enabled platforms are also modified to use it:
- .dtsi files are modified to add Timer Counter Block entries
- alias are created to allow identification of each block
- clkdev lookup tables are added for clocks identification.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Requesting iomem region and ioremaping is now done using
the resource size specified instead of a constant value.
Each <SoC>_device.c file is modified accordingly to reflect
actual user interface size.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Traces related to IRQ management are useful for timers in case of
non-working IRQ subsystem (switch to irq_domain for instance).
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Retreive registers address and IRQ from device tree entry.
Called from at91_dt_init_irq() so that timers are up-n-running
when timers initialization will occur.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: change error path and interrupts property handling]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Both AIC and GPIO controllers are now using the standard of_irq_init()
function to initialize IRQs in case of DT use.
The DT specific initialization functions are now separated from the
non-DT case and are now using "linear" irq domains.
The .map() irqdomain operation is responsible for positioning the IRQ
handlers. In AIC case, the Linux IRQ number is directly programmed in
the hardware to avoid an additional reverse mapping operation.
The AIC position its irq domain as the "default" irq domain.
For DT case, the priority is not yet filled in the SMR. It will be the
subject of another patch.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Adding of irqdomain in AIC code make the specification
of the irq domain in board file useless.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This value is determined at runtime using device tree or platform data
information.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Replace the gpio_to_irq() macro by a plain gpiolib .to_irq() handler.
This call is using the irqdomain to translate hardware to Linux
IRQ numbers.
The irq_to_gpio() macro is completely removed.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Protect build failure in case of non-DT configuration: the
gpio_chip structure does not have a of_node field in case of
!CONFIG_OF_GPIO.
Keep this in a separate patch as it can be reverted if the
field is added for both DT/non-DT cases.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Add "legacy" type of irqdomain to preserve old-style numbering
and allow smooth transition for both DT and non-DT cases.
Original idea and code by Jean-Christophe Plagniol-Villard.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
What was true only on at91sam9263 about the sharing of a single AIC
IRQ line for several GPIO banks is now used by several Atmel SoCs.
Change a variable name to allow better understanding while
introducing IRQ domains in following patches.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
gpio_to_irq() implementation will be moved from a macro to a
plain function: we cannot use it in a structure initialization
anymore.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
Add an irqdomain for the AIC interrupt controller.
The device tree support is mapping the registers and
is using the irq_domain_add_legacy() to manage hwirq
translation.
The documentation is describing the meaning of the
two cells required for using this "interrupt-controller"
in a device tree node.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 'vexpress-dt-v3.3-rc4' of git://git.linaro.org/people/pawelmoll/linux: (573 commits)
ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)
ARM: vexpress: Add Device Tree for V2P-CA9 core tile
ARM: vexpress: Add Device Tree for V2P-CA5s core tile
ARM: vexpress: Motherboard RS1 memory map support
ARM: vexpress: Add Device Tree support
ARM: vexpress: Use FDT data in platform SMP calls
ARM: versatile: Map local timers using Device Tree when possible
ARM: vexpress: Get rid of MMIO_P2V
This adds full device tree boot support for the versatile express
platform, as has been awaited for a long time.
Conflicts:
arch/arm/mach-vexpress/core.h
The definition of AMBA_DEVICE was removed in one branch, and the
definition of MMIO_P2V was removed in the other branch.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This default console mechanism is not used if the console is selected
by command line (console= parameter).
Dropping this will simplify the compilation of multiple SoC in the same
kernel image.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This variable spread on every SoC that is using the atmel_serial.c
driver can be included directly into the latter.
This will allow to compile multiple soc in the same kernel.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Cc: kernel@avr32linux.org
On at91sam9260 and at91sam9g20 the SRAM banks are mirrored. We can
merge them together to be able to have bigger and continuous
internal RAM.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Remove at91_sys_read/write() from io.h file. This function
is not used anymore and was a stopper on the way to single
zImage kernel for AT91.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The GPBR registers are used for storing RTC values. The GPBR registers
to use are now provided using standard resource entry. The array is
filled in SoC specific code.
rtc-at91sam9 RTT as RTC driver is modified to retrieve this information.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: rework resources assignment]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
For the RTT as RTC driver rtc-at91sam9, the platform_device structure
is filled during SoC initialization. This will allow to convert this
RTC driver as a standard platform driver.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
We move the assignment of values of register out of the
seq_printf() calls: It is obviously more readable.
Reported-by: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This will allow to have all SoC in one kernel image.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This cleanup is done to allow to have multiple SoC in the same image.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Change slow_clock()/at91_slow_clock() prototype to accept the PMC
base address and one or two RAM controller addresses by parameters.
The r0, r1 and r2 registers are used differently and preserved during
function call.
Those values are defined in pm.c and slow_clock() function is called
from there with its new parameters.
This will allow to have a soc independent pm_slowclock.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ached-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch will give a name to ARM registers in the assembly
source code. It is done to simplify the code reading and
the passing of parameters to functions.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Remove the unnecessary (void) cast on at91_st_read()
return value.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Ryan Mallon <rmallon@gmail.com>
Remove duplicated at91sam9xxxx_idle() functions introduced
by commit c9dfafb "ARM: mach-at91: move special idle code out of line".
Replace by a generic at91sam9_idle() function in setup.c common
location.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
