Save the current exception frame pointer in the thread_info struct rather than
in a global variable as the latter makes SMP tricky, especially when preemption
is also enabled.
This also replaces __frame with current_frame() and rearranges header file
inclusions to make it all compile.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Use an ELF HWCAP flag to indicate to the process that the CPU provides LL/SC
equivalent atomic operations unit support in addition to BSET/BCLR.
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: David Howells <dhowells@redhat.com>
The AM34 processor has an atomic operation that's the equivalent of LL/SC on
other architectures. However, rather than being done through a pair of
instructions, it's driven by writing to a pair of memory-mapped CPU control
registers.
One set of these registers (AARU/ADRU/ASRU) is available for use by userspace,
but for userspace to access them a PTE must be set up to cover the region.
This is done by dedicating the first vmalloc region page to this purpose,
setting the permissions on its PTE such that userspace can access the page.
glibc is hardcoded to expect the registers to be there.
The way atomic ops are done through these registers is straightforward:
(1) Write the address of the word you wish to access into AARU. This causes
the CPU to go and fetch that word and load it into ADRU. The status bits
are also cleared in ASRU.
(2) The current data value is read from the ADRU register and modified.
(3) To alter the data in RAM, the revised data is written back to the ADRU
register, which causes the CPU to attempt to write it back.
(4) The ASRU.RW flag (ASRU read watch), ASRU.LW flag (bus lock watch),
ASRU.IW (interrupt watch) and the ASRU.BW (bus error watch) flags then
must be checked to confirm that the operation wasn't aborted. If any of
the watches have been set to true, the operation was aborted.
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Implement the Panasonic MN10300 AM34 CPU subarch and implement SMP support for
MN10300. Also implement support for the MN2WS0060 processor and the ASB2364
evaluation board which are AM34 based.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Implement atomic ops using the atomic ops unit available in the AM34 CPU. This
allows the equivalent of the LL/SC instructions to be found on other CPUs.
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Make the FPU operate in non-lazy mode under SMP so that when the process that
is currently using the FPU migrates to a different CPU, we don't have to ping
its previous CPU to flush the FPU context.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Rename __flush_tlb*() to local_flush_tlb*() as it's more appropriate, and ready
to differentiate local from global TLB flushes when SMP is introduced.
Whilst we're at it, get rid of __flush_tlb_global() and make
local_flush_tlb_page() take an mm_struct pointer rather than VMA pointer.
Signed-off-by: David Howells <dhowells@redhat.com>
The AM34 CPU core provides an automated way of purging the cache rather than
manually iterating over all the tags in the cache. Make it possible to use
these.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Differentiate local cache flushing from global cache flushing so that they can
be done differently on SMP systems.
Rename the cache functions from:
mn10300_[id]cache_*()
to:
mn10300_[id]_localcache_*()
and on a UP system, assign the global labels to the local labels.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
The current cache flush and invalidate routines operate by controlling the
cache tag registers. Rename the files and add config items to select them.
This makes it easier to support the use of other cache flush methods instead,
such as the use of AM34's area purge registers, if available.
Signed-off-by: David Howells <dhowells@redhat.com>
Reorder asm/cacheflush.h to put arch primitives first, before the main
functions so that the main functions can be inline asm rather than #defines
when non-trivial.
Signed-off-by: David Howells <dhowells@redhat.com>
Provide a MN10300_CACHE_ENABLED config option as inverted logic of
MN10300_CACHE_DISABLED to make things simpler.
Signed-off-by: David Howells <dhowells@redhat.com>
Differentiate AM33_2 and AM33_3 CPU cores in configuration. The MN103E010
processor contains an AM33_2 core.
Whilst we're at it, prepare for AM34-based stuff by declaring AM34_2 too.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
The local_irq_disable() function and co. merely raise the interrupt mask on the
MN10300 arch to exclude normal interrupts. This still lets other, higher
priority maskable interrupts through, such as are used to service gdbstub's
serial port and the MN10300 on-chip serial port virtual FIFOs.
Provide functions to allow the maskable interrupts to be fully disabled, which
will exclude those interrupts.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Typedef the pointer to the function to be called by smp_call_function() and
friends:
typedef void (*smp_call_func_t)(void *info);
as it is used in a fair number of places.
Signed-off-by: David Howells <dhowells@redhat.com>
cc: linux-arch@vger.kernel.org
Prevent cnt32_to_63() from being preempted in sched_clock() because it may
read its internal counter, get preempted, get delayed for more than the half
period of the 'TSC' and then write the internal counter, thus corrupting it.
Whilst some callers of sched_clock() have interrupts disabled or hold
spinlocks, not all do, and so preemption must be held here.
Note that sched_clock() is called from lockdep, but that shouldn't be a problem
because although preempt_disable() calls into lockdep, lockdep has a recursion
counter to deal with this.
Signed-off-by: David Howells <dhowells@redhat.com>
Instead of open-coding pci_find_parent_resource and request_resource,
just call pci_claim_resource.
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Partially revert patch:
commit 3234282f33
Author: Jan Beulich <JBeulich@novell.com>
Date: Tue Oct 19 14:52:26 2010 +0100
x86, asm: Fix CFI macro invocations to deal with shortcomings in gas
This breaks MN10300 arch as this changes many instances of instructions
similar to the following:
MOV number,D0
which represents an immediate value load into:
MOV (number),D0
which the assembler then interprets as a load from absolute address.
arch/mn10300/kernel/entry.S:64: Error: Invalid opcode/operands
arch/mn10300/kernel/entry.S:65: Error: junk at end of line, first unrecognized character is `0'
arch/mn10300/kernel/entry.S:74: Error: Invalid opcode/operands
arch/mn10300/kernel/entry.S:74: Error: junk at end of line, first unrecognized character is `1'
arch/mn10300/kernel/entry.S:75: Error: Invalid opcode/operands
arch/mn10300/kernel/entry.S:76: Error: junk at end of line, first unrecognized character is `0'
cc: Jan Beulich <jbeulich@novell.com>
cc: Alexander van Heukelum <heukelum@fastmail.fm>
cc: H. Peter Anvin <hpa@linux.intel.com>
cc: Ingo Molnar <mingo@elte.hu>
Signed-off-by: David Howells <dhowells@redhat.com>
NULL-terminating pci_device_id in pch_dma.c and scx200_acb.c
for appying MODULE_DEVICE_TABLE (to publish modalias-es).
Signed-off-by: Dzianis Kahanovich <mahatma@eu.by>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Building with CONFIG_KALLSYMS=n gives following warning:
/mnt/src/linux-git/kernel/module.c: In function ‘post_relocation’:
/mnt/src/linux-git/kernel/module.c:2534:2: warning: passing argument 2 of ‘add_kallsyms’ discards qualifiers from pointer target type
/mnt/src/linux-git/kernel/module.c:2038:13: note: expected ‘struct load_info *’ but argument is of type ‘const struct load_info *’
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
There are two USB Audio Class specifications (v1 and v2), but neither of
them clearly defines the feedback format for high-speed UAC v1 devices.
Add to this whatever the Creative and M-Audio firmware writers have been
smoking, and it becomes impossible to predict the exact feedback format
used by a particular device.
Therefore, automatically detect the feedback format by looking at the
magnitude of the first received feedback value.
Also, this allows us to get rid of some special cases for E-Mu devices.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
