This patch modifies iommu address allocation order from 64k
to 4k. 64k order causes waste of the io space and this was
our mistakes.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Pull networking update from David Miller:
1) Checkpoint/restarted TCP sockets now can properly propagate the TCP
timestamp offset. From Andrey Vagin.
2) VMWARE VM VSOCK layer, from Andy King.
3) Much improved support for virtual functions and SR-IOV in bnx2x,
from Ariel ELior.
4) All protocols on ipv4 and ipv6 are now network namespace aware, and
all the compatability checks for initial-namespace-only protocols is
removed. Thanks to Tom Parkin for helping deal with the last major
holdout, L2TP.
5) IPV6 support in netpoll and network namespace support in pktgen,
from Cong Wang.
6) Multiple Registration Protocol (MRP) and Multiple VLAN Registration
Protocol (MVRP) support, from David Ward.
7) Compute packet lengths more accurately in the packet scheduler, from
Eric Dumazet.
8) Use per-task page fragment allocator in skb_append_datato_frags(),
also from Eric Dumazet.
9) Add support for connection tracking labels in netfilter, from
Florian Westphal.
10) Fix default multicast group joining on ipv6, and add anti-spoofing
checks to 6to4 and 6rd. From Hannes Frederic Sowa.
11) Make ipv4/ipv6 fragmentation memory limits more reasonable in modern
times, rearrange inet frag datastructures for better cacheline
locality, and move more operations outside of locking. From Jesper
Dangaard Brouer.
12) Instead of strict master <--> slave relationships, allow arbitrary
scenerios with "upper device lists". From Jiri Pirko.
13) Improve rate limiting accuracy in TBF and act_police, also from Jiri
Pirko.
14) Add a BPF filter netfilter match target, from Willem de Bruijn.
15) Orphan and delete a bunch of pre-historic networking drivers from
Paul Gortmaker.
16) Add TSO support for GRE tunnels, from Pravin B SHelar. Although
this still needs some minor bug fixing before it's %100 correct in
all cases.
17) Handle unresolved IPSEC states like ARP, with a resolution packet
queue. From Steffen Klassert.
18) Remove TCP Appropriate Byte Count support (ABC), from Stephen
Hemminger. This was long overdue.
19) Support SO_REUSEPORT, from Tom Herbert.
20) Allow locking a socket BPF filter, so that it cannot change after a
process drops capabilities.
21) Add VLAN filtering to bridge, from Vlad Yasevich.
22) Bring ipv6 on-par with ipv4 and do not cache neighbour entries in
the ipv6 routes, from YOSHIFUJI Hideaki.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1538 commits)
ipv6: fix race condition regarding dst->expires and dst->from.
net: fix a wrong assignment in skb_split()
ip_gre: remove an extra dst_release()
ppp: set qdisc_tx_busylock to avoid LOCKDEP splat
atl1c: restore buffer state
net: fix a build failure when !CONFIG_PROC_FS
net: ipv4: fix waring -Wunused-variable
net: proc: fix build failed when procfs is not configured
Revert "xen: netback: remove redundant xenvif_put"
net: move procfs code to net/core/net-procfs.c
qmi_wwan, cdc-ether: add ADU960S
bonding: set sysfs device_type to 'bond'
bonding: fix bond_release_all inconsistencies
b44: use netdev_alloc_skb_ip_align()
xen: netback: remove redundant xenvif_put
net: fec: Do a sanity check on the gpio number
ip_gre: propogate target device GSO capability to the tunnel device
ip_gre: allow CSUM capable devices to handle packets
bonding: Fix initialize after use for 3ad machine state spinlock
bonding: Fix race condition between bond_enslave() and bond_3ad_update_lacp_rate()
...
Pull sparc updates from David Miller:
"Mostly more sparc64 THP bug fixes, and a refactoring of SMP bootup on
sparc32 from Sam Ravnborg."
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
sparc32: refactor smp boot
sparc64: Fix huge PMD to PTE translation for sun4u in TLB miss handler.
sparc64: Fix tsb_grow() in atomic context.
sparc64: Handle hugepage TSB being NULL.
sparc64: Fix gfp_flags setting in tsb_grow().
Pull arm64 patches from Catalin Marinas:
- SMP support for the PSCI booting protocol (power state coordination
interface).
- Simple earlyprintk support.
- Platform devices populated by default from the DT (SoC-agnostic).
- CONTEXTIDR support (used by external trace tools).
* tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
arm64: mm: update CONTEXTIDR register to contain PID of current process
arm64: atomics: fix grossly inconsistent asm constraints for exclusives
arm64: compat: use compat_uptr_t type for compat_ucontext.uc_link
arm64: Select ARCH_WANT_FRAME_POINTERS
arm64: Add kvm_para.h and xor.h generic headers
arm64: SMP: enable PSCI boot method
arm64: psci: add support for PSCI invocations from the kernel
arm64: SMP: rework the SMP code to be enabling method agnostic
arm64: perf: add guest vs host discrimination
arm64: add COMPAT_PSR_*_BIT flags
arm64: Add simple earlyprintk support
arm64: Populate the platform devices
Pull ARM updates (part two) from Russell King:
- breakpoint and perf updates from Will Deacon.
- hypervisor boot mode updates from Will.
- support for Power State Coordination Interface via the Hypervisor
- core ARM support for KVM
* 'for-linus-2' of git://git.linaro.org/people/rmk/linux-arm: (32 commits)
KVM: ARM: Add maintainer entry for KVM/ARM
KVM: ARM: Power State Coordination Interface implementation
KVM: ARM: Handle I/O aborts
KVM: ARM: Handle guest faults in KVM
KVM: ARM: VFP userspace interface
KVM: ARM: Demux CCSIDR in the userspace API
KVM: ARM: User space API for getting/setting co-proc registers
KVM: ARM: Emulation framework and CP15 emulation
KVM: ARM: World-switch implementation
KVM: ARM: Inject IRQs and FIQs from userspace
KVM: ARM: Memory virtualization setup
KVM: ARM: Hypervisor initialization
KVM: ARM: Initial skeleton to compile KVM support
ARM: Section based HYP idmap
ARM: Add page table and page defines needed by KVM
ARM: perf: simplify __hw_perf_event_init err handling
ARM: perf: remove unnecessary checks for idx < 0
ARM: perf: handle armpmu_register failing
ARM: perf: don't pretend to support counting of L1I writes
ARM: perf: remove redundant NULL check on cpu_pmu
...
Pull ARM updates (part one) from Russell King:
- MMC patches from Ulf Hansson and Pawel Moll. These add support for
DDR mode and the latest variant found on ARM Versatile Express, as
well as a number of cleanups.
- A fix for to improve the behaviour of ARMs sched_clock()
- Changes to the ARM ioremap() code. I'm not convinced with the
primary arguments for this, but it's been around for a while, and
people seem happy with it - and the "other" justification for this is
at
http://lkml.org/lkml/2012/12/6/184
- Add SCHED_HRTICK to ARMs Kconfig
- Making the ARM SHA/AES code Thumb-2 compatible
- A collection of other small updates.
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (26 commits)
ARM: add SCHED_HRTICK config option
ARM: 7650/1: mm: replace direct access to mm->context.id with new macro
ARM: 7649/1: mm: mm->context.id fix for big-endian
ARM: 7648/1: pci: Allow passing per-controller private data
ARM: 7647/1: pci: Keep pci_common_init() around after init
ARM: fix warnings introduced by previous patch
ARM: 7646/1: mm: use static_vm for managing static mapped areas
ARM: 7645/1: ioremap: introduce an infrastructure for static mapped area
ARM: 7644/1: vmregion: remove vmregion code entirely
MAINTAINERS: Re-assert MMCI driver maintainer status
MAINTAINERS: add additional file for MMCI driver
MAINTAINERS: add maintainer entry for AMBA serial drivers
ARM: 7637/1: memory: use SZ_ constants for defining the virtual memory layout
ARM: 7643/1: sched: correct update_sched_clock()
ARM: 7635/1: versatile: fix the PCI IRQ regression
ARM: 7639/1: cache-l2x0: add missed dummy outer_resume entry
ARM: 7630/1: mmc: mmci: Fixup and cleanup code for DMA handling
ARM: 7632/1: spinlock: avoid exclusive accesses on unlock() path
ARM: 7631/1: mmc: mmci: Add new VE MMCI variant
ARM: 7623/1: mmc: mmci: Fixup clock gating when freq is 0 for ST-variants
...
Fix a smatch warning caused by an useless pointer check.
The context parameter (aka. ata_dev) will never be NULL until we remove
the acpi notification handler, so it is pointless to check it for NULL.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Aaron Lu <aaron.lu@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
When the user application sends a ATA_12 or ATA_16 PASSTHROUGH
scsi command, put the task file register in the sense data with the
proper Sense Key. Instead of NO SENSE, set RECOVERED, as
specified in [SAT2]12.2.5 Table 92.
Tested:
Using udev ata_id to generate a passthrough command, IDENTIFY:
before:
sd 0:0:0:0: [sda] CDB: ATA command pass through(12)/Blank: \
a1 08 2e 00 01 00 00 00 00 ec 00 00
sd 0:0:0:0: [sda] Sense Key : No Sense [current] [descriptor]
Descriptor sense data with sense descriptors (in hex):
72 00 00 00 00 00 00 0e 09 0c 00 00 00 00 00 3f
00 18 00 a6 e0 50
after
sd 0:0:0:0: [sda] CDB: ATA command pass through(12)/Blank: \
a1 08 2e 00 01 00 00 00 00 ec 00 00
sd 0:0:0:0: [sda] Sense Key : Recovered Error [current] [descriptor]
Descriptor sense data with sense descriptors (in hex):
72 01 00 1d 00 00 00 0e 09 0c 00 00 00 01 00 00
00 00 00 00 00 50
Signed-off-by: Gwendal Grignou <gwendal@google.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This patch adds the AHCI-mode SATA Device IDs for the Intel Wellsburg PCH
Signed-off-by: James Ralston <james.d.ralston@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This patch adds the IDE-mode SATA Device IDs for the Intel Wellsburg PCH
Signed-off-by: James Ralston <james.d.ralston@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Utilize the existing compat_sys_sendfile function for 64bit kernel and add
wrappers for sendfile and sendfile64 to correctly handle the 32/64 bit sign
extension.
Signed-off-by: Helge Deller <deller@gmx.de>
fallocate(off_t) gets redirected by glibc to fallocate64(loff_t)
where the 64bit loff_t values get splitted into two 32bit (hi/lo)
values. This patch fixes this syscall for the 32- and 64bit kernel.
Signed-off-by: Helge Deller <deller@gmx.de>
Switch over to use the existing compat_* implementation for msgrcv() and
msgsnd(). Existing code was even partly buggy since it returned on some paths
different error codes than the standard.
Signed-off-by: Helge Deller <deller@gmx.de>
Process personality is stored together with other flags like UNAME26 in
an integer variable. Overwriting this value with PER_LINUX drops all
other existing flags and as such broke tools like the uname26 tool.
Actually this was only broken on 32bit kernels, since for 32bit-ELF
binaries on 64-bit kernels the SET_PERSONALITY macro from
arch/parisc/kernel/binfmt_elf32.c is used which does not modifies the
personality value at all (which is wrong as long as we don't run HPUX
binaries or similiar).
Signed-off-by: Helge Deller <deller@gmx.de>
LED activity is calculated out of the vm event counters wich are delivered
through the all_vm_events() function which requires CONFIG_VM_EVENT_COUNTERS.
Signed-off-by: Helge Deller <deller@gmx.de>
Nothing uses compat_rt_sigframe.h anymore. Commit
f671c45df2 ("[PARISC] Arch-specific compat
signals") removed all includes of that header. It also basically copied
that entire header verbatim into signal32.h. It seems it was just
forgotten to also remove compat_rt_sigframe.h from the tree. Remove that
header now.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Helge Deller <deller@gmx.de>
Commit d065bd810b
(mm: retry page fault when blocking on disk transfer) and
commit 37b23e0525
(x86,mm: make pagefault killable)
The above commits introduced changes into the x86 pagefault handler
for making the page fault handler retryable as well as killable.
These changes reduce the mmap_sem hold time, which is crucial
during OOM killer invocation.
Port these changes to parisc.
Signed-off-by: Kautuk Consul <consul.kautuk@gmail.com>
Signed-off-by: Helge Deller <deller@gmx.de>
1) PTRACE_SYSCALL doesn't work for 64bit process on parisc64.
Compat syscall table is used instead of 64bit one. IMO we should either
refuse to allow PTRACE_SYSCALL for 64bit processes or duplicate the
logics choosing the right syscall table into .Ltracesys.
2) if you have let the tracee run with PTRACE_SYSCALL and
it had stopped, you can use PTRACE_POKEUSR to modify syscall number
(r20) and arguments 1--4 (r26--r23). Modifications will have effect.
However, modifying arguments 5 and 6 (r22 and r21 resp.) works only
when process (32bit one) runs on 64bit host - on 32bit one it has no
effect. AFAICS, the diff below should fix that one.
Signed-off-by: Al Viro <viro@ZenIV.linux.org.uk>
Tested-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
This patch unbreaks the current logic in that way, that even if
CONFIG_DISCONTIGMEM isn't set, the user may be informed, that he should turn on
CONFIG_DISCONTIGMEM for his machine.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
It is necessary to disable preemption during cache flushes done through the
TMPALIAS region to ensure that the TLB setup is not clobbered by another flush.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
People are playing odd games with IRQF_DISABLED, remove it.
Its not reliable, since shared interrupt lines could disable it for you,
and its possible and allowed for archs to disable IRQs to limit IRQ nesting.
Therefore, simply mandate that _ALL_ IRQ handlers are run with IRQs disabled.
[ This _should_ not break anything, since we've mandated that IRQ handlers
_must_ be able to deal with this for a _long_ time ]
IRQ handlers should be fast, no if buts and any other exceptions. We also have
plenty instrumentation to find any offending IRQ latency sources.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Helge Deller <deller@gmx.de>
CONFIG_PARISC_TMPALIAS enables clear_user_highpage and copy_user_highpage.
These are essentially alternative implementations of clear_user_page and
copy_user_page. They don't have anything to do with x86 high pages, but they
build on the infrastructure to save a few instructions. Read the comment in
clear_user_highpage as it is very important to the implementation. For this
reason, there isn't any gain in using the TMPALIAS/highpage approach.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
flush_cache_mm, for the non current case also uses flush_dcache_page_asm
and flush_icache_page_asm which are TMPALIAS flushes.
For the non current case, the algorithm used by get_ptep is derived from the
vmalloc_to_page implementation in vmalloc.c. It is essentially a generic page
table lookup. The other alternative was to duplicate the lookup in entry.S.
The break point for switching to a full cache flush is somewhat arbitrary. The
same approach is used in flush_cache_range for non current case. In a GCC
build and check, many small programs are executed and this change provided a
significant performance enhancement, e.g. GCC build time was cut almost in half
on a rp3440 at j4. Previously, we always flushed the entire cache.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
Implement clear_page_asm and copy_page_asm. These are optimized routines to
clear and copy a page. I tested prefetch optimizations in clear_page_asm and
copy_page_asm but didn't see any significant performance improvement on rp3440.
I'm not sure if these are routines are significantly faster than memset and/or
memcpy, but they are there for further performance evaluation.
TLB purge operations on PA 1.X SMP machines are now serialized with the help of
the new tlb_lock() and tlb_unlock() macros, since on some PA-RISC machines, TLB
purges need to be serialized in software. Obviously, lock isn't needed in UP
kernels. On PA 2.0 machines, there is a local TLB instruction which is much
less disruptive to the memory subsystem. No lock is needed for local purge.
Loops are also unrolled in flush_instruction_cache_local and
flush_data_cache_local.
The implementation of what used to be copy_user_page (now copy_user_page_asm)
is now fixed. Additionally 64-bit support is now added. Read the preceding
comment which I didn't change. I left the comment but it is now inaccurate.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
This is the first patch in a series of 4, with which the page cache flushing of
parisc will gets fixed and enhanced. This even fixes the nasty "minifail" bug
(http://wiki.parisc-linux.org/TestCases?highlight=%28minifail%29) which
prevented parisc to stay an official debian port. Basically the flush in
copy_user_page together with the TLB patch from commit
7139bc1579 is what fixes the minifail bug.
This patch still uses the TMPALIAS approach. The new copy_user_page
implementation calls flush_dcache_page_asm to flush the user dcache page
(crucial for minifail fix) via a kernel TMPALIAS mapping. After that, it just
copies the page using the kernel mapping. It does a final flush if needed.
Generally it is hard to avoid doing some cache flushes using the kernel mapping
(e.g., copy_to_user_page and copy_from_user_page).
This patch depends on a subsequent change to pacache.S implementing
clear_page_asm and copy_page_asm. These are optimized routines to clear and
copy a page. The calls in clear_user_page and copy_user_page could be replaced
by calls to memset and memcpy, respectively. I tested prefetch optimizations
in clear_page_asm and copy_page_asm but didn't see any significant performance
improvement on rp3440. I'm not sure if these are routines are significantly
faster than memset and/or memcpy, but they are there for further performance
evaluation.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
Use WARN rather than printk followed by WARN_ON(1), for conciseness.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Helge Deller <deller@gmx.de>
pa_pdc_cell has been allocated in this function and so should be
freed before leaving from the error handling cases.
spatch with a semantic match is used to found this problem.
(http://coccinelle.lip6.fr/)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Helge Deller <deller@gmx.de>
When building a 64bit kernel which includes all necessary drivers and
filesystems the vmlinux kernel often gets so huge, that the linker won't
be able to resolve the branch stubs. This patch overcomes this limit by
providing an option to compile the kernel with the -mlong-calls compiler
option.
Signed-off-by: Helge Deller <deller@gmx.de>
This comment describes incredibly subtle code, so it should be right!
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
The current Makefile will only choose the hppa64 cross compiler when
running natively on hppa in a 32bit userspace.
This patch additionally chooses the correct 32/64 bit hppa compiler even
when doing real cross compiling to hppa/hppa64 from another architecture.
Signed-off-by: Helge Deller <deller@gmx.de>
Introduce a common smp_callin() function to call
from trampoline_32.S.
Add platform specific functions to handle the
platform details.
This is in preparation for a patch that will
unify the smp boot stuff for all architectures.
sparc32 was significantly different to warrant
this patch in preparation.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>
Acked-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
PARISC fixes on 20130213
This is a couple of patches, one to fix a broken build with HPUX compatibility
and the other to solve a coherency problem we've been seeing in our TLB where
setting a page read only occasionally fails to trigger a COW because of a
stale writeable TLB entry.
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
When we set the sun4u version of the PTE execute bit, it's:
or REG, _PAGE_EXEC_4U, REG
_PAGE_EXEC_4U is 0x1000, unfortunately the immedate field of the
'or' instruction is a signed 13-bit value. So the above actually
assembles into:
or REG, -4096, REG
completely corrupting the final PTE value.
Set it with a:
sethi %hi(_PAGE_EXEC_4U), TMP
or REG, TMP, REG
sequence instead.
This fixes "git gc" crashes on sun4u machines.
Reported-by: Meelis Roos <mroos@linux.ee>
Signed-off-by: David S. Miller <davem@davemloft.net>
commit 1de63d60cd ("efi: Clear EFI_RUNTIME_SERVICES rather than
EFI_BOOT by "noefi" boot parameter") attempted to make "noefi" true to
its documentation and disable EFI runtime services to prevent the
bricking bug described in commit e0094244e4 ("samsung-laptop:
Disable on EFI hardware"). However, it's not possible to clear
EFI_RUNTIME_SERVICES from an early param function because
EFI_RUNTIME_SERVICES is set in efi_init() *after* parse_early_param().
This resulted in "noefi" effectively becoming a no-op and no longer
providing users with a way to disable EFI, which is bad for those
users that have buggy machines.
Reported-by: Walt Nelson Jr <walt0924@gmail.com>
Cc: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
Link: http://lkml.kernel.org/r/1361392572-25657-1-git-send-email-matt@console-pimps.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
More drm-next bits for radeon. Just bug fixes.
* 'drm-next-3.9' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: properly validate the atpx interface
drm/radeon: switch get_gpu_clock() to a callback (v2)
drm/radeon: add a asic callback to get the xclk
drm/radeon: Avoid NULL pointer dereference from atom_index_iio() allocation failure
drm/radeon: remove overzealous warning in hdmi handling
drm/radeon: fix multi-head power profile stability on BTC+ asics
restore debugfs vbios, fix multiple actions with supervisor intrs
* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
drm/nouveau: restore debugfs/vbios.rom support
drm/nv50-/kms: remove UPDATE methods after each encoder disconnect
drm/nvd0/disp: handle multiple actions from one set of supervisor intrs
drm/nv50/disp: handle multiple actions from one set of supervisor intrs
