Even though the parent is recorded with the normal function tracing
of the latency tracers (irqsoff and wakeup), the function graph
recording is bogus.
This is due to the function graph messing with the return stack.
The latency tracers pass in as the parent CALLER_ADDR0, which
works fine for plain function tracing. But this causes bogus output
with the graph tracer:
3) <idle>-0 | d.s3. 0.000 us | return_to_handler();
3) <idle>-0 | d.s3. 0.000 us | _raw_spin_unlock_irqrestore();
3) <idle>-0 | d.s3. 0.000 us | return_to_handler();
3) <idle>-0 | d.s3. 0.000 us | trace_hardirqs_on();
The "return_to_handle()" call is the trampoline of the
function graph tracer, and is meaningless in this context.
Cc: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
The preempt and irqsoff tracers have three types of function tracers.
Normal function tracer, function graph entry, and function graph return.
Each of these use a complex dance to prevent recursion and whether
to trace the data or not (depending if interrupts are enabled or not).
This patch moves the duplicate code into a single routine, to
prevent future mistakes with modifying duplicate complex code.
Cc: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
The wakeup tracer has three types of function tracers. Normal
function tracer, function graph entry, and function graph return.
Each of these use a complex dance to prevent recursion and whether
to trace the data or not (depending on the wake_task variable).
This patch moves the duplicate code into a single routine, to
prevent future mistakes with modifying duplicate complex code.
Cc: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
The check_irq_entry and check_irq_return could be called
from graph event context. In such case there's no graph
private data allocated. Adding checks to handle this case.
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
LKML-Reference: <20100924154102.GB1818@jolsa.brq.redhat.com>
[ Fixed some grammar in the comments ]
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
This patch adds header <linux/sched.h> into the below files for build with
CONFIG_PREEMPT_NONE.
arch/arm/mach-s5p64x0/cpu.c
Signed-off-by: Seung-Chull Suh <sc.suh@samsung.com>
[kgene.kim@samsung.com: edited title and message]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The patch removes s3c_gpio_lock/unlock to avoid acquiring the lock
recursively as lock is already acquired by calling function.
Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: removed useless variable due to this]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fix the touch screen device name from s3c64x0-adc to s3c64xx-adc.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch updates s5p64x0_defconfig and changes the name from
s5p6440_defconfig so that can support S5P6440 and S5P6450 with
one kernel.
Tested on SMDK6440(S5P6440) and SMDK6450(S5P6450).
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds UART serial port support for S5P6450 SoC.
The S5P6450 has 6 UARTs, so adds resource of UART4 and UART5.
And to fix membase which is in serial/samsung.c is from Ben Dooks.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
This patch moves smdk6440 board file from mach-s5p6440 into the new
mach-s5p64x0 directory and adds smdk6450 board file.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch moves S5P6440 GPIO support files from mach-s5p6440
into the new mach-s5p64x0 for merge S5P6440 and S5P6450 SocS.
NOTE: Not supported S5P6450 GPIO yet. Will be supported soon.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds S5P6450 I2C support in the ARCH_S5P64X0. And
moves S5P6440 I2C support files into the mach-s5p64x0 together.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch moves DMA support files in the mach-s5p64x0
for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Jassi Brar <jassi.brar@samsung.com>
This patch updates regarding clock files for supporting S5P6440 and
S5P6450 with one kernel image. The mach-s5p64x0/clock.c is for common
of them and there are specific clock files for each SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds ARCH_S5P64X0 which can support S5P6440 and S5P6450 with
one kernel image. So moved some files of mach-s5p6440 into the new ARCH
directory mach-s5p64x0.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Some systems using this bus sometimes have very basic devices on them
such as regulators. So we need to be loaded even earlier in case the
devices are used by things such as early board init code. Therefore
register in subsys_initcall().
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Currently, if the bits_per_word when doing a transfer is not 8bits, we
always treat it as 16bits when we should actually be returning an error.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the hardware is controlling the CS, there are some SPI options
we are unable to support. So issue a warning in the hopes that the
user will change to a SPI mode where we can support things sanely.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang. So use the nosync variant here.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
While combining things, also switch to the proper SPI bit define names.
This lets us punt the rarely used SPI defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
During runtime, the spi setup function may be called multiple times on the
same device in order to reconfigure some settings on the fly. When this
happens, we need to reset the ctl_reg bits so that changing the mode works
as expected.
Reported-by: Andy Getzendanner <james.getzendanner@students.olin.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This reduces duplication between the setup/transfer functions and keeps
values cached during setup from overriding values changed on a transfer
basis (like bits_per_word).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang. So use the nosync variant here.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Sometimes under load, the Blackfin core is able to send SPI register
updates out before the controller is actually disabled. So when we
go to reprogram the entire state (to switch to a different slave),
make sure we sync after disabling the controller.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when
suspending, so save/restore their entire values.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The common SPI layers take care of detecting CS conflicts and preventing
two devices from claiming the same CS. This causes problems for the GPIO
CS support we currently have as we are using CS0 to mean "GPIO CS". But
if we have multiple devices using a GPIO CS, the common SPI layers see
multiple devices using the virtual "CS0" and reject any such attempts.
To make both work, we introduce an offset define. This represents the
max number of hardware CS values that the SPI peripheral supports. If
the CS is below this limit, we know we can use the hardware CS. If it's
above, we treat it as a GPIO CS. This keeps the CS unique as seen by
the common code and prevents conflicts.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Expand the BIT_CTL defines to use the naming convention of the hardware,
and expand the masks to cover all documented bits.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The driver that we based ours on uses a little extra memory behind the
normal driver state, but we don't. So drop this useless bit of memory.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current structure names are a bit confusing as to what they represent,
so use better names.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than having to look up the same 3 sets of functions at the same
time, just use an ops structure so we only need to set one pointer.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
No point in creating our own version of true/false defines when there is
already a standard stdbool available to us.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The chip ops should always be initialized, so having null fallback
functions are useless.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
As David points out, the cs_change_per_word option isn't standard, nor is
anyone actually using it. So punt all of the dead code considering it
makes up ~10% of the code size.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
