Commit Graph

15 Commits

Author SHA1 Message Date
Feng Kan
76c23c32e3 mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver
Fix ECC Correction bug where the byte offset location were double
fliped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
        /* The NDFC uses Smart Media (SMC) bytes order */
        ecc_code[0] = p[2];
        ecc_code[1] = p[1];
        ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the b1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
	byte_addr = (addressbits[b1] << 4) + addressbits[b0];
The order is change to read it in straight and let the correction
function to revert it to SMC order.

Cc: stable@kernel.org
Signed-off-by: Feng Kan <fkan@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-09-19 14:15:00 -07:00
Kay Sievers
c36f1e3301 mtd: struct device - replace bus_id with dev_name(), dev_set_name()
Cc: dwmw2@infradead.org
Cc: linux-mtd@lists.infradead.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
2009-03-24 16:38:21 -07:00
Sean MacLennan
a808ad3b0d [MTD] [NAND] ndfc driver
The current ndfc driver only compiles under arch/ppc. This arch was
removed from the kernel. I notice the event entry for the ndfc in
Kconfig has been removed in 2.6.28.

This patch converts the ndfc to a proper OF (OpenFirmware) driver. I
can give a working example of the DTS if needed.

The patch has been in production use on the PIKA Warp Appliance and is
in use by others. The Warp basically boots from NAND, so the ndfc driver
is very important to us.

Signed-off-by: Sean MacLennan <smaclennan@pikatech.com>
Acked-By: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-01-05 16:42:44 +00:00
Kay Sievers
1ff184225b [MTD] [NAND] fix platform driver hotplug/coldplug
Since 43cc71eed1, the platform modalias is
prefixed with "platform:".  Add MODULE_ALIAS() to the hotpluggable MTD NAND
platform drivers, to re-enable auto loading.

NOTE: at91_nand for some reason disallows modular builds.  I'm assuming that's
just an oversight that will be fixed.

[dbrownell@users.sourceforge.net: minor fix]
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22 14:17:47 +01:00
Stefan Roese
02d9291874 [MTD] [NAND] Change NDFC driver to support 405 platforms too
This patch adds 405 platform support to the 440 NDFC driver. The new
AMCC 405EZ PPC is equipped with the same NDFC core as the 440EP(x)
and other will follow soon.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-28 20:33:04 +01:00
Stefan Roese
4010db56c8 [MTD] [NAND] Fix endianess bug in ndfc.c
The writel() call accidentally clears all bits in the NDFC_CCR
register (endianess problem). Now __raw_writel() is used instead.

Tested on Bamboo with NAND on chip select 0 and chip select 1.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2006-11-28 22:22:55 +00:00
Frank Haverkamp
6a545a0d60 [MTD NAND] Fix in typo ndfc.c causing wrong ECC layout
Due to this typo, a wrong ECC layout table is chosen.

Signed-off-by: Frank Haverkamp <haver@vnet.ibm.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2006-09-22 10:30:25 +01:00
Thomas Gleixner
1794c13002 [MTD] NAND: ndfc fix address offset thinko
The rework of the command handling in the nand driver
led to wrong address setting in the command control
function. Use the correct address again.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-06-22 13:06:43 +02:00
Thomas Gleixner
b6d5ee00e3 [MTD] NAND Fixup NDFC merge brokeness
Remove the remains of a broken merge.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-06-20 20:31:23 +01:00
Thomas Gleixner
5bd34c091a [MTD] NAND Replace oobinfo by ecclayout
The nand_oobinfo structure is not fitting the newer error correction
demands anymore. Replace it by struct nand_ecclayout and fixup the users
all over the place. Keep the nand_oobinfo based ioctl for user space
compability reasons.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-29 15:06:50 +02:00
Thomas Gleixner
8be834f762 [MTD] NAND Fix platform structure and NDFC driver
The platform structure was lacking an oobinfo field.
The NDFC driver had some remains from another tree.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-29 15:06:49 +02:00
Thomas Gleixner
04bbd0eafb [MTD] NAND Initialize controller lock and wq only once
The lock simplifying patch did not move the lock and waitqueue
initialization into the controller allocation patch.
This reinitializes waitqueue and spinlocks also for driver
supplied controller stuctures. Move it into the allocation path.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-25 12:45:26 +01:00
Thomas Gleixner
7abd3ef987 [MTD] Refactor NAND hwcontrol to cmd_ctrl
The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-23 23:25:53 +02:00
Thomas Gleixner
6dfc6d250d [MTD] NAND modularize ECC
First step of modularizing ECC support.
- Move ECC related functionality into a seperate embedded data structure
- Get rid of the hardware dependend constants to simplify new ECC models

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-23 12:00:46 +02:00
Thomas Gleixner
ce4c61f184 [MTD] Add support for NDFC NAND controller
NDFC NAND Flash controller is embedded in PPC EP44x SoCs.
Add platform driver based support.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-23 11:43:28 +02:00