One-shot timer mode on PXA has various bugs which prevent kernels
build with NO_HZ enabled booting. They end up spinning on a
permanently asserted timer interrupt because we don't properly
clear it down - clearing the OIER bit does not stop the pending
interrupt status. Fix this in the set_mode handler as well.
Moreover, the code which sets the next expiry point may race with
the hardware, and we might not set the match register sufficiently
in the future. If we encounter that situation, return -ETIME so
the generic time code retries.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This fixes a section error on OMAP when the framebuffer is enabled.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With commit 5984a2fc7e kobject_name() is
correctly being used to access the name field of kobj, but that function
needs a pointer to a kobject, not the kobject itself.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Jazz machines have to use the PIT timer for dyntick and highresolution
kernels. This may break because currently just like i386 used to do MIPS
uses two separate spinlocks in the actual PIT code and the PC speaker
code. So switch to do it the same that x86 currently does PIT locking.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Fix ISA irq acknowledge.
Make r4030 clockevent code look like other mips clockevent code.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Register A20R clockevent.
Remove PIT timer setup because it doesn't work
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/au1000/pb1200/irqmap.c:101: warning: ignoring return value of 'request_irq', declared with attribute warn_unused_result
And while at it a few coding style cleanups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Do not include unnecessary headers.
* Do not mention time.README.
* Do not mention mips_timer_ack.
* Make clocksource_mips static. It is now dedicated to c0_timer.
* Initialize clocksource_mips.read statically.
* Remove null_hpt_read.
* Remove an argument of plat_timer_setup. It is just a placeholder.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This adds in the x3proto and magicpanelr2 mach types, plugs in
highlander and rts7751r2d groups, and also hooks up the r2d
subtypes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
R7780RP can't do byte-sized accesses to CF, so needs to do word
sized access with low-byte masking. This same problem exists
on older versions of the R2D, with the same workaround having
been implemented in 43f4b8c757
there. Follow that change for the highlander boards.
This does not impact R7780MP or SH7785 based Highlander modules.
If you're unfortunate enough to be stuck with an R7780RP, this
patch is for you!
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
It's assumed that .eh_frame is terminated with 4-byte 0 in shared
libraries and executable. It seems to be the case for VDSOs too.
Without this terminator, I saw failures when unwinding from VDSO,
though I don't know how other architectures handle this issue.
For the normal libs, crtendS.o gives this terminator. We can use
such terminating objects. Or we can add a 4-byte 0 with modifying
the linker script like as the patch below.
Signed-off-by: Kaz Kojima <kkojima@rr.iij4u.or.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
While using separate IRQ stacks can cut down on stack consumption,
many users can also use 4k stacks directly without the additional
need of separate stacks for soft and hardirqs.
With this split, we support the same rationale for 4KSTACKS as
m68knommu, with the IRQSTACKS abstraction as per ppc64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
movca.l is restricted to SH-4 and up only, though compilers that
are unable to support ISA tuning (especially older versions of
binutils) will happily compile in the bogus opcode on older parts.
Conditionalize it to fix SH-3 regressions noted by Kristoffer.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We can't export verify_compat_iovec when CONFIG_NET is
disabled, and consequently the Solaris compat module
should also depend upon CONFIG_NET.
Signed-off-by: David S. Miller <davem@davemloft.net>
When CONFIG_BUG is turned off, the standard trick of:
switch (x) {
case X:
...
case Y:
...
default:
BUG();
};
to mark impossible cases does not work because BUG() evalutes
to nothing and thus GCC just sees a fallthrough code path.
Add an explicit KERN_ERR log message and a do_exit() to trap
this case.
Signed-off-by: David S. Miller <davem@davemloft.net>
It is unused since we went to an I-cache flush that solely used
the 'flush' instruction, and it's presence breaks the build
when PAGE_SIZE is 512KB.
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix assignment instead of condition
Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Resolve:
CC arch/arm/mach-pxa/time.o
arch/arm/mach-pxa/time.c: In function `pxa_osmr0_set_mode':
arch/arm/mach-pxa/time.c:154: warning: enumeration value `CLOCK_EVT_MODE_RESUME' not handled in switch
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Jon Eibertzon writes:
> We have noticed that the I-cache is disabled while waiting for
> interrupt in cpu_arm926_do_idle in arch/arm/mm/proc-arm926.S
> and we are curious to know why, because this causes us a great
> performance hit when executing in FIQ-handlers. Is it assumed
> here that every individual FIQ-handler re-enables the I-cache?
The I-cache disable is an errata workaround, so the solution is to
disable FIQs across the section with the I-cache disabled.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix:
CC arch/arm/mach-netx/xc.o
arch/arm/mach-netx/xc.c: In function 'request_xc':
arch/arm/mach-netx/xc.c:192: error: 'struct kobject' has no member named 'name'
arch/arm/mach-netx/xc.c:196: error: 'struct kobject' has no member named 'name'
arch/arm/mach-netx/xc.c:200: error: 'struct kobject' has no member named 'name'
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix:
arch/arm/mach-omap1/built-in.o: In function `h2_init':
board-h2.c:(.init.text+0xbb4): undefined reference to `i2c_register_board_info'
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
CPU_HAS_SR_RB is selected by both CPU_SH3 and CPU_SH4, so having a
dependency and default y on those additionally doesn't make much sense.
The select also has to be special cased for CPUs that don't support
this.
This is also something that has been abused too much as a result
of being user-visible, hence the addition of the select in the first
place. So just kill the user-visibility entirely while we're at it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
