* 'for-linus' of git://neil.brown.name/md:
md: remove rd%d links immediately after stopping an array.
md: remove ability to explicit set an inactive array to 'clean'.
md: constify VFTs
md: tidy up status_resync to handle large arrays.
md: fix some (more) errors with bitmaps on devices larger than 2TB.
md/raid10: don't clear bitmap during recovery if array will still be degraded.
md: fix loading of out-of-date bitmap.
It's a really simple patch that basically just open-codes the current
"secure_ip_id()" call, but when open-coding it we now use a _static_
hashing area, so that it gets updated every time.
And to make sure somebody can't just start from the same original seed of
all-zeroes, and then do the "half_md4_transform()" over and over until
they get the same sequence as the kernel has, each iteration also mixes in
the same old "current->pid + jiffies" we used - so we should now have a
regular strong pseudo-number generator, but we also have one that doesn't
have a single seed.
Note: the "pid + jiffies" is just meant to be a tiny tiny bit of noise. It
has no real meaning. It could be anything. I just picked the previous
seed, it's just that now we keep the state in between calls and that will
feed into the next result, and that should make all the difference.
I made that hash be a per-cpu data just to avoid cache-line ping-pong:
having multiple CPU's write to the same data would be fine for randomness,
and add yet another layer of chaos to it, but since get_random_int() is
supposed to be a fast interface I did it that way instead. I considered
using "__raw_get_cpu_var()" to avoid any preemption overhead while still
getting the hash be _mostly_ ping-pong free, but in the end good taste won
out.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
From: Bruce Ashfield <bruce.ashfield@windriver.com>
To fully support the armv7-a instruction set/optimizations, support
for the R_ARM_MOVW_ABS_NC and R_ARM_MOVT_ABS relocation types is
required.
The MOVW and MOVT are both load-immediate instructions, MOVW loads 16
bits into the bottom half of a register, and MOVT loads 16 bits into the
top half of a register.
The relocation information for these instructions has a full 32 bit
value, plus an addend which is stored in the 16 immediate bits in the
instruction itself. The immediate bits in the instruction are not
contiguous (the register # splits it into a 4 bit and 12 bit value),
so the addend has to be extracted accordingly and added to the value.
The value is then split and put into the instruction; a MOVW uses the
bottom 16 bits of the value, and a MOVT uses the top 16 bits.
Signed-off-by: David Borman <david.borman@windriver.com>
Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This adds the camera device based on Guennadi's soc_camera architecture
for the mx31.
The proposed init by Guennadi was removed and must be implemented in the
board init file as it contains a lot of board specific info (memory
size, clock speed).
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Reviewed-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is used on all board of our system, so again this is done in the
mx31moboard.c file.
changes since v2: call to gpio_request added in platform code, and
moved device initialization in baseboard files.
changes since v1: pins are claimed in another patch
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to use the gpiolib, we now have to call gpio_request in
the plaform code since it is not done in iomux code anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since iomux code is not directly related to gpio on mx31, the calls
to gpio_request are removed from iomux.c file.
These calls have to be done in platform initialization files. The
name of the singe pin call for iomux is also changed to
mxc_iomux_alloc_pin.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add OTG device definition and resources to i.MX31 and a pure USB device mode
support to the pcm037 board.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several comments in board config files stated "mandatory for
CONFIG_LL_DEBUG" but the correct name is CONFIG_DEBUG_LL.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This support both sdhc1 and sdhc2 with WP and CD for the marxbot and
devboard mx31moboard baseboards.
sdhc2 is present on both, but is not directly included in the
mx31moboard file because a third baseboard (not supported yet) without
sdhc2 is planned.
Changes since v1: removed pin initialization from init/exit function and
taken different comments into account
Changes since v2: pin initialiation now is done in another patch for all
current mx31moboard pins
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Changes since v1: all the pins needed for the drivers are claimed in
another patch
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As suggested by Sascha, here we setup all the pins that we are using in
the current (and currently reviewed) drivers for mx31moboard system.
changes since v1: changed I2C1 pin names
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As suggested by Sascha, I regroup them in a single patch so that the
other patches become more orthogonal.
changes since v1: changed I2C1 pin names
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This hw-random driver add support to RNGA hardware found
on some i.MX processors.
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Acked-by: Matt Mackall <mpm@selenic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Various improvements (includes in alphabetical order, platform devices
declaration order change, ...)
The pins now are claimed in a single function call from a main table for
every board for a better clarity and to adopt the current agreement for
mx31 devices.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds a defconfig file for the i.MX21 SoC, targeting
the Freescale i.MX21ADS (M9328MX21ADSE) Application
Development System.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig enables now HAVE_PWM (this enables in turn the selection of
CONFIG_BACKLIGHT_PWM)
* changes CONFIG_ARCH_MXyy to CONFIG_MACH_MXyy
* fix some register names to match those of the reference manual
* write a stub code so that the PWM can be used to program the
LCD backlight
* convert from #ifdef CONFIG_ARCH_MXxx to cpu_is_mxXX()
* remove unneeded defines and fix 80-column "violations" of checkpatch.pl
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[PATCH v6] MXC: mx21ads base support
Base machine support for the Freescale i.MX21ADS
(M9328MX21ADSE) Application Development System.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MXC GPIO controller does not support generation of interrupts on both
edges. Emulate this mode in software by reconfiguring the irq trigger
polarity on each interrupt. This follows an example of
drivers/mfd/asic3.c.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch-imx is superseeded by the MXC architecture support.
This patch removes arch/arm/mach-imx from the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch-imx is superseeded by the MXC architecture support.
This patch removes arch-imx from the build system.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we depend on hardcoded base addresses for the interrupt
controller. This prevents us from compiling in more than one i.MX
architecture at a time. This patch changes the base address to a
runtime calculated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we depend on hardcoded base addresses for the timer.
This prevents us from compiling in more than one i.MX architecture
at a time. This patch changes the base address to a runtime
calculated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows us to have more mapping functions for more than one
i.MX architecture in the kernel. As this is the earliest board
specific hook we have, also use it to set the cpu type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
