e4ec7989b4
MIPS: Convert the irq functions to the new names
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Scripted with coccinelle.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2011-03-29 14:48:07 +02:00
0c3263870f
MIPS: Octeon: Rewrite interrupt handling code.
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This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com >
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com >
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2011-03-29 14:48:06 +02:00
52a0f00b50
MIPS: Octeon: Disallow MSI-X interrupt and fall back to MSI interrupts.
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MSI-X interrupts are not supported yet for Octeon, return error if
MSI-X interrupts are requested by driver so that the driver will fall
back to use MSI interrupts.
Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com >
To: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com >
Patchwork: https://patchwork.linux-mips.org/patch/1506/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
Signed-off-by: David Daney <ddaney@caviumnetworks.com >
2010-08-05 13:26:27 +01:00
1aa2b2782a
MIPS: Octeon: Support 256 MSI on PCIe
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Signed-off-by: David Daney <ddaney@caviumnetworks.com >
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1507/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
2010-08-05 13:26:27 +01:00
7d9eee6e52
MIPS: Octeon: Make MSI use handle_simple_irq().
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The use of handle_percpu_irq() is not really what we want for MSI, use
handle_simple_irq() instead. This is probably the prototypical case
for using handle_simple_irq(), because all the MSIs are dispatched from
the root interrupt service routine.
Also since the base IRQ is not shared, don't pass IRQF_SHARED.
Signed-off-by: David Daney <ddaney@caviumnetworks.com >
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1488/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
2010-08-05 13:26:11 +01:00
a5decf700b
MIPS: Octeon: Get rid of a bunch of MSI IRQ number definitions.
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MSI IRQ numbers are allocated dynamically, so there is no reason to
have all these static definitions.
Signed-off-by: David Daney <ddaney@caviumnetworks.com >
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1487/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
2010-08-05 13:26:11 +01:00
a894f14d7e
MIPS: Octeon: Move MSI code out of octeon-irq.c.
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Put all the MSI code in one place (msi-octeon.c). This simplifies
octeon-irq.c and gets rid of some ugly #ifdefs
Signed-off-by: David Daney <ddaney@caviumnetworks.com >
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1484/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
2010-08-05 13:26:10 +01:00
01a6221a6a
MIPS: Reorganize Cavium OCTEON PCI support.
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Move the cavium PCI files to the arch/mips/pci directory. Also cleanup
comment formatting and code layout. Code from pci-common.c, was moved
into other files.
Signed-off-by: David Daney <ddaney@caviumnetworks.com >
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
2009-07-03 15:45:29 +01:00
