Commit Graph

386082 Commits

Author SHA1 Message Date
Boris BREZILLON
f784d9c904 dmaengine: at_hdmac: prepare clk before calling enable
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to
avoid common clk framework warnings.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
[nicolas.ferre@atmel.com: remove return code checking in at_dma_resume_noirq()]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:57 +05:30
Nicolas Ferre
c3dbc60c9b dmaengine/trivial: at_hdmac: add curly brackets to if/else expressions
Correct coding style following the patch:
7c407d3e54dcc0c79119553c8d5ef176c1d5bc3a (DMA: AT91:
Get residual bytes in dma buffer).

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:56 +05:30
Nicolas Ferre
538eea6c7c dmaengine: at_hdmac: remove unsuded atc_cleanup_descriptors()
Since patch 7c407d3e54dcc0c79119553c8d5ef176c1d5bc3a (DMA: AT91:
Get residual bytes in dma buffer), the function
atc_cleanup_descriptors() is not used anymore. We remove it to prevent
warnings.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-07-05 11:40:55 +05:30
Ludovic Desroches
62971b2982 dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT binding
For most devices the FIFO configuration is the same i.e. when half FIFO size is
available/filled, a source/destination request is serviced. But USART devices
have to do it when there is enough space/data available to perform a single
AHB access so the ASAP configuration.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:54 +05:30
Ludovic Desroches
764037c6f5 ARM: at91: dt: add header to define at_hdmac configuration
DMA-cell content is a concatenation of several values. In order to keep this
stuff human readable, macros are introduced.

The values for the FIFO configuration are not the same as the ones used in the
configuration register in order to keep backward compatibility. Most devices
use the half FIFO configuration but USART ones have to use the ASAP
configuration. This parameter was not initially planed to be into the at91 dma
dt binding. The third cell will be used to store this parameter, it will
become a concatenation of the FIFO configuration and of the peripheral ID. In
order to keep backward compatibility i.e. FIFO configuration is equal to 0, we
have to perform a translation since the value to put in the register to set
half FIFO is 1.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:53 +05:30
Maarten ter Huurne
757f4e51b7 MIPS: jz4740: Correct clock gate bit for DMA controller
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:53 +05:30
Lars-Peter Clausen
25ce6c35fe MIPS: jz4740: Remove custom DMA API
Now that all users of the custom jz4740 DMA API have been converted to use
the dmaengine API instead we can remove the custom API and move all the code
talking to the hardware to the dmaengine driver.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:52 +05:30
Lars-Peter Clausen
cdcb90ad48 MIPS: jz4740: Register jz4740 DMA device
Register a device for the newly added jz4740 dmaengine driver.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
[manually edited to align struct assignment]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:51 +05:30
Lars-Peter Clausen
7c169a42d9 dma: Add a jz4740 dmaengine driver
This patch adds dmaengine support for the JZ4740 DMA controller. For now the
driver will be a wrapper around the custom JZ4740 DMA API. Once all users of the
custom JZ4740 DMA API have been converted to the dmaengine API the custom API
will be removed and direct hardware access will be added to the dmaengine
driver.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:50 +05:30
Maarten ter Huurne
c8c81f32ee MIPS: jz4740: Acquire and enable DMA controller clock
Previously, it was assumed that the DMA controller clock is not gated
when the kernel starts running. While that is the power-on state, it is
safer to not rely on that.

Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:49 +05:30
Qiao Zhou
8e3c518fba dma: mmp_tdma: disable irq when disabling dma channel
mask dma irq when disabling dma channel, so that interrupt status
will not be set and interrupt won't come again.

Signed-off-by: Qiao Zhou <zhouqiao@marvell.com>
Acked-by: Zhangfei Gao <zhangfei.gao@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:48 +05:30
Mark Brown
d7cabeed83 dmaengine: PL08x: Avoid collisions with get_signal() macro
As pointed out by Arnd Bergmann there is a get_signal macro definied in
linux/signal.h which can conflict with the platform data callback
function of the same name leading to confusing errors from the compiler
(especially if signal.h manages to get pulled into the driver itself due
to header dependencies).  Avoid such errors by renaming get_signal and
put_signal in the platform data to get_xfer_signal and put_xfer_signal.

Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:47 +05:30
Vinod Koul
e368b510c0 dmaengine: dw: select DW_DMAC_BIG_ENDIAN_IO automagically
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:46 +05:30
Andy Shevchenko
fed42c198b dma: dw: add PCI part of the driver
This is the PCI part of the DesignWare DMAC driver. The controller is usually
used in the Intel hardware such as Intel Medfield.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:45 +05:30
Andy Shevchenko
9cade1a46c dma: dw: split driver to library part and platform code
To simplify the driver development let's split driver to library and platform
code parts. It helps us to add PCI driver in future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
[Fixed compile error and few checkpatch issues]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:44 +05:30
Andy Shevchenko
61a7649620 dma: move dw_dmac driver to an own directory
The dw_dmac driver is going to be split into multiple files. To make this more
convenient move it to an own directory.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:43 +05:30
Andy Shevchenko
0b95961e03 dw_dmac: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:42 +05:30
Will Deacon
fed8c45727 dma: pl330: use dma_addr_t for describing bus addresses
The microcode bus address (pl330_dmac.mcode_bus) is currently a u32,
which fails to compile when building on a system with 64-bit bus
addresses.

This patch uses dma_addr_t to represent the address instead.

Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:42 +05:30
Will Deacon
0967717661 dma: pl330: rip out broken, redundant ID probing
The PL330 driver probes the peripheral and primecell IDs of the device to
make sure that it is indeed an AMBA PL330. However, it does this by
making byte accesses to a device mapping of the word-aligned ID
registers, which is either UNPREDICTABLE or generates an alignment fault
(depending on the presence of the virtualisation extensions).

Rather than fix this code, we can actually rip most of it out and let
the AMBA bus driver correctly do the probing for us.

Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:41 +05:30
Shawn Guo
9479e17c9b dma: imx-sdma: move to generic device tree bindings
Update imx-sdma driver to adopt generic DMA device tree bindings.  It
calls of_dma_controller_register() with imx-sdma specific of_dma_xlate
to get the generic DMA device tree helper support.  The #dma-cells for
imx-sdma must be 3, which includes request ID, peripheral type and
priority.

The existing way of requesting channel, clients directly call
dma_request_channel(), still work there, and will be removed after
all imx-sdma clients get converted to generic DMA device tree helper.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-07-05 11:40:40 +05:30
Rongjun Ying
add93b578e dmaengine: sirf: set dma residue based on the current dma transfer position
read SIRFSOC_DMA_CH_ADDR register to get current dma transfer position, then
update dma residue so that things like ALSA drivers work as ALSA drivers need
the right residue value.

Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:39 +05:30
Dmitry Osipenko
7bdc1e272a dma: tegra: avoid channel lock up after free
Lock scenario: Channel 1 was allocated and prepared as slave_sg, used and freed.
Now preparation of cyclic dma on channel 1 will fail with err "DMA configuration
conflict" because tdc->isr_handler still setted to handle_once_dma_done.

This happens because tegra_dma_abort_all() won't be called on channel freeing
if pending list is empty and channel not busy. We need to clear isr_handler
on channel freeing to avoid locking.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:38 +05:30
Dmitry Osipenko
ac7ae754d5 dma: tegra20-apbdma: err message correction
Fixed err msg params order on irq request fail.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:37 +05:30
Denis Efremov
8004cbb481 dw_dmac: remove inline marking of EXPORT_SYMBOL functions
EXPORT_SYMBOL and inline directives are contradictory to each other.
The patch fixes this inconsistency.

Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Denis Efremov <yefremov.denis@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:36 +05:30
Jingoo Han
c1a9d391ad dma: timb_dma: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:35 +05:30
Jingoo Han
36c6df5062 dma: at_hdmac: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:34 +05:30
Fabio Estevam
3208b3701b dma: mxs-dma: Staticize mxs_dma_xlate
Fix the following sparse warning:

drivers/dma/mxs-dma.c:696:17: warning: symbol 'mxs_dma_xlate' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:33 +05:30
Jingoo Han
dd3daca162 dma: use platform_{get,set}_drvdata()
Use the wrapper functions for getting and setting the driver data using
platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
so we can directly pass a struct platform_device.

Also, unnecessary dev_set_drvdata() is removed, because the driver core
clears the driver data to NULL after device_release or on probe failure.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:32 +05:30
Elen Song
d48de6f1a8 DMA: AT91: Get residual bytes in dma buffer
Add support for returning the residue for current transfer cookie by
reading the transfered buffer size(BTSIZE) in CTRLA register.

For a single buffer cookie, the descriptor length minus BTSIZE
can get the residue.

For a lli cookie, remain_desc will record remain descriptor length
when last descriptor finish, the remain_desc minus BTSIZE can get the
current residue.

If the cookie has completed successfully, the residue will be zero.
If the cookie is in progress, it will be the number of bytes yet to be transferred.
If get residue error, the cookie will be turn into error status.

Check dma fifo to see if data remain, let issue pending finish remain work if there is.
Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:31 +05:30
Elen Song
d088c33b64 DMA: AT91: Get transfer width
In one dma transfer, the data transfer width can be configured and it is limited by source or destination peripheral width,
tx_width will save the transfer width, but for memcpy, either source or destination transfer width is taken as tx_width.

Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:30 +05:30
Nicolas Ferre
6c22770f64 dmaengine: at_hdmac/trivial: rearrange CFG register bits assignment
No modification in CFG register configuration, just rearrange
bits directives to group logically and make it more readable.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:29 +05:30
Nicolas Ferre
72ae6e4b31 dmaengine: at_hdmac: extend hardware handshaking interface identification
Peripheral handshaking identification numbers can be bigger than 15, so new
fields have been created in the CFG register.
Add macros to take this modification into account and use them in
at_dma_xlate() function.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:29 +05:30
Nicolas Ferre
ea7e79063e dmaengine: at_hdmac/trivial: correct typo in comment
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:28 +05:30
Markus Pargmann
5c6b3e7725 DMA: imx-dma: imxdma->dev used uninitialized
imxdma->dev is used for dev_warn before it was set.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:27 +05:30
Markus Pargmann
290ad0f9d9 dma: imx-dma: Add oftree support
Adding devicetree support for imx-dma driver. Use driver name for
function 'imx_dma_is_general_purpose' because the devicename for
devicetree initialized devices is different.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:26 +05:30
Dave Airlie
30f83b3716 Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next
- GF117 acceleration support
- GK110 acceleration-with-blob-ucode support, and initial work towards
fixing our own ucode to be suitable.
- Large cleanups of fermi/kepler context handling

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (22 commits)
  drm/nva3/disp: Fix HDMI audio regression
  drm/nv50-/disp: Use output specific mask in interrupt
  drm/nouveau: use vmalloc for pgt allocation
  drm/nvc0-/gr: remove some more of the hardcoded register writes
  drm/nvc0-/gr: factor out yet more unknown magic into versioned functions
  drm/nvd7/devinit: use fermi class, not tesla
  drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16
  drm/nvc0-/gr: remove hardcoding of UNK count/mask in GPCCS ucode
  drm/nvf0/gr: build cs ucode for GK110
  drm/nvc0-/gr: extend one of the magic calculations for >4 GPCs
  drm/nvf0/gr: fix ddx shaders locking up on me
  drm/nvc0/devinit: minor typo
  drm/nvf0/gr: enable support, if external cs ucode is available
  drm/nvf0/gr: magic sequence that makes PGRAPH come out of hiding
  drm/nvf0/ce: enable support
  drm/nvf0/fifo: enable support
  drm/nvd7/gr: initial support
  drm/nvc0-/gr: generate cs register lists from grctx data
  drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs
  drm/nve0-/gr: some new gpc registers can have multiple copies
  ...
2013-07-05 15:55:12 +10:00
Joonyoung Shim
6d35dea107 drm/cma: remove GEM CMA specific dma_buf functionality
We can use prime helpers instead.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-07-05 15:44:54 +10:00
Joonyoung Shim
78467dc5f7 drm/cma: add low-level hook functions to use prime helpers
Instead of using the dma_buf functionality for GEM CMA, we can use prime
helpers if we can provide low-level hook functions for GEM CMA.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-07-05 15:44:49 +10:00
Joonyoung Shim
7c397cd97b drm: add mmap function to prime helpers
This adds to call low-level mmap() from prime helpers.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-07-05 15:44:44 +10:00
Joonyoung Shim
f9d8a1294d drm/prime: fix sgt NULL checking
The drm_gem_map_detach() can be called with sgt is NULL.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-07-05 15:36:20 +10:00
Dave Airlie
63eef6002b Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
This is final pull request for 3.11. This resolves some memory leak
   issues, and includes some code and dt document file cleanups; just
   removed unnecessary descriptions.

   And the patch work for enhancing hdmiphy driver isn't in progress so
   this patch may go to 3.12.

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
  drm/exynos: remove duplicated error routine and unnecessary assign
  drm/exynos: fix pages allocation size in lowlevel_buffer_allocate
  drm/exynos: use drm_calloc_large when allocates pointer array
  drm/exynos: add error check routine in exynos_drm_open
  drm/exynos: initialize the buf_num in vp_video_buffer
  drm/exynos: remove dead code in vidi_power_on
  drm/exynos: fix not to remain exynos_gem_obj as a leak
  of/documentation: Update hpd gpio property for exynos_hdmi
2013-07-05 15:35:38 +10:00
Laurent Pinchart
59e32642d2 drm/rcar-du: Fix buffer pitch alignment
The DU requires a 16 pixels pitch alignement. Make sure dumb buffers are
allocated with the correct pitch, and validate the pitch when creating
frame buffers.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-07-05 15:35:13 +10:00
Laurent Pinchart
3463ff67bc drm/rcar-du: Don't ignore rcar_du_crtc_create() return value
Handle error cases correctly.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-07-05 15:34:56 +10:00
Ilia Mirkin
bf03d1b293 drm/nva3/disp: Fix HDMI audio regression
This is the nva3 counterpart to commit beba44b17 (drm/nv84/disp: Fix
HDMI audio regression). The regression happened as a result of
refactoring in commit 8e9e3d2de (drm/nv84/disp: move hdmi control into
core).

Reported-and-tested-by: Max Baldwin <archerseven@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
2013-07-05 14:43:59 +10:00
Emil Velikov
378f2bcdf7 drm/nv50-/disp: Use output specific mask in interrupt
The commit

   commit 476e84e126
   Author: Ben Skeggs <bskeggs@redhat.com>
   Date:   Mon Feb 11 09:24:23 2013 +1000

       drm/nv50-/disp: initial supervisor support for off-chip encoders

changed the write mask in one of the interrupt functions for on-chip encoders,
causing a regression in certain VGA dual-head setups. This commit reintroduces
the mask thus resolving the regression

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66129
Reported-and-Tested-by: Yves-Alexis <corsac@debian.org>
Cc: stable@vger.kernel.org [3.9+]
CC: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 14:22:29 +10:00
Marcin Slusarz
d005f51eb9 drm/nouveau: use vmalloc for pgt allocation
Page tables on nv50 take 48kB, which can be hard to allocate in one piece.
Let's use vmalloc.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Cc: stable@vger.kernel.org [3.7+]
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:48:41 +10:00
Ben Skeggs
5c5ae7157d drm/nvc0-/gr: remove some more of the hardcoded register writes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:45:04 +10:00
Ben Skeggs
d196e16ebf drm/nvc0-/gr: factor out yet more unknown magic into versioned functions
NVC1/NVD9 are the only chipsets that should have anything different
happen on them after this.  We previously weren't doing these
register modifications, and NVIDIA do.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:44:52 +10:00
Ben Skeggs
0bfd6f734a drm/nvd7/devinit: use fermi class, not tesla
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:44:43 +10:00
Ben Skeggs
60a4acd7c9 drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:44:35 +10:00